| /OK3568_Linux_fs/kernel/drivers/nvmem/ |
| H A D | sprd-efuse.c | 83 static int sprd_efuse_lock(struct sprd_efuse *efuse) in sprd_efuse_lock() argument
87 mutex_lock(&efuse->mutex); in sprd_efuse_lock()
89 ret = hwspin_lock_timeout_raw(efuse->hwlock, in sprd_efuse_lock()
92 dev_err(efuse->dev, "timeout get the hwspinlock\n"); in sprd_efuse_lock()
93 mutex_unlock(&efuse->mutex); in sprd_efuse_lock()
100 static void sprd_efuse_unlock(struct sprd_efuse *efuse) in sprd_efuse_unlock() argument
102 hwspin_unlock_raw(efuse->hwlock); in sprd_efuse_unlock()
103 mutex_unlock(&efuse->mutex); in sprd_efuse_unlock()
106 static void sprd_efuse_set_prog_power(struct sprd_efuse *efuse, bool en) in sprd_efuse_set_prog_power() argument
108 u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT); in sprd_efuse_set_prog_power()
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| H A D | rockchip-efuse.c | 146 struct rockchip_efuse_chip *efuse = context; in rockchip_rk1808_efuse_read() local
152 mutex_lock(&efuse->mutex); in rockchip_rk1808_efuse_read()
154 ret = clk_bulk_prepare_enable(efuse->num_clks, efuse->clks); in rockchip_rk1808_efuse_read()
156 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); in rockchip_rk1808_efuse_read()
171 rk1808_efuse_timing_init(efuse->base); in rockchip_rk1808_efuse_read()
176 efuse->base + RK1808_AUTO_CTRL); in rockchip_rk1808_efuse_read()
178 status = readl(efuse->base + RK1808_INT_STATUS); in rockchip_rk1808_efuse_read()
183 out_value = readl(efuse->base + RK1808_DOUT); in rockchip_rk1808_efuse_read()
184 writel(RK1808_INT_FINISH, efuse->base + RK1808_INT_STATUS); in rockchip_rk1808_efuse_read()
191 rk1808_efuse_timing_deinit(efuse->base); in rockchip_rk1808_efuse_read()
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| H A D | meson-mx-efuse.c | 51 static void meson_mx_efuse_mask_bits(struct meson_mx_efuse *efuse, u32 reg, in meson_mx_efuse_mask_bits() argument
56 data = readl(efuse->base + reg); in meson_mx_efuse_mask_bits()
60 writel(data, efuse->base + reg); in meson_mx_efuse_mask_bits()
63 static int meson_mx_efuse_hw_enable(struct meson_mx_efuse *efuse) in meson_mx_efuse_hw_enable() argument
67 err = clk_prepare_enable(efuse->core_clk); in meson_mx_efuse_hw_enable()
72 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1, in meson_mx_efuse_hw_enable()
75 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL4, in meson_mx_efuse_hw_enable()
81 static void meson_mx_efuse_hw_disable(struct meson_mx_efuse *efuse) in meson_mx_efuse_hw_disable() argument
83 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1, in meson_mx_efuse_hw_disable()
87 clk_disable_unprepare(efuse->core_clk); in meson_mx_efuse_hw_disable()
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| H A D | rk628-efuse.c | 90 struct rk628_efuse_chip *efuse = container_of(regmap, struct rk628_efuse_chip, regmap); in rk628_read() local
94 dev_err(efuse->dev, "rk628-efuse:failed to read reg 0x%x\n", reg); in rk628_read()
104 struct rk628_efuse_chip *efuse = container_of(regmap, struct rk628_efuse_chip, regmap); in rk628_write() local
108 dev_err(efuse->dev, "rk628-efuse:failed to write reg 0x%x\n", reg); in rk628_write()
113 static void rk628_efuse_timing_init(struct rk628_efuse_chip *efuse) in rk628_efuse_timing_init() argument
115 u32 base = efuse->base; in rk628_efuse_timing_init()
117 rk628_write(efuse->regmap, in rk628_efuse_timing_init()
118 rk628_read(efuse->regmap, base + RK628_MOD) & (~RK628_USER_MODE), in rk628_efuse_timing_init()
122 rk628_write(efuse->regmap, (T_CSB_P_S << 16) | T_CSB_P_L, base + T_CSB_P); in rk628_efuse_timing_init()
123 rk628_write(efuse->regmap, (T_PGENB_P_S << 16) | T_PGENB_P_L, base + T_PGENB_P); in rk628_efuse_timing_init()
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| H A D | sc27xx-efuse.c | 84 static int sc27xx_efuse_lock(struct sc27xx_efuse *efuse) in sc27xx_efuse_lock() argument
88 mutex_lock(&efuse->mutex); in sc27xx_efuse_lock()
90 ret = hwspin_lock_timeout_raw(efuse->hwlock, in sc27xx_efuse_lock()
93 dev_err(efuse->dev, "timeout to get the hwspinlock\n"); in sc27xx_efuse_lock()
94 mutex_unlock(&efuse->mutex); in sc27xx_efuse_lock()
101 static void sc27xx_efuse_unlock(struct sc27xx_efuse *efuse) in sc27xx_efuse_unlock() argument
103 hwspin_unlock_raw(efuse->hwlock); in sc27xx_efuse_unlock()
104 mutex_unlock(&efuse->mutex); in sc27xx_efuse_unlock()
107 static int sc27xx_efuse_poll_status(struct sc27xx_efuse *efuse, u32 bits) in sc27xx_efuse_poll_status() argument
112 ret = regmap_read_poll_timeout(efuse->regmap, in sc27xx_efuse_poll_status()
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| H A D | jz4780-efuse.c | 72 struct jz4780_efuse *efuse = context; in jz4780_efuse_read() local
87 regmap_update_bits(efuse->map, JZ_EFUCTRL, in jz4780_efuse_read()
94 ret = regmap_read_poll_timeout(efuse->map, JZ_EFUSTATE, in jz4780_efuse_read()
99 dev_err(efuse->dev, "Time out while reading efuse data"); in jz4780_efuse_read()
103 ret = regmap_bulk_read(efuse->map, JZ_EFUDATA(0), in jz4780_efuse_read()
142 struct jz4780_efuse *efuse; in jz4780_efuse_probe() local
151 efuse = devm_kzalloc(dev, sizeof(*efuse), GFP_KERNEL); in jz4780_efuse_probe()
152 if (!efuse) in jz4780_efuse_probe()
159 efuse->map = devm_regmap_init_mmio(dev, regs, in jz4780_efuse_probe()
161 if (IS_ERR(efuse->map)) in jz4780_efuse_probe()
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| H A D | Makefile | 19 nvmem_jz4780_efuse-y := jz4780-efuse.o
26 obj-$(CONFIG_MTK_EFUSE) += nvmem_mtk-efuse.o
27 nvmem_mtk-efuse-y := mtk-efuse.o
33 nvmem_rk628_efuse-y := rk628-efuse.o
35 nvmem_rockchip_efuse-y := rockchip-efuse.o
44 obj-$(CONFIG_UNIPHIER_EFUSE) += nvmem-uniphier-efuse.o
45 nvmem-uniphier-efuse-y := uniphier-efuse.o
49 nvmem_meson_efuse-y := meson-efuse.o
51 nvmem_meson_mx_efuse-y := meson-mx-efuse.o
56 obj-$(CONFIG_SC27XX_EFUSE) += nvmem-sc27xx-efuse.o
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/efuse/ |
| H A D | hal_efuse_export.h | 33 void **efuse);
35 void rtw_efuse_deinit(struct rtw_hal_com_t *hal_com, void *efuse);
38 rtw_efuse_get_info(void *efuse, enum rtw_efuse_info info_type, void *value,
41 void rtw_efuse_process(void *efuse, char *ic_name);
44 rtw_efuse_logicmap_buf_load(void *efuse, u8* buf, bool is_limit);
47 rtw_efuse_shadow_load(void *efuse, bool is_limit);
50 rtw_efuse_shadow_read(void *efuse, u8 byte_count, u16 offset, u32 *value,
54 rtw_efuse_shadow_write(void *efuse, u8 byte_count, u16 offset, u32 value,
58 rtw_efuse_shadow_update(void *efuse, bool is_limit);
61 rtw_efuse_shadow2buf(void *efuse, u8 *destbuf, u16 buflen);
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| H A D | hal_efuse.c | 31 void efuse_shadow_read_one_byte(struct efuse_t *efuse, u16 offset, u8 *value) in efuse_shadow_read_one_byte() argument
33 *value = efuse->shadow_map[offset]; in efuse_shadow_read_one_byte()
36 void efuse_shadow_read_two_byte(struct efuse_t *efuse, u16 offset, u16 *value) in efuse_shadow_read_two_byte() argument
38 *value = efuse->shadow_map[offset]; in efuse_shadow_read_two_byte()
39 *value |= efuse->shadow_map[offset+1] << 8; in efuse_shadow_read_two_byte()
42 void efuse_shadow_read_four_byte(struct efuse_t *efuse, u16 offset, u32 *value) in efuse_shadow_read_four_byte() argument
44 *value = efuse->shadow_map[offset]; in efuse_shadow_read_four_byte()
45 *value |= efuse->shadow_map[offset+1] << 8; in efuse_shadow_read_four_byte()
46 *value |= efuse->shadow_map[offset+2] << 16; in efuse_shadow_read_four_byte()
47 *value |= efuse->shadow_map[offset+3] << 24; in efuse_shadow_read_four_byte()
[all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/efuse/ |
| H A D | hal_efuse_export.h | 33 void **efuse);
35 void rtw_efuse_deinit(struct rtw_hal_com_t *hal_com, void *efuse);
38 rtw_efuse_get_info(void *efuse, enum rtw_efuse_info info_type, void *value,
41 void rtw_efuse_process(void *efuse, char *ic_name);
44 rtw_efuse_logicmap_buf_load(void *efuse, u8* buf, bool is_limit);
47 rtw_efuse_shadow_load(void *efuse, bool is_limit);
50 rtw_efuse_shadow_read(void *efuse, u8 byte_count, u16 offset, u32 *value,
54 rtw_efuse_shadow_write(void *efuse, u8 byte_count, u16 offset, u32 value,
58 rtw_efuse_shadow_update(void *efuse, bool is_limit);
61 rtw_efuse_shadow2buf(void *efuse, u8 *destbuf, u16 buflen);
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| H A D | hal_efuse.c | 31 void efuse_shadow_read_one_byte(struct efuse_t *efuse, u16 offset, u8 *value) in efuse_shadow_read_one_byte() argument
33 *value = efuse->shadow_map[offset]; in efuse_shadow_read_one_byte()
36 void efuse_shadow_read_two_byte(struct efuse_t *efuse, u16 offset, u16 *value) in efuse_shadow_read_two_byte() argument
38 *value = efuse->shadow_map[offset]; in efuse_shadow_read_two_byte()
39 *value |= efuse->shadow_map[offset+1] << 8; in efuse_shadow_read_two_byte()
42 void efuse_shadow_read_four_byte(struct efuse_t *efuse, u16 offset, u32 *value) in efuse_shadow_read_four_byte() argument
44 *value = efuse->shadow_map[offset]; in efuse_shadow_read_four_byte()
45 *value |= efuse->shadow_map[offset+1] << 8; in efuse_shadow_read_four_byte()
46 *value |= efuse->shadow_map[offset+2] << 16; in efuse_shadow_read_four_byte()
47 *value |= efuse->shadow_map[offset+3] << 24; in efuse_shadow_read_four_byte()
[all …]
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| /OK3568_Linux_fs/u-boot/drivers/misc/ |
| H A D | rockchip-efuse.c | 139 struct rockchip_efuse_regs *efuse = in rockchip_rk1808_efuse_read() local
160 &efuse->auto_ctrl); in rockchip_rk1808_efuse_read()
162 status = readl(&efuse->int_status); in rockchip_rk1808_efuse_read()
167 out_value = readl(&efuse->dout2); in rockchip_rk1808_efuse_read()
168 writel(RK1808_INT_FINISH, &efuse->int_status); in rockchip_rk1808_efuse_read()
185 struct rockchip_efuse_regs *efuse = in rockchip_rk3368_efuse_read() local
191 sip_smc_secure_reg_write((ulong)&efuse->ctrl, in rockchip_rk3368_efuse_read()
195 res = sip_smc_secure_reg_read((ulong)&efuse->ctrl); in rockchip_rk3368_efuse_read()
196 sip_smc_secure_reg_write((ulong)&efuse->ctrl, res.a1 & in rockchip_rk3368_efuse_read()
199 res = sip_smc_secure_reg_read((ulong)&efuse->ctrl); in rockchip_rk3368_efuse_read()
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| /OK3568_Linux_fs/u-boot/board/ti/am57xx/ |
| H A D | board.c | 254 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
255 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
263 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
264 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
265 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
266 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
274 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
275 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
276 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
277 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtl8xxxu/ |
| H A D | rtl8xxxu_8192c.c | 348 struct rtl8192cu_efuse *efuse = &priv->efuse_wifi.efuse8192; in rtl8192cu_parse_efuse() local
351 if (efuse->rtl_id != cpu_to_le16(0x8129)) in rtl8192cu_parse_efuse()
354 ether_addr_copy(priv->mac_addr, efuse->mac_addr); in rtl8192cu_parse_efuse()
357 efuse->cck_tx_power_index_A, in rtl8192cu_parse_efuse()
358 sizeof(efuse->cck_tx_power_index_A)); in rtl8192cu_parse_efuse()
360 efuse->cck_tx_power_index_B, in rtl8192cu_parse_efuse()
361 sizeof(efuse->cck_tx_power_index_B)); in rtl8192cu_parse_efuse()
364 efuse->ht40_1s_tx_power_index_A, in rtl8192cu_parse_efuse()
365 sizeof(efuse->ht40_1s_tx_power_index_A)); in rtl8192cu_parse_efuse()
367 efuse->ht40_1s_tx_power_index_B, in rtl8192cu_parse_efuse()
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| H A D | rtl8xxxu_8723a.c | 134 struct rtl8723au_efuse *efuse = &priv->efuse_wifi.efuse8723; in rtl8723au_parse_efuse() local
136 if (efuse->rtl_id != cpu_to_le16(0x8129)) in rtl8723au_parse_efuse()
139 ether_addr_copy(priv->mac_addr, efuse->mac_addr); in rtl8723au_parse_efuse()
142 efuse->cck_tx_power_index_A, in rtl8723au_parse_efuse()
143 sizeof(efuse->cck_tx_power_index_A)); in rtl8723au_parse_efuse()
145 efuse->cck_tx_power_index_B, in rtl8723au_parse_efuse()
146 sizeof(efuse->cck_tx_power_index_B)); in rtl8723au_parse_efuse()
149 efuse->ht40_1s_tx_power_index_A, in rtl8723au_parse_efuse()
150 sizeof(efuse->ht40_1s_tx_power_index_A)); in rtl8723au_parse_efuse()
152 efuse->ht40_1s_tx_power_index_B, in rtl8723au_parse_efuse()
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/ |
| H A D | hal_api_efuse.c | 25 status = rtw_efuse_shadow_load(hal_info->efuse, is_limit); in rtw_hal_efuse_shadow_load()
35 status = rtw_efuse_shadow_update(hal_info->efuse, is_limit); in rtw_hal_efuse_shadow_update()
46 status = rtw_efuse_shadow_read(hal_info->efuse, byte_count, offset, value, in rtw_hal_efuse_shadow_read()
58 status = rtw_efuse_shadow_write(hal_info->efuse, byte_count, offset, value, in rtw_hal_efuse_shadow_write()
68 status = rtw_efuse_shadow2buf(hal_info->efuse, pbuf, buflen); in rtw_hal_efuse_shadow2buf()
78 hal_status = rtw_efuse_file_map_load(hal_info->efuse, file_path ,is_limit); in rtw_hal_efuse_file_map_load()
88 hal_status = rtw_efuse_file_mask_load(hal_info->efuse, file_path, is_limit); in rtw_hal_efuse_file_mask_load()
99 status = rtw_efuse_get_usage(hal_info->efuse, usage); in rtw_hal_efuse_get_usage()
109 status = rtw_efuse_get_logical_size(hal_info->efuse, size, true); in rtw_hal_efuse_get_logical_size()
119 status = rtw_efuse_get_size(hal_info->efuse, size); in rtw_hal_efuse_get_size()
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/ |
| H A D | hal_api_efuse.c | 25 status = rtw_efuse_shadow_load(hal_info->efuse, is_limit); in rtw_hal_efuse_shadow_load()
35 status = rtw_efuse_shadow_update(hal_info->efuse, is_limit); in rtw_hal_efuse_shadow_update()
46 status = rtw_efuse_shadow_read(hal_info->efuse, byte_count, offset, value, in rtw_hal_efuse_shadow_read()
58 status = rtw_efuse_shadow_write(hal_info->efuse, byte_count, offset, value, in rtw_hal_efuse_shadow_write()
68 status = rtw_efuse_shadow2buf(hal_info->efuse, pbuf, buflen); in rtw_hal_efuse_shadow2buf()
78 hal_status = rtw_efuse_file_map_load(hal_info->efuse, file_path ,is_limit); in rtw_hal_efuse_file_map_load()
88 hal_status = rtw_efuse_file_mask_load(hal_info->efuse, file_path, is_limit); in rtw_hal_efuse_file_mask_load()
99 status = rtw_efuse_get_usage(hal_info->efuse, usage); in rtw_hal_efuse_get_usage()
109 status = rtw_efuse_get_logical_size(hal_info->efuse, size, true); in rtw_hal_efuse_get_logical_size()
119 status = rtw_efuse_get_size(hal_info->efuse, size); in rtw_hal_efuse_get_size()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/fuse/ |
| H A D | nvidia,tegra20-fuse.txt | 4 - compatible : For Tegra20, must contain "nvidia,tegra20-efuse". For Tegra30,
5 must contain "nvidia,tegra30-efuse". For Tegra114, must contain
6 "nvidia,tegra114-efuse". For Tegra124, must contain "nvidia,tegra124-efuse".
7 For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse".
8 For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain
9 "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse".
10 For Tegra234 must contain "nvidia,tegra234-efuse".
12 nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
15 nvidia,tegra30-efuse, nvidia,tegra114-efuse and nvidia,tegra124-efuse:
16 The differences between these SoCs are the size of the efuse array,
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| /OK3568_Linux_fs/u-boot/board/ti/dra7xx/ |
| H A D | evm.c | 313 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
314 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
322 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
323 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
324 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
325 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
333 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
334 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
335 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
336 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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| /OK3568_Linux_fs/u-boot/board/compulab/cl-som-am57x/ |
| H A D | spl.c | 165 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
166 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
173 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
174 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
175 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
176 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
183 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
184 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
185 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
186 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-mvebu/ |
| H A D | efuse.c | 69 static int do_prog_efuse(struct mvebu_hd_efuse *efuse, in do_prog_efuse() argument
74 val.dwords.d[0] = readl(&efuse->bits_31_0); in do_prog_efuse()
75 val.dwords.d[1] = readl(&efuse->bits_63_32); in do_prog_efuse()
76 val.lock = readl(&efuse->bit64); in do_prog_efuse()
85 writel(val.dwords.d[0], &efuse->bits_31_0); in do_prog_efuse()
87 writel(val.dwords.d[1], &efuse->bits_63_32); in do_prog_efuse()
89 writel(val.lock, &efuse->bit64); in do_prog_efuse()
97 struct mvebu_hd_efuse *efuse; in prog_efuse() local
104 efuse = get_efuse_line(nr); in prog_efuse()
105 if (!efuse) in prog_efuse()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/regulator/ |
| H A D | ti-abb-regulator.txt | 35 efuse: (see Optional properties)
36 RBB enable efuse Mask: (See Optional properties)
37 FBB enable efuse Mask: (See Optional properties)
38 Vset value efuse Mask: (See Optional properties)
47 - "efuse-address" - Contains efuse base address used to pick up ABB info.
49 "efuse-address" is required for this.
55 efuse: Mandatory if 'efuse-address' register is defined. Provides offset
56 from efuse-address to pick up ABB characteristics. Set to 0 if
57 'efuse-address' is not defined.
58 RBB enable efuse Mask: Optional if 'efuse-address' register is defined.
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/nvmem/ |
| H A D | mtk-efuse.txt | 7 "mediatek,mt7622-efuse", "mediatek,efuse": for MT7622
8 "mediatek,mt7623-efuse", "mediatek,efuse": for MT7623
9 "mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173
18 efuse: efuse@10206000 {
19 compatible = "mediatek,mt8173-efuse";
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| H A D | amlogic-meson-mx-efuse.txt | 1 Amlogic Meson6/Meson8/Meson8b efuse
5 - "amlogic,meson6-efuse"
6 - "amlogic,meson8-efuse"
7 - "amlogic,meson8b-efuse"
8 - reg: base address and size of the efuse registers
9 - clocks: a reference to the efuse core gate clock
17 efuse: nvmem@0 {
18 compatible = "amlogic,meson8-efuse";
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| /OK3568_Linux_fs/kernel/drivers/cpufreq/ |
| H A D | ti-cpufreq.c | 49 unsigned long efuse);
67 unsigned long efuse) in amx3_efuse_xlate() argument
69 if (!efuse) in amx3_efuse_xlate()
70 efuse = opp_data->soc_data->efuse_fallback; in amx3_efuse_xlate()
72 return ~efuse; in amx3_efuse_xlate()
76 unsigned long efuse) in dra7_efuse_xlate() argument
85 switch (efuse) { in dra7_efuse_xlate()
102 unsigned long efuse) in omap3_efuse_xlate() argument
105 return BIT(efuse); in omap3_efuse_xlate()
214 u32 efuse; in ti_cpufreq_get_efuse() local
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