xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192c.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * RTL8XXXU mac80211 USB driver - 8188c/8188r/8192c specific subdriver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2014 - 2017 Jes Sorensen <Jes.Sorensen@gmail.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Portions, notably calibration code:
8*4882a593Smuzhiyun  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * This driver was written as a replacement for the vendor provided
11*4882a593Smuzhiyun  * rtl8723au driver. As the Realtek 8xxx chips are very similar in
12*4882a593Smuzhiyun  * their programming interface, I have started adding support for
13*4882a593Smuzhiyun  * additional 8xxx chips like the 8192cu, 8188cus, etc.
14*4882a593Smuzhiyun  */
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/kernel.h>
18*4882a593Smuzhiyun #include <linux/sched.h>
19*4882a593Smuzhiyun #include <linux/errno.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/module.h>
22*4882a593Smuzhiyun #include <linux/spinlock.h>
23*4882a593Smuzhiyun #include <linux/list.h>
24*4882a593Smuzhiyun #include <linux/usb.h>
25*4882a593Smuzhiyun #include <linux/netdevice.h>
26*4882a593Smuzhiyun #include <linux/etherdevice.h>
27*4882a593Smuzhiyun #include <linux/ethtool.h>
28*4882a593Smuzhiyun #include <linux/wireless.h>
29*4882a593Smuzhiyun #include <linux/firmware.h>
30*4882a593Smuzhiyun #include <linux/moduleparam.h>
31*4882a593Smuzhiyun #include <net/mac80211.h>
32*4882a593Smuzhiyun #include "rtl8xxxu.h"
33*4882a593Smuzhiyun #include "rtl8xxxu_regs.h"
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #ifdef CONFIG_RTL8XXXU_UNTESTED
36*4882a593Smuzhiyun static struct rtl8xxxu_power_base rtl8192c_power_base = {
37*4882a593Smuzhiyun 	.reg_0e00 = 0x07090c0c,
38*4882a593Smuzhiyun 	.reg_0e04 = 0x01020405,
39*4882a593Smuzhiyun 	.reg_0e08 = 0x00000000,
40*4882a593Smuzhiyun 	.reg_086c = 0x00000000,
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	.reg_0e10 = 0x0b0c0c0e,
43*4882a593Smuzhiyun 	.reg_0e14 = 0x01030506,
44*4882a593Smuzhiyun 	.reg_0e18 = 0x0b0c0d0e,
45*4882a593Smuzhiyun 	.reg_0e1c = 0x01030509,
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	.reg_0830 = 0x07090c0c,
48*4882a593Smuzhiyun 	.reg_0834 = 0x01020405,
49*4882a593Smuzhiyun 	.reg_0838 = 0x00000000,
50*4882a593Smuzhiyun 	.reg_086c_2 = 0x00000000,
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	.reg_083c = 0x0b0c0d0e,
53*4882a593Smuzhiyun 	.reg_0848 = 0x01030509,
54*4882a593Smuzhiyun 	.reg_084c = 0x0b0c0d0e,
55*4882a593Smuzhiyun 	.reg_0868 = 0x01030509,
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun static struct rtl8xxxu_power_base rtl8188r_power_base = {
59*4882a593Smuzhiyun 	.reg_0e00 = 0x06080808,
60*4882a593Smuzhiyun 	.reg_0e04 = 0x00040406,
61*4882a593Smuzhiyun 	.reg_0e08 = 0x00000000,
62*4882a593Smuzhiyun 	.reg_086c = 0x00000000,
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	.reg_0e10 = 0x04060608,
65*4882a593Smuzhiyun 	.reg_0e14 = 0x00020204,
66*4882a593Smuzhiyun 	.reg_0e18 = 0x04060608,
67*4882a593Smuzhiyun 	.reg_0e1c = 0x00020204,
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	.reg_0830 = 0x06080808,
70*4882a593Smuzhiyun 	.reg_0834 = 0x00040406,
71*4882a593Smuzhiyun 	.reg_0838 = 0x00000000,
72*4882a593Smuzhiyun 	.reg_086c_2 = 0x00000000,
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	.reg_083c = 0x04060608,
75*4882a593Smuzhiyun 	.reg_0848 = 0x00020204,
76*4882a593Smuzhiyun 	.reg_084c = 0x04060608,
77*4882a593Smuzhiyun 	.reg_0868 = 0x00020204,
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun static struct rtl8xxxu_rfregval rtl8192cu_radioa_2t_init_table[] = {
81*4882a593Smuzhiyun 	{0x00, 0x00030159}, {0x01, 0x00031284},
82*4882a593Smuzhiyun 	{0x02, 0x00098000}, {0x03, 0x00018c63},
83*4882a593Smuzhiyun 	{0x04, 0x000210e7}, {0x09, 0x0002044f},
84*4882a593Smuzhiyun 	{0x0a, 0x0001adb1}, {0x0b, 0x00054867},
85*4882a593Smuzhiyun 	{0x0c, 0x0008992e}, {0x0d, 0x0000e52c},
86*4882a593Smuzhiyun 	{0x0e, 0x00039ce7}, {0x0f, 0x00000451},
87*4882a593Smuzhiyun 	{0x19, 0x00000000}, {0x1a, 0x00010255},
88*4882a593Smuzhiyun 	{0x1b, 0x00060a00}, {0x1c, 0x000fc378},
89*4882a593Smuzhiyun 	{0x1d, 0x000a1250}, {0x1e, 0x0004445f},
90*4882a593Smuzhiyun 	{0x1f, 0x00080001}, {0x20, 0x0000b614},
91*4882a593Smuzhiyun 	{0x21, 0x0006c000}, {0x22, 0x00000000},
92*4882a593Smuzhiyun 	{0x23, 0x00001558}, {0x24, 0x00000060},
93*4882a593Smuzhiyun 	{0x25, 0x00000483}, {0x26, 0x0004f000},
94*4882a593Smuzhiyun 	{0x27, 0x000ec7d9}, {0x28, 0x000577c0},
95*4882a593Smuzhiyun 	{0x29, 0x00004783}, {0x2a, 0x00000001},
96*4882a593Smuzhiyun 	{0x2b, 0x00021334}, {0x2a, 0x00000000},
97*4882a593Smuzhiyun 	{0x2b, 0x00000054}, {0x2a, 0x00000001},
98*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x00053333},
99*4882a593Smuzhiyun 	{0x2c, 0x0000000c}, {0x2a, 0x00000002},
100*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x0005b333},
101*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000003},
102*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x00063333},
103*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000004},
104*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x0006b333},
105*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000005},
106*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x00073333},
107*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000006},
108*4882a593Smuzhiyun 	{0x2b, 0x00000709}, {0x2b, 0x0005b333},
109*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000007},
110*4882a593Smuzhiyun 	{0x2b, 0x00000709}, {0x2b, 0x00063333},
111*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000008},
112*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x0004b333},
113*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000009},
114*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x00053333},
115*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000a},
116*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x0005b333},
117*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000b},
118*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x00063333},
119*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000c},
120*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x0006b333},
121*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000d},
122*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x00073333},
123*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000e},
124*4882a593Smuzhiyun 	{0x2b, 0x0000050b}, {0x2b, 0x00066666},
125*4882a593Smuzhiyun 	{0x2c, 0x0000001a}, {0x2a, 0x000e0000},
126*4882a593Smuzhiyun 	{0x10, 0x0004000f}, {0x11, 0x000e31fc},
127*4882a593Smuzhiyun 	{0x10, 0x0006000f}, {0x11, 0x000ff9f8},
128*4882a593Smuzhiyun 	{0x10, 0x0002000f}, {0x11, 0x000203f9},
129*4882a593Smuzhiyun 	{0x10, 0x0003000f}, {0x11, 0x000ff500},
130*4882a593Smuzhiyun 	{0x10, 0x00000000}, {0x11, 0x00000000},
131*4882a593Smuzhiyun 	{0x10, 0x0008000f}, {0x11, 0x0003f100},
132*4882a593Smuzhiyun 	{0x10, 0x0009000f}, {0x11, 0x00023100},
133*4882a593Smuzhiyun 	{0x12, 0x00032000}, {0x12, 0x00071000},
134*4882a593Smuzhiyun 	{0x12, 0x000b0000}, {0x12, 0x000fc000},
135*4882a593Smuzhiyun 	{0x13, 0x000287b3}, {0x13, 0x000244b7},
136*4882a593Smuzhiyun 	{0x13, 0x000204ab}, {0x13, 0x0001c49f},
137*4882a593Smuzhiyun 	{0x13, 0x00018493}, {0x13, 0x0001429b},
138*4882a593Smuzhiyun 	{0x13, 0x00010299}, {0x13, 0x0000c29c},
139*4882a593Smuzhiyun 	{0x13, 0x000081a0}, {0x13, 0x000040ac},
140*4882a593Smuzhiyun 	{0x13, 0x00000020}, {0x14, 0x0001944c},
141*4882a593Smuzhiyun 	{0x14, 0x00059444}, {0x14, 0x0009944c},
142*4882a593Smuzhiyun 	{0x14, 0x000d9444}, {0x15, 0x0000f424},
143*4882a593Smuzhiyun 	{0x15, 0x0004f424}, {0x15, 0x0008f424},
144*4882a593Smuzhiyun 	{0x15, 0x000cf424}, {0x16, 0x000e0330},
145*4882a593Smuzhiyun 	{0x16, 0x000a0330}, {0x16, 0x00060330},
146*4882a593Smuzhiyun 	{0x16, 0x00020330}, {0x00, 0x00010159},
147*4882a593Smuzhiyun 	{0x18, 0x0000f401}, {0xfe, 0x00000000},
148*4882a593Smuzhiyun 	{0xfe, 0x00000000}, {0x1f, 0x00080003},
149*4882a593Smuzhiyun 	{0xfe, 0x00000000}, {0xfe, 0x00000000},
150*4882a593Smuzhiyun 	{0x1e, 0x00044457}, {0x1f, 0x00080000},
151*4882a593Smuzhiyun 	{0x00, 0x00030159},
152*4882a593Smuzhiyun 	{0xff, 0xffffffff}
153*4882a593Smuzhiyun };
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun static struct rtl8xxxu_rfregval rtl8192cu_radiob_2t_init_table[] = {
156*4882a593Smuzhiyun 	{0x00, 0x00030159}, {0x01, 0x00031284},
157*4882a593Smuzhiyun 	{0x02, 0x00098000}, {0x03, 0x00018c63},
158*4882a593Smuzhiyun 	{0x04, 0x000210e7}, {0x09, 0x0002044f},
159*4882a593Smuzhiyun 	{0x0a, 0x0001adb1}, {0x0b, 0x00054867},
160*4882a593Smuzhiyun 	{0x0c, 0x0008992e}, {0x0d, 0x0000e52c},
161*4882a593Smuzhiyun 	{0x0e, 0x00039ce7}, {0x0f, 0x00000451},
162*4882a593Smuzhiyun 	{0x12, 0x00032000}, {0x12, 0x00071000},
163*4882a593Smuzhiyun 	{0x12, 0x000b0000}, {0x12, 0x000fc000},
164*4882a593Smuzhiyun 	{0x13, 0x000287af}, {0x13, 0x000244b7},
165*4882a593Smuzhiyun 	{0x13, 0x000204ab}, {0x13, 0x0001c49f},
166*4882a593Smuzhiyun 	{0x13, 0x00018493}, {0x13, 0x00014297},
167*4882a593Smuzhiyun 	{0x13, 0x00010295}, {0x13, 0x0000c298},
168*4882a593Smuzhiyun 	{0x13, 0x0000819c}, {0x13, 0x000040a8},
169*4882a593Smuzhiyun 	{0x13, 0x0000001c}, {0x14, 0x0001944c},
170*4882a593Smuzhiyun 	{0x14, 0x00059444}, {0x14, 0x0009944c},
171*4882a593Smuzhiyun 	{0x14, 0x000d9444}, {0x15, 0x0000f424},
172*4882a593Smuzhiyun 	{0x15, 0x0004f424}, {0x15, 0x0008f424},
173*4882a593Smuzhiyun 	{0x15, 0x000cf424}, {0x16, 0x000e0330},
174*4882a593Smuzhiyun 	{0x16, 0x000a0330}, {0x16, 0x00060330},
175*4882a593Smuzhiyun 	{0x16, 0x00020330},
176*4882a593Smuzhiyun 	{0xff, 0xffffffff}
177*4882a593Smuzhiyun };
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun static struct rtl8xxxu_rfregval rtl8192cu_radioa_1t_init_table[] = {
180*4882a593Smuzhiyun 	{0x00, 0x00030159}, {0x01, 0x00031284},
181*4882a593Smuzhiyun 	{0x02, 0x00098000}, {0x03, 0x00018c63},
182*4882a593Smuzhiyun 	{0x04, 0x000210e7}, {0x09, 0x0002044f},
183*4882a593Smuzhiyun 	{0x0a, 0x0001adb1}, {0x0b, 0x00054867},
184*4882a593Smuzhiyun 	{0x0c, 0x0008992e}, {0x0d, 0x0000e52c},
185*4882a593Smuzhiyun 	{0x0e, 0x00039ce7}, {0x0f, 0x00000451},
186*4882a593Smuzhiyun 	{0x19, 0x00000000}, {0x1a, 0x00010255},
187*4882a593Smuzhiyun 	{0x1b, 0x00060a00}, {0x1c, 0x000fc378},
188*4882a593Smuzhiyun 	{0x1d, 0x000a1250}, {0x1e, 0x0004445f},
189*4882a593Smuzhiyun 	{0x1f, 0x00080001}, {0x20, 0x0000b614},
190*4882a593Smuzhiyun 	{0x21, 0x0006c000}, {0x22, 0x00000000},
191*4882a593Smuzhiyun 	{0x23, 0x00001558}, {0x24, 0x00000060},
192*4882a593Smuzhiyun 	{0x25, 0x00000483}, {0x26, 0x0004f000},
193*4882a593Smuzhiyun 	{0x27, 0x000ec7d9}, {0x28, 0x000577c0},
194*4882a593Smuzhiyun 	{0x29, 0x00004783}, {0x2a, 0x00000001},
195*4882a593Smuzhiyun 	{0x2b, 0x00021334}, {0x2a, 0x00000000},
196*4882a593Smuzhiyun 	{0x2b, 0x00000054}, {0x2a, 0x00000001},
197*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x00053333},
198*4882a593Smuzhiyun 	{0x2c, 0x0000000c}, {0x2a, 0x00000002},
199*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x0005b333},
200*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000003},
201*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x00063333},
202*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000004},
203*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x0006b333},
204*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000005},
205*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x00073333},
206*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000006},
207*4882a593Smuzhiyun 	{0x2b, 0x00000709}, {0x2b, 0x0005b333},
208*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000007},
209*4882a593Smuzhiyun 	{0x2b, 0x00000709}, {0x2b, 0x00063333},
210*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000008},
211*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x0004b333},
212*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000009},
213*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x00053333},
214*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000a},
215*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x0005b333},
216*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000b},
217*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x00063333},
218*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000c},
219*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x0006b333},
220*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000d},
221*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x00073333},
222*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000e},
223*4882a593Smuzhiyun 	{0x2b, 0x0000050b}, {0x2b, 0x00066666},
224*4882a593Smuzhiyun 	{0x2c, 0x0000001a}, {0x2a, 0x000e0000},
225*4882a593Smuzhiyun 	{0x10, 0x0004000f}, {0x11, 0x000e31fc},
226*4882a593Smuzhiyun 	{0x10, 0x0006000f}, {0x11, 0x000ff9f8},
227*4882a593Smuzhiyun 	{0x10, 0x0002000f}, {0x11, 0x000203f9},
228*4882a593Smuzhiyun 	{0x10, 0x0003000f}, {0x11, 0x000ff500},
229*4882a593Smuzhiyun 	{0x10, 0x00000000}, {0x11, 0x00000000},
230*4882a593Smuzhiyun 	{0x10, 0x0008000f}, {0x11, 0x0003f100},
231*4882a593Smuzhiyun 	{0x10, 0x0009000f}, {0x11, 0x00023100},
232*4882a593Smuzhiyun 	{0x12, 0x00032000}, {0x12, 0x00071000},
233*4882a593Smuzhiyun 	{0x12, 0x000b0000}, {0x12, 0x000fc000},
234*4882a593Smuzhiyun 	{0x13, 0x000287b3}, {0x13, 0x000244b7},
235*4882a593Smuzhiyun 	{0x13, 0x000204ab}, {0x13, 0x0001c49f},
236*4882a593Smuzhiyun 	{0x13, 0x00018493}, {0x13, 0x0001429b},
237*4882a593Smuzhiyun 	{0x13, 0x00010299}, {0x13, 0x0000c29c},
238*4882a593Smuzhiyun 	{0x13, 0x000081a0}, {0x13, 0x000040ac},
239*4882a593Smuzhiyun 	{0x13, 0x00000020}, {0x14, 0x0001944c},
240*4882a593Smuzhiyun 	{0x14, 0x00059444}, {0x14, 0x0009944c},
241*4882a593Smuzhiyun 	{0x14, 0x000d9444}, {0x15, 0x0000f405},
242*4882a593Smuzhiyun 	{0x15, 0x0004f405}, {0x15, 0x0008f405},
243*4882a593Smuzhiyun 	{0x15, 0x000cf405}, {0x16, 0x000e0330},
244*4882a593Smuzhiyun 	{0x16, 0x000a0330}, {0x16, 0x00060330},
245*4882a593Smuzhiyun 	{0x16, 0x00020330}, {0x00, 0x00010159},
246*4882a593Smuzhiyun 	{0x18, 0x0000f401}, {0xfe, 0x00000000},
247*4882a593Smuzhiyun 	{0xfe, 0x00000000}, {0x1f, 0x00080003},
248*4882a593Smuzhiyun 	{0xfe, 0x00000000}, {0xfe, 0x00000000},
249*4882a593Smuzhiyun 	{0x1e, 0x00044457}, {0x1f, 0x00080000},
250*4882a593Smuzhiyun 	{0x00, 0x00030159},
251*4882a593Smuzhiyun 	{0xff, 0xffffffff}
252*4882a593Smuzhiyun };
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun static struct rtl8xxxu_rfregval rtl8188ru_radioa_1t_highpa_table[] = {
255*4882a593Smuzhiyun 	{0x00, 0x00030159}, {0x01, 0x00031284},
256*4882a593Smuzhiyun 	{0x02, 0x00098000}, {0x03, 0x00018c63},
257*4882a593Smuzhiyun 	{0x04, 0x000210e7}, {0x09, 0x0002044f},
258*4882a593Smuzhiyun 	{0x0a, 0x0001adb0}, {0x0b, 0x00054867},
259*4882a593Smuzhiyun 	{0x0c, 0x0008992e}, {0x0d, 0x0000e529},
260*4882a593Smuzhiyun 	{0x0e, 0x00039ce7}, {0x0f, 0x00000451},
261*4882a593Smuzhiyun 	{0x19, 0x00000000}, {0x1a, 0x00000255},
262*4882a593Smuzhiyun 	{0x1b, 0x00060a00}, {0x1c, 0x000fc378},
263*4882a593Smuzhiyun 	{0x1d, 0x000a1250}, {0x1e, 0x0004445f},
264*4882a593Smuzhiyun 	{0x1f, 0x00080001}, {0x20, 0x0000b614},
265*4882a593Smuzhiyun 	{0x21, 0x0006c000}, {0x22, 0x0000083c},
266*4882a593Smuzhiyun 	{0x23, 0x00001558}, {0x24, 0x00000060},
267*4882a593Smuzhiyun 	{0x25, 0x00000483}, {0x26, 0x0004f000},
268*4882a593Smuzhiyun 	{0x27, 0x000ec7d9}, {0x28, 0x000977c0},
269*4882a593Smuzhiyun 	{0x29, 0x00004783}, {0x2a, 0x00000001},
270*4882a593Smuzhiyun 	{0x2b, 0x00021334}, {0x2a, 0x00000000},
271*4882a593Smuzhiyun 	{0x2b, 0x00000054}, {0x2a, 0x00000001},
272*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x00053333},
273*4882a593Smuzhiyun 	{0x2c, 0x0000000c}, {0x2a, 0x00000002},
274*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x0005b333},
275*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000003},
276*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x00063333},
277*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000004},
278*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x0006b333},
279*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000005},
280*4882a593Smuzhiyun 	{0x2b, 0x00000808}, {0x2b, 0x00073333},
281*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000006},
282*4882a593Smuzhiyun 	{0x2b, 0x00000709}, {0x2b, 0x0005b333},
283*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000007},
284*4882a593Smuzhiyun 	{0x2b, 0x00000709}, {0x2b, 0x00063333},
285*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000008},
286*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x0004b333},
287*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x00000009},
288*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x00053333},
289*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000a},
290*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x0005b333},
291*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000b},
292*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x00063333},
293*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000c},
294*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x0006b333},
295*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000d},
296*4882a593Smuzhiyun 	{0x2b, 0x0000060a}, {0x2b, 0x00073333},
297*4882a593Smuzhiyun 	{0x2c, 0x0000000d}, {0x2a, 0x0000000e},
298*4882a593Smuzhiyun 	{0x2b, 0x0000050b}, {0x2b, 0x00066666},
299*4882a593Smuzhiyun 	{0x2c, 0x0000001a}, {0x2a, 0x000e0000},
300*4882a593Smuzhiyun 	{0x10, 0x0004000f}, {0x11, 0x000e31fc},
301*4882a593Smuzhiyun 	{0x10, 0x0006000f}, {0x11, 0x000ff9f8},
302*4882a593Smuzhiyun 	{0x10, 0x0002000f}, {0x11, 0x000203f9},
303*4882a593Smuzhiyun 	{0x10, 0x0003000f}, {0x11, 0x000ff500},
304*4882a593Smuzhiyun 	{0x10, 0x00000000}, {0x11, 0x00000000},
305*4882a593Smuzhiyun 	{0x10, 0x0008000f}, {0x11, 0x0003f100},
306*4882a593Smuzhiyun 	{0x10, 0x0009000f}, {0x11, 0x00023100},
307*4882a593Smuzhiyun 	{0x12, 0x000d8000}, {0x12, 0x00090000},
308*4882a593Smuzhiyun 	{0x12, 0x00051000}, {0x12, 0x00012000},
309*4882a593Smuzhiyun 	{0x13, 0x00028fb4}, {0x13, 0x00024fa8},
310*4882a593Smuzhiyun 	{0x13, 0x000207a4}, {0x13, 0x0001c3b0},
311*4882a593Smuzhiyun 	{0x13, 0x000183a4}, {0x13, 0x00014398},
312*4882a593Smuzhiyun 	{0x13, 0x000101a4}, {0x13, 0x0000c198},
313*4882a593Smuzhiyun 	{0x13, 0x000080a4}, {0x13, 0x00004098},
314*4882a593Smuzhiyun 	{0x13, 0x00000000}, {0x14, 0x0001944c},
315*4882a593Smuzhiyun 	{0x14, 0x00059444}, {0x14, 0x0009944c},
316*4882a593Smuzhiyun 	{0x14, 0x000d9444}, {0x15, 0x0000f405},
317*4882a593Smuzhiyun 	{0x15, 0x0004f405}, {0x15, 0x0008f405},
318*4882a593Smuzhiyun 	{0x15, 0x000cf405}, {0x16, 0x000e0330},
319*4882a593Smuzhiyun 	{0x16, 0x000a0330}, {0x16, 0x00060330},
320*4882a593Smuzhiyun 	{0x16, 0x00020330}, {0x00, 0x00010159},
321*4882a593Smuzhiyun 	{0x18, 0x0000f401}, {0xfe, 0x00000000},
322*4882a593Smuzhiyun 	{0xfe, 0x00000000}, {0x1f, 0x00080003},
323*4882a593Smuzhiyun 	{0xfe, 0x00000000}, {0xfe, 0x00000000},
324*4882a593Smuzhiyun 	{0x1e, 0x00044457}, {0x1f, 0x00080000},
325*4882a593Smuzhiyun 	{0x00, 0x00030159},
326*4882a593Smuzhiyun 	{0xff, 0xffffffff}
327*4882a593Smuzhiyun };
328*4882a593Smuzhiyun 
rtl8192cu_load_firmware(struct rtl8xxxu_priv * priv)329*4882a593Smuzhiyun static int rtl8192cu_load_firmware(struct rtl8xxxu_priv *priv)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun 	char *fw_name;
332*4882a593Smuzhiyun 	int ret;
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	if (!priv->vendor_umc)
335*4882a593Smuzhiyun 		fw_name = "rtlwifi/rtl8192cufw_TMSC.bin";
336*4882a593Smuzhiyun 	else if (priv->chip_cut || priv->rtl_chip == RTL8192C)
337*4882a593Smuzhiyun 		fw_name = "rtlwifi/rtl8192cufw_B.bin";
338*4882a593Smuzhiyun 	else
339*4882a593Smuzhiyun 		fw_name = "rtlwifi/rtl8192cufw_A.bin";
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	ret = rtl8xxxu_load_firmware(priv, fw_name);
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	return ret;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun 
rtl8192cu_parse_efuse(struct rtl8xxxu_priv * priv)346*4882a593Smuzhiyun static int rtl8192cu_parse_efuse(struct rtl8xxxu_priv *priv)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun 	struct rtl8192cu_efuse *efuse = &priv->efuse_wifi.efuse8192;
349*4882a593Smuzhiyun 	int i;
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	if (efuse->rtl_id != cpu_to_le16(0x8129))
352*4882a593Smuzhiyun 		return -EINVAL;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	ether_addr_copy(priv->mac_addr, efuse->mac_addr);
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	memcpy(priv->cck_tx_power_index_A,
357*4882a593Smuzhiyun 	       efuse->cck_tx_power_index_A,
358*4882a593Smuzhiyun 	       sizeof(efuse->cck_tx_power_index_A));
359*4882a593Smuzhiyun 	memcpy(priv->cck_tx_power_index_B,
360*4882a593Smuzhiyun 	       efuse->cck_tx_power_index_B,
361*4882a593Smuzhiyun 	       sizeof(efuse->cck_tx_power_index_B));
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	memcpy(priv->ht40_1s_tx_power_index_A,
364*4882a593Smuzhiyun 	       efuse->ht40_1s_tx_power_index_A,
365*4882a593Smuzhiyun 	       sizeof(efuse->ht40_1s_tx_power_index_A));
366*4882a593Smuzhiyun 	memcpy(priv->ht40_1s_tx_power_index_B,
367*4882a593Smuzhiyun 	       efuse->ht40_1s_tx_power_index_B,
368*4882a593Smuzhiyun 	       sizeof(efuse->ht40_1s_tx_power_index_B));
369*4882a593Smuzhiyun 	memcpy(priv->ht40_2s_tx_power_index_diff,
370*4882a593Smuzhiyun 	       efuse->ht40_2s_tx_power_index_diff,
371*4882a593Smuzhiyun 	       sizeof(efuse->ht40_2s_tx_power_index_diff));
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	memcpy(priv->ht20_tx_power_index_diff,
374*4882a593Smuzhiyun 	       efuse->ht20_tx_power_index_diff,
375*4882a593Smuzhiyun 	       sizeof(efuse->ht20_tx_power_index_diff));
376*4882a593Smuzhiyun 	memcpy(priv->ofdm_tx_power_index_diff,
377*4882a593Smuzhiyun 	       efuse->ofdm_tx_power_index_diff,
378*4882a593Smuzhiyun 	       sizeof(efuse->ofdm_tx_power_index_diff));
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	memcpy(priv->ht40_max_power_offset,
381*4882a593Smuzhiyun 	       efuse->ht40_max_power_offset,
382*4882a593Smuzhiyun 	       sizeof(efuse->ht40_max_power_offset));
383*4882a593Smuzhiyun 	memcpy(priv->ht20_max_power_offset,
384*4882a593Smuzhiyun 	       efuse->ht20_max_power_offset,
385*4882a593Smuzhiyun 	       sizeof(efuse->ht20_max_power_offset));
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 	dev_info(&priv->udev->dev, "Vendor: %.7s\n",
388*4882a593Smuzhiyun 		 efuse->vendor_name);
389*4882a593Smuzhiyun 	dev_info(&priv->udev->dev, "Product: %.20s\n",
390*4882a593Smuzhiyun 		 efuse->device_name);
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	priv->power_base = &rtl8192c_power_base;
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	if (efuse->rf_regulatory & 0x20) {
395*4882a593Smuzhiyun 		sprintf(priv->chip_name, "8188RU");
396*4882a593Smuzhiyun 		priv->rtl_chip = RTL8188R;
397*4882a593Smuzhiyun 		priv->hi_pa = 1;
398*4882a593Smuzhiyun 		priv->no_pape = 1;
399*4882a593Smuzhiyun 		priv->power_base = &rtl8188r_power_base;
400*4882a593Smuzhiyun 	}
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	if (rtl8xxxu_debug & RTL8XXXU_DEBUG_EFUSE) {
403*4882a593Smuzhiyun 		unsigned char *raw = priv->efuse_wifi.raw;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 		dev_info(&priv->udev->dev,
406*4882a593Smuzhiyun 			 "%s: dumping efuse (0x%02zx bytes):\n",
407*4882a593Smuzhiyun 			 __func__, sizeof(struct rtl8192cu_efuse));
408*4882a593Smuzhiyun 		for (i = 0; i < sizeof(struct rtl8192cu_efuse); i += 8)
409*4882a593Smuzhiyun 			dev_info(&priv->udev->dev, "%02x: %8ph\n", i, &raw[i]);
410*4882a593Smuzhiyun 	}
411*4882a593Smuzhiyun 	return 0;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun 
rtl8192cu_init_phy_rf(struct rtl8xxxu_priv * priv)414*4882a593Smuzhiyun static int rtl8192cu_init_phy_rf(struct rtl8xxxu_priv *priv)
415*4882a593Smuzhiyun {
416*4882a593Smuzhiyun 	struct rtl8xxxu_rfregval *rftable;
417*4882a593Smuzhiyun 	int ret;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	if (priv->rtl_chip == RTL8188R) {
420*4882a593Smuzhiyun 		rftable = rtl8188ru_radioa_1t_highpa_table;
421*4882a593Smuzhiyun 		ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A);
422*4882a593Smuzhiyun 	} else if (priv->rf_paths == 1) {
423*4882a593Smuzhiyun 		rftable = rtl8192cu_radioa_1t_init_table;
424*4882a593Smuzhiyun 		ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A);
425*4882a593Smuzhiyun 	} else {
426*4882a593Smuzhiyun 		rftable = rtl8192cu_radioa_2t_init_table;
427*4882a593Smuzhiyun 		ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A);
428*4882a593Smuzhiyun 		if (ret)
429*4882a593Smuzhiyun 			goto exit;
430*4882a593Smuzhiyun 		rftable = rtl8192cu_radiob_2t_init_table;
431*4882a593Smuzhiyun 		ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_B);
432*4882a593Smuzhiyun 	}
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun exit:
435*4882a593Smuzhiyun 	return ret;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun 
rtl8192cu_power_on(struct rtl8xxxu_priv * priv)438*4882a593Smuzhiyun static int rtl8192cu_power_on(struct rtl8xxxu_priv *priv)
439*4882a593Smuzhiyun {
440*4882a593Smuzhiyun 	u8 val8;
441*4882a593Smuzhiyun 	u16 val16;
442*4882a593Smuzhiyun 	u32 val32;
443*4882a593Smuzhiyun 	int i;
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	for (i = 100; i; i--) {
446*4882a593Smuzhiyun 		val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO);
447*4882a593Smuzhiyun 		if (val8 & APS_FSMCO_PFM_ALDN)
448*4882a593Smuzhiyun 			break;
449*4882a593Smuzhiyun 	}
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	if (!i) {
452*4882a593Smuzhiyun 		pr_info("%s: Poll failed\n", __func__);
453*4882a593Smuzhiyun 		return -ENODEV;
454*4882a593Smuzhiyun 	}
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	/*
457*4882a593Smuzhiyun 	 * RSV_CTRL 0x001C[7:0] = 0x00, unlock ISO/CLK/Power control register
458*4882a593Smuzhiyun 	 */
459*4882a593Smuzhiyun 	rtl8xxxu_write8(priv, REG_RSV_CTRL, 0x0);
460*4882a593Smuzhiyun 	rtl8xxxu_write8(priv, REG_SPS0_CTRL, 0x2b);
461*4882a593Smuzhiyun 	udelay(100);
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 	val8 = rtl8xxxu_read8(priv, REG_LDOV12D_CTRL);
464*4882a593Smuzhiyun 	if (!(val8 & LDOV12D_ENABLE)) {
465*4882a593Smuzhiyun 		pr_info("%s: Enabling LDOV12D (%02x)\n", __func__, val8);
466*4882a593Smuzhiyun 		val8 |= LDOV12D_ENABLE;
467*4882a593Smuzhiyun 		rtl8xxxu_write8(priv, REG_LDOV12D_CTRL, val8);
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 		udelay(100);
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 		val8 = rtl8xxxu_read8(priv, REG_SYS_ISO_CTRL);
472*4882a593Smuzhiyun 		val8 &= ~SYS_ISO_MD2PP;
473*4882a593Smuzhiyun 		rtl8xxxu_write8(priv, REG_SYS_ISO_CTRL, val8);
474*4882a593Smuzhiyun 	}
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	/*
477*4882a593Smuzhiyun 	 * Auto enable WLAN
478*4882a593Smuzhiyun 	 */
479*4882a593Smuzhiyun 	val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO);
480*4882a593Smuzhiyun 	val16 |= APS_FSMCO_MAC_ENABLE;
481*4882a593Smuzhiyun 	rtl8xxxu_write16(priv, REG_APS_FSMCO, val16);
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	for (i = 1000; i; i--) {
484*4882a593Smuzhiyun 		val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO);
485*4882a593Smuzhiyun 		if (!(val16 & APS_FSMCO_MAC_ENABLE))
486*4882a593Smuzhiyun 			break;
487*4882a593Smuzhiyun 	}
488*4882a593Smuzhiyun 	if (!i) {
489*4882a593Smuzhiyun 		pr_info("%s: FSMCO_MAC_ENABLE poll failed\n", __func__);
490*4882a593Smuzhiyun 		return -EBUSY;
491*4882a593Smuzhiyun 	}
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	/*
494*4882a593Smuzhiyun 	 * Enable radio, GPIO, LED
495*4882a593Smuzhiyun 	 */
496*4882a593Smuzhiyun 	val16 = APS_FSMCO_HW_SUSPEND | APS_FSMCO_ENABLE_POWERDOWN |
497*4882a593Smuzhiyun 		APS_FSMCO_PFM_ALDN;
498*4882a593Smuzhiyun 	rtl8xxxu_write16(priv, REG_APS_FSMCO, val16);
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun 	/*
501*4882a593Smuzhiyun 	 * Release RF digital isolation
502*4882a593Smuzhiyun 	 */
503*4882a593Smuzhiyun 	val16 = rtl8xxxu_read16(priv, REG_SYS_ISO_CTRL);
504*4882a593Smuzhiyun 	val16 &= ~SYS_ISO_DIOR;
505*4882a593Smuzhiyun 	rtl8xxxu_write16(priv, REG_SYS_ISO_CTRL, val16);
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	val8 = rtl8xxxu_read8(priv, REG_APSD_CTRL);
508*4882a593Smuzhiyun 	val8 &= ~APSD_CTRL_OFF;
509*4882a593Smuzhiyun 	rtl8xxxu_write8(priv, REG_APSD_CTRL, val8);
510*4882a593Smuzhiyun 	for (i = 200; i; i--) {
511*4882a593Smuzhiyun 		val8 = rtl8xxxu_read8(priv, REG_APSD_CTRL);
512*4882a593Smuzhiyun 		if (!(val8 & APSD_CTRL_OFF_STATUS))
513*4882a593Smuzhiyun 			break;
514*4882a593Smuzhiyun 	}
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	if (!i) {
517*4882a593Smuzhiyun 		pr_info("%s: APSD_CTRL poll failed\n", __func__);
518*4882a593Smuzhiyun 		return -EBUSY;
519*4882a593Smuzhiyun 	}
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	/*
522*4882a593Smuzhiyun 	 * Enable MAC DMA/WMAC/SCHEDULE/SEC block
523*4882a593Smuzhiyun 	 */
524*4882a593Smuzhiyun 	val16 = rtl8xxxu_read16(priv, REG_CR);
525*4882a593Smuzhiyun 	val16 |= CR_HCI_TXDMA_ENABLE | CR_HCI_RXDMA_ENABLE |
526*4882a593Smuzhiyun 		CR_TXDMA_ENABLE | CR_RXDMA_ENABLE | CR_PROTOCOL_ENABLE |
527*4882a593Smuzhiyun 		CR_SCHEDULE_ENABLE | CR_MAC_TX_ENABLE | CR_MAC_RX_ENABLE;
528*4882a593Smuzhiyun 	rtl8xxxu_write16(priv, REG_CR, val16);
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun 	rtl8xxxu_write8(priv, 0xfe10, 0x19);
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	/*
533*4882a593Smuzhiyun 	 * Workaround for 8188RU LNA power leakage problem.
534*4882a593Smuzhiyun 	 */
535*4882a593Smuzhiyun 	if (priv->rtl_chip == RTL8188R) {
536*4882a593Smuzhiyun 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_XCD_RF_PARM);
537*4882a593Smuzhiyun 		val32 &= ~BIT(1);
538*4882a593Smuzhiyun 		rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_PARM, val32);
539*4882a593Smuzhiyun 	}
540*4882a593Smuzhiyun 	return 0;
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun struct rtl8xxxu_fileops rtl8192cu_fops = {
544*4882a593Smuzhiyun 	.parse_efuse = rtl8192cu_parse_efuse,
545*4882a593Smuzhiyun 	.load_firmware = rtl8192cu_load_firmware,
546*4882a593Smuzhiyun 	.power_on = rtl8192cu_power_on,
547*4882a593Smuzhiyun 	.power_off = rtl8xxxu_power_off,
548*4882a593Smuzhiyun 	.reset_8051 = rtl8xxxu_reset_8051,
549*4882a593Smuzhiyun 	.llt_init = rtl8xxxu_init_llt_table,
550*4882a593Smuzhiyun 	.init_phy_bb = rtl8xxxu_gen1_init_phy_bb,
551*4882a593Smuzhiyun 	.init_phy_rf = rtl8192cu_init_phy_rf,
552*4882a593Smuzhiyun 	.phy_iq_calibrate = rtl8xxxu_gen1_phy_iq_calibrate,
553*4882a593Smuzhiyun 	.config_channel = rtl8xxxu_gen1_config_channel,
554*4882a593Smuzhiyun 	.parse_rx_desc = rtl8xxxu_parse_rxdesc16,
555*4882a593Smuzhiyun 	.init_aggregation = rtl8xxxu_gen1_init_aggregation,
556*4882a593Smuzhiyun 	.enable_rf = rtl8xxxu_gen1_enable_rf,
557*4882a593Smuzhiyun 	.disable_rf = rtl8xxxu_gen1_disable_rf,
558*4882a593Smuzhiyun 	.usb_quirks = rtl8xxxu_gen1_usb_quirks,
559*4882a593Smuzhiyun 	.set_tx_power = rtl8xxxu_gen1_set_tx_power,
560*4882a593Smuzhiyun 	.update_rate_mask = rtl8xxxu_update_rate_mask,
561*4882a593Smuzhiyun 	.report_connect = rtl8xxxu_gen1_report_connect,
562*4882a593Smuzhiyun 	.fill_txdesc = rtl8xxxu_fill_txdesc_v1,
563*4882a593Smuzhiyun 	.writeN_block_size = 128,
564*4882a593Smuzhiyun 	.rx_agg_buf_size = 16000,
565*4882a593Smuzhiyun 	.tx_desc_size = sizeof(struct rtl8xxxu_txdesc32),
566*4882a593Smuzhiyun 	.rx_desc_size = sizeof(struct rtl8xxxu_rxdesc16),
567*4882a593Smuzhiyun 	.adda_1t_init = 0x0b1b25a0,
568*4882a593Smuzhiyun 	.adda_1t_path_on = 0x0bdb25a0,
569*4882a593Smuzhiyun 	.adda_2t_path_on_a = 0x04db25a4,
570*4882a593Smuzhiyun 	.adda_2t_path_on_b = 0x0b1b25a4,
571*4882a593Smuzhiyun 	.trxff_boundary = 0x27ff,
572*4882a593Smuzhiyun 	.pbp_rx = PBP_PAGE_SIZE_128,
573*4882a593Smuzhiyun 	.pbp_tx = PBP_PAGE_SIZE_128,
574*4882a593Smuzhiyun 	.mactable = rtl8xxxu_gen1_mac_init_table,
575*4882a593Smuzhiyun 	.total_page_num = TX_TOTAL_PAGE_NUM,
576*4882a593Smuzhiyun 	.page_num_hi = TX_PAGE_NUM_HI_PQ,
577*4882a593Smuzhiyun 	.page_num_lo = TX_PAGE_NUM_LO_PQ,
578*4882a593Smuzhiyun 	.page_num_norm = TX_PAGE_NUM_NORM_PQ,
579*4882a593Smuzhiyun };
580*4882a593Smuzhiyun #endif
581