1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * RK628 eFuse Driver
4 *
5 * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
6 *
7 * Author: Weixin Zhou <zwx@rock-chips.com>
8 */
9
10 #include <linux/clk.h>
11 #include <linux/clk-provider.h>
12 #include <linux/delay.h>
13 #include <linux/device.h>
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/nvmem-provider.h>
17 #include <linux/slab.h>
18 #include <linux/gpio/consumer.h>
19 #include <linux/of.h>
20 #include <linux/of_platform.h>
21 #include <linux/platform_device.h>
22 #include <linux/regmap.h>
23 #include <linux/mfd/rk628.h>
24
25 #define EFUSE_SIZE 64
26
27 #define T_CSB_P_S 0
28 #define T_PGENB_P_S (15 + 200)
29 #define T_LOAD_P_S 0
30 #define T_ADDR_P_S (15 + 200 + 5)
31 #define T_STROBE_P_S ((150 + 2000 + 100) / 9)
32 #define T_CSB_P_L 0
33 #define T_PGENB_P_L (15 + 200 + 10 + 200 + 190 + 10)
34 #define T_LOAD_P_L (15 + 200 + 200 + 190 + 10 + 100 + 15)
35 #define T_ADDR_P_L (15 + 200 + 5 + 200 + 5)
36 #define T_STROBE_P_L ((150 + 2000 + 100 + 2000) / 9)
37 #define T_CSB_R_S 0
38 #define T_PGENB_R_S 0
39 #define T_LOAD_R_S 15
40 #define T_ADDR_R_S (15 + 9)
41 #define T_STROBE_R_S ((150 + 100) / 9)
42 #define T_CSB_R_L 0
43 #define T_PGENB_R_L 0
44 #define T_LOAD_R_L (15 + 5 + 5 + 10 + 15)
45 #define T_ADDR_R_L (15 + 10 + 5 + 1)
46 #define T_STROBE_R_L ((150 + 100 + 50) / 8)
47
48 #define T_CSB_P 0x28
49 #define T_PGENB_P 0x2c
50 #define T_LOAD_P 0x30
51 #define T_ADDR_P 0x34
52 #define T_STROBE_P 0x38
53 #define T_CSB_R 0x3c
54 #define T_PGENB_R 0x40
55 #define T_LOAD_R 0x44
56 #define T_ADDR_R 0x48
57 #define T_STROBE_R 0x4c
58 #define EFUSE_REVISION 0x50
59
60 #define RK628_EFUSE_BASE 0xb0000
61 #define RK628_MOD 0x00
62 #define RK628_INT_STATUS 0x0018
63 #define RK628_DOUT 0x0020
64 #define RK628_AUTO_CTRL 0x0024
65 #define RK628_USER_MODE BIT(0)
66 #define RK628_INT_FINISH BIT(0)
67 #define RK628_AUTO_ENB BIT(0)
68 #define RK628_AUTO_RD BIT(1)
69 #define RK628_ADDR_ROW 16
70 #define RK628_ADDR_COL 22
71 #define RK628_A_SHIFT 16
72 #define RK628_A_MASK 0x3ff
73 #define RK628_NBYTES 1
74
75 #define REG_EFUSE_CTRL 0x0000
76 #define REG_EFUSE_DOUT 0x0004
77
78 struct rk628_efuse_chip {
79 struct device *dev;
80 u32 base;
81 struct clk *clk;
82 struct regmap *regmap;
83 struct gpio_desc *avdd_gpio;
84 };
85
rk628_read(struct regmap * regmap,u32 reg)86 static int rk628_read(struct regmap *regmap, u32 reg)
87 {
88 int ret;
89 u32 val;
90 struct rk628_efuse_chip *efuse = container_of(regmap, struct rk628_efuse_chip, regmap);
91
92 ret = regmap_read(regmap, reg, &val);
93 if (ret) {
94 dev_err(efuse->dev, "rk628-efuse:failed to read reg 0x%x\n", reg);
95 return ret;
96 }
97
98 return val;
99 }
100
rk628_write(struct regmap * regmap,u32 val,u32 reg)101 static int rk628_write(struct regmap *regmap, u32 val, u32 reg)
102 {
103 int ret;
104 struct rk628_efuse_chip *efuse = container_of(regmap, struct rk628_efuse_chip, regmap);
105
106 ret = regmap_write(regmap, reg, val);
107 if (ret)
108 dev_err(efuse->dev, "rk628-efuse:failed to write reg 0x%x\n", reg);
109
110 return ret;
111 }
112
rk628_efuse_timing_init(struct rk628_efuse_chip * efuse)113 static void rk628_efuse_timing_init(struct rk628_efuse_chip *efuse)
114 {
115 u32 base = efuse->base;
116 /* enable auto mode */
117 rk628_write(efuse->regmap,
118 rk628_read(efuse->regmap, base + RK628_MOD) & (~RK628_USER_MODE),
119 base + RK628_MOD);
120
121 /* setup efuse timing */
122 rk628_write(efuse->regmap, (T_CSB_P_S << 16) | T_CSB_P_L, base + T_CSB_P);
123 rk628_write(efuse->regmap, (T_PGENB_P_S << 16) | T_PGENB_P_L, base + T_PGENB_P);
124 rk628_write(efuse->regmap, (T_LOAD_P_S << 16) | T_LOAD_P_L, base + T_LOAD_P);
125 rk628_write(efuse->regmap, (T_ADDR_P_S << 16) | T_ADDR_P_L, base + T_ADDR_P);
126 rk628_write(efuse->regmap, (T_STROBE_P_S << 16) | T_STROBE_P_L, base + T_STROBE_P);
127 rk628_write(efuse->regmap, (T_CSB_R_S << 16) | T_CSB_R_L, base + T_CSB_R);
128 rk628_write(efuse->regmap, (T_PGENB_R_S << 16) | T_PGENB_R_L, base + T_PGENB_R);
129 rk628_write(efuse->regmap, (T_LOAD_R_S << 16) | T_LOAD_R_L, base + T_LOAD_R);
130 rk628_write(efuse->regmap, (T_ADDR_R_S << 16) | T_ADDR_R_L, base + T_ADDR_R);
131 rk628_write(efuse->regmap, (T_STROBE_R_S << 16) | T_STROBE_R_L, base + T_STROBE_R);
132 }
133
rk628_efuse_timing_deinit(struct rk628_efuse_chip * efuse)134 static void rk628_efuse_timing_deinit(struct rk628_efuse_chip *efuse)
135 {
136 u32 base = efuse->base;
137 /* disable auto mode */
138 rk628_write(efuse->regmap,
139 rk628_read(efuse->regmap, base + RK628_MOD) | RK628_USER_MODE, base + RK628_MOD);
140
141 /* clear efuse timing */
142 rk628_write(efuse->regmap, 0, base + T_CSB_P);
143 rk628_write(efuse->regmap, 0, base + T_PGENB_P);
144 rk628_write(efuse->regmap, 0, base + T_LOAD_P);
145 rk628_write(efuse->regmap, 0, base + T_ADDR_P);
146 rk628_write(efuse->regmap, 0, base + T_STROBE_P);
147 rk628_write(efuse->regmap, 0, base + T_CSB_R);
148 rk628_write(efuse->regmap, 0, base + T_PGENB_R);
149 rk628_write(efuse->regmap, 0, base + T_LOAD_R);
150 rk628_write(efuse->regmap, 0, base + T_ADDR_R);
151 rk628_write(efuse->regmap, 0, base + T_STROBE_R);
152 }
153
rk628_efuse_read(void * context,unsigned int offset,void * val,size_t bytes)154 static int rk628_efuse_read(void *context, unsigned int offset,
155 void *val, size_t bytes)
156 {
157 struct rk628_efuse_chip *efuse = context;
158 unsigned int addr_start, addr_end, addr_offset, addr_len;
159 u32 out_value, status;
160 u8 *buf;
161 int ret, i = 0;
162
163 ret = clk_prepare_enable(efuse->clk);
164 if (ret < 0) {
165 dev_err(efuse->dev, "failed to prepare/enable efuse pclk\n");
166 return ret;
167 }
168
169 addr_start = rounddown(offset, RK628_NBYTES) / RK628_NBYTES;
170 addr_end = roundup(offset + bytes, RK628_NBYTES) / RK628_NBYTES;
171 addr_offset = offset % RK628_NBYTES;
172 addr_len = addr_end - addr_start;
173
174 buf = kzalloc(sizeof(*buf) * addr_len * RK628_NBYTES, GFP_KERNEL);
175 if (!buf) {
176 ret = -ENOMEM;
177 goto nomem;
178 }
179
180 rk628_efuse_timing_init(efuse);
181
182 while (addr_len--) {
183 rk628_write(efuse->regmap, RK628_AUTO_RD | RK628_AUTO_ENB |
184 ((addr_start++ & RK628_A_MASK) << RK628_A_SHIFT),
185 efuse->base + RK628_AUTO_CTRL);
186 udelay(2);
187 status = rk628_read(efuse->regmap, efuse->base + RK628_INT_STATUS);
188 if (!(status & RK628_INT_FINISH)) {
189 ret = -EIO;
190 goto err;
191 }
192 out_value = rk628_read(efuse->regmap, efuse->base + RK628_DOUT);
193 rk628_write(efuse->regmap, RK628_INT_FINISH, efuse->base + RK628_INT_STATUS);
194
195 memcpy(&buf[i], &out_value, RK628_NBYTES);
196 i += RK628_NBYTES;
197 }
198 memcpy(val, buf + addr_offset, bytes);
199 err:
200 rk628_efuse_timing_deinit(efuse);
201 kfree(buf);
202 nomem:
203 clk_disable_unprepare(efuse->clk);
204
205 return ret;
206 }
207
208 static struct nvmem_config econfig = {
209 .name = "rk628-efuse",
210 .owner = THIS_MODULE,
211 .stride = 1,
212 .word_size = 1,
213 .read_only = true,
214 };
215
216 static const struct regmap_range rk628_efuse_readable_ranges[] = {
217 regmap_reg_range(RK628_EFUSE_BASE, RK628_EFUSE_BASE + EFUSE_REVISION),
218 };
219
220 static const struct regmap_access_table rk628_efuse_readable_table = {
221 .yes_ranges = rk628_efuse_readable_ranges,
222 .n_yes_ranges = ARRAY_SIZE(rk628_efuse_readable_ranges),
223 };
224
225 static const struct regmap_config rk628_efuse_regmap_config = {
226 .name = "rk628-efuse",
227 .reg_bits = 32,
228 .val_bits = 32,
229 .reg_stride = 4,
230 .max_register = RK628_EFUSE_BASE + EFUSE_REVISION,
231 .reg_format_endian = REGMAP_ENDIAN_LITTLE,
232 .val_format_endian = REGMAP_ENDIAN_LITTLE,
233 .rd_table = &rk628_efuse_readable_table,
234 };
235
236 static const struct of_device_id rk628_efuse_match[] = {
237 {
238 .compatible = "rockchip,rk628-efuse",
239 },
240 { /* sentinel */ },
241 };
242 MODULE_DEVICE_TABLE(of, rk628_efuse_match);
243
rk628_efuse_probe(struct platform_device * pdev)244 static int __init rk628_efuse_probe(struct platform_device *pdev)
245 {
246 struct nvmem_device *nvmem;
247 struct rk628_efuse_chip *efuse;
248 struct device *dev = &pdev->dev;
249 struct rk628 *rk628 = dev_get_drvdata(pdev->dev.parent);
250 int ret;
251
252 efuse = devm_kzalloc(&pdev->dev, sizeof(struct rk628_efuse_chip),
253 GFP_KERNEL);
254 if (!efuse)
255 return -ENOMEM;
256
257 efuse->regmap = devm_regmap_init_i2c(rk628->client,
258 &rk628_efuse_regmap_config);
259 if (IS_ERR(efuse->regmap)) {
260 ret = PTR_ERR(efuse->regmap);
261 dev_err(dev, "failed to allocate register map: %d\n",
262 ret);
263 return ret;
264 }
265
266 efuse->clk = devm_clk_get(&pdev->dev, "pclk");
267 if (IS_ERR(efuse->clk)) {
268 dev_err(dev, "failed to get pclk: %ld\n", PTR_ERR(efuse->clk));
269 return PTR_ERR(efuse->clk);
270 }
271
272 efuse->avdd_gpio = devm_gpiod_get_optional(dev, "efuse", GPIOD_OUT_LOW);
273 efuse->base = RK628_EFUSE_BASE;
274 efuse->dev = &pdev->dev;
275 econfig.size = EFUSE_SIZE;
276 econfig.reg_read = (void *)&rk628_efuse_read;
277 econfig.priv = efuse;
278 econfig.dev = efuse->dev;
279 nvmem = devm_nvmem_register(&econfig);
280 if (IS_ERR(nvmem))
281 return PTR_ERR(nvmem);
282
283 platform_set_drvdata(pdev, nvmem);
284
285 return 0;
286 }
287
288 static struct platform_driver rk628_efuse_driver = {
289 .probe = rk628_efuse_probe,
290 .driver = {
291 .name = "rk628-efuse",
292 .of_match_table = rk628_efuse_match,
293 },
294 };
295
296 module_platform_driver(rk628_efuse_driver);
297
298 MODULE_DESCRIPTION("rk628_efuse driver");
299 MODULE_LICENSE("GPL v2");
300