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Searched refs:cpuclk (Results 1 – 25 of 26) sorted by relevance

12

/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-cpu.c73 struct rockchip_cpuclk *cpuclk, unsigned long rate) in rockchip_get_cpuclk_settings() argument
76 cpuclk->rate_table; in rockchip_get_cpuclk_settings()
79 for (i = 0; i < cpuclk->rate_count; i++) { in rockchip_get_cpuclk_settings()
90 struct rockchip_cpuclk *cpuclk = to_rockchip_cpuclk_hw(hw); in rockchip_cpuclk_recalc_rate() local
91 const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; in rockchip_cpuclk_recalc_rate()
92 u32 clksel0 = readl_relaxed(cpuclk->reg_base + reg_data->core_reg[0]); in rockchip_cpuclk_recalc_rate()
103 static void rockchip_cpuclk_set_dividers(struct rockchip_cpuclk *cpuclk, in rockchip_cpuclk_set_dividers() argument
117 writel(clksel->val, cpuclk->reg_base + clksel->reg); in rockchip_cpuclk_set_dividers()
121 static void rockchip_cpuclk_set_pre_muxs(struct rockchip_cpuclk *cpuclk, in rockchip_cpuclk_set_pre_muxs() argument
135 writel(clksel->val, cpuclk->reg_base + clksel->reg); in rockchip_cpuclk_set_pre_muxs()
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-cpu.c150 struct exynos_cpuclk *cpuclk, void __iomem *base) in exynos_cpuclk_pre_rate_change() argument
152 const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk->cfg; in exynos_cpuclk_pre_rate_change()
153 unsigned long alt_prate = clk_hw_get_rate(cpuclk->alt_parent); in exynos_cpuclk_pre_rate_change()
165 spin_lock_irqsave(cpuclk->lock, flags); in exynos_cpuclk_pre_rate_change()
173 if (cpuclk->flags & CLK_CPU_HAS_DIV1) { in exynos_cpuclk_pre_rate_change()
194 if (cpuclk->flags & CLK_CPU_NEEDS_DEBUG_ALT_DIV) { in exynos_cpuclk_pre_rate_change()
215 if (cpuclk->flags & CLK_CPU_HAS_DIV1) { in exynos_cpuclk_pre_rate_change()
221 spin_unlock_irqrestore(cpuclk->lock, flags); in exynos_cpuclk_pre_rate_change()
227 struct exynos_cpuclk *cpuclk, void __iomem *base) in exynos_cpuclk_post_rate_change() argument
229 const struct exynos_cpuclk_cfg_data *cfg_data = cpuclk->cfg; in exynos_cpuclk_post_rate_change()
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/mvebu/
H A Dclk-cpu.c51 struct cpu_clk *cpuclk = to_cpu_clk(hwclk); in clk_cpu_recalc_rate() local
54 reg = readl(cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_VALUE_OFFSET); in clk_cpu_recalc_rate()
55 div = (reg >> (cpuclk->cpu * 8)) & SYS_CTRL_CLK_DIVIDER_MASK; in clk_cpu_recalc_rate()
78 struct cpu_clk *cpuclk = to_cpu_clk(hwclk); in clk_cpu_off_set_rate() local
83 reg = (readl(cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_VALUE_OFFSET) in clk_cpu_off_set_rate()
84 & (~(SYS_CTRL_CLK_DIVIDER_MASK << (cpuclk->cpu * 8)))) in clk_cpu_off_set_rate()
85 | (div << (cpuclk->cpu * 8)); in clk_cpu_off_set_rate()
86 writel(reg, cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_VALUE_OFFSET); in clk_cpu_off_set_rate()
88 reload_mask = 1 << (20 + cpuclk->cpu); in clk_cpu_off_set_rate()
90 reg = readl(cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET) in clk_cpu_off_set_rate()
[all …]
/OK3568_Linux_fs/kernel/drivers/cpufreq/
H A Dsh-cpufreq.c48 struct clk *cpuclk = &per_cpu(sh_cpuclk, cpu); in __sh_cpufreq_target() local
59 freq = clk_round_rate(cpuclk, target->freq * 1000); in __sh_cpufreq_target()
71 clk_set_rate(cpuclk, freq); in __sh_cpufreq_target()
92 struct clk *cpuclk = &per_cpu(sh_cpuclk, policy->cpu); in sh_cpufreq_verify() local
95 freq_table = cpuclk->nr_freqs ? cpuclk->freq_table : NULL; in sh_cpufreq_verify()
101 policy->min = (clk_round_rate(cpuclk, 1) + 500) / 1000; in sh_cpufreq_verify()
102 policy->max = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000; in sh_cpufreq_verify()
111 struct clk *cpuclk = &per_cpu(sh_cpuclk, cpu); in sh_cpufreq_cpu_init() local
117 cpuclk = clk_get(dev, "cpu_clk"); in sh_cpufreq_cpu_init()
118 if (IS_ERR(cpuclk)) { in sh_cpufreq_cpu_init()
[all …]
/OK3568_Linux_fs/kernel/arch/mips/txx9/generic/
H A Dsetup_tx4939.c101 unsigned int cpuclk = 0; in tx4939_setup() local
122 cpuclk = txx9_master_clock * 20 / 2; in tx4939_setup()
125 cpuclk = cpuclk / 3 * 4 /* / 6 * 8 */; break; in tx4939_setup()
127 cpuclk = cpuclk / 2 * 3 /* / 6 * 9 */; break; in tx4939_setup()
129 cpuclk = cpuclk / 3 * 5 /* / 6 * 10 */; break; in tx4939_setup()
131 cpuclk = cpuclk / 6 * 11; break; in tx4939_setup()
133 cpuclk = cpuclk * 2 /* / 6 * 12 */; break; in tx4939_setup()
135 cpuclk = cpuclk / 6 * 13; break; in tx4939_setup()
137 cpuclk = cpuclk / 3 * 7 /* / 6 * 14 */; break; in tx4939_setup()
139 cpuclk = cpuclk / 2 * 5 /* / 6 * 15 */; break; in tx4939_setup()
[all …]
H A Dsetup_tx4927.c92 unsigned int cpuclk = 0; in tx4927_setup() local
126 cpuclk = txx9_gbus_clock * 2; break; in tx4927_setup()
129 cpuclk = txx9_gbus_clock * 5 / 2; break; in tx4927_setup()
132 cpuclk = txx9_gbus_clock * 3; break; in tx4927_setup()
135 cpuclk = txx9_gbus_clock * 4; break; in tx4927_setup()
137 txx9_cpu_clock = cpuclk; in tx4927_setup()
142 cpuclk = txx9_cpu_clock; in tx4927_setup()
147 txx9_gbus_clock = cpuclk / 2; break; in tx4927_setup()
150 txx9_gbus_clock = cpuclk * 2 / 5; break; in tx4927_setup()
153 txx9_gbus_clock = cpuclk / 3; break; in tx4927_setup()
[all …]
H A Dsetup_tx4938.c97 unsigned int cpuclk = 0; in tx4938_setup() local
132 cpuclk = txx9_gbus_clock * 2; break; in tx4938_setup()
135 cpuclk = txx9_gbus_clock * 5 / 2; break; in tx4938_setup()
138 cpuclk = txx9_gbus_clock * 3; break; in tx4938_setup()
141 cpuclk = txx9_gbus_clock * 4; break; in tx4938_setup()
144 cpuclk = txx9_gbus_clock * 9 / 2; break; in tx4938_setup()
146 txx9_cpu_clock = cpuclk; in tx4938_setup()
151 cpuclk = txx9_cpu_clock; in tx4938_setup()
156 txx9_gbus_clock = cpuclk / 2; break; in tx4938_setup()
159 txx9_gbus_clock = cpuclk * 2 / 5; break; in tx4938_setup()
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/qcom/
H A Dclk-cpu-8996.c208 struct clk_cpu_8996_mux *cpuclk = to_clk_cpu_8996_mux_hw(hw); in clk_cpu_8996_mux_get_parent() local
209 u32 mask = GENMASK(cpuclk->width - 1, 0); in clk_cpu_8996_mux_get_parent()
212 regmap_read(clkr->regmap, cpuclk->reg, &val); in clk_cpu_8996_mux_get_parent()
213 val >>= cpuclk->shift; in clk_cpu_8996_mux_get_parent()
221 struct clk_cpu_8996_mux *cpuclk = to_clk_cpu_8996_mux_hw(hw); in clk_cpu_8996_mux_set_parent() local
222 u32 mask = GENMASK(cpuclk->width + cpuclk->shift - 1, cpuclk->shift); in clk_cpu_8996_mux_set_parent()
226 val <<= cpuclk->shift; in clk_cpu_8996_mux_set_parent()
228 return regmap_update_bits(clkr->regmap, cpuclk->reg, mask, val); in clk_cpu_8996_mux_set_parent()
234 struct clk_cpu_8996_mux *cpuclk = to_clk_cpu_8996_mux_hw(hw); in clk_cpu_8996_mux_determine_rate() local
235 struct clk_hw *parent = cpuclk->pll; in clk_cpu_8996_mux_determine_rate()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dmvebu-core-clock.txt9 1 = cpuclk (CPU clock)
16 1 = cpuclk (CPU clock)
22 1 = cpuclk (CPU clock)
28 1 = cpuclk (CPU clock)
36 1 = cpuclk (CPU clock)
42 1 = cpuclk (CPU0 clock)
48 1 = cpuclk (CPU0 clock)
72 output names ("tclk", "cpuclk", "l2clk", "ddrclk")
H A Dtango4-clock.txt12 - clock-output-names: should be "cpuclk" and "sysclk".
21 clock-output-names = "cpuclk", "sysclk";
H A Dmvebu-cpu-clock.txt12 cpuclk: clock-complex@d0018700 {
22 clocks = <&cpuclk 0>;
/OK3568_Linux_fs/kernel/arch/mips/cavium-octeon/
H A Doct_ilm.c33 u64 cpuclk, avg, max, min; in show_latency() local
36 cpuclk = octeon_get_clock_rate(); in show_latency()
38 max = (curr_li.max_latency * 1000000000) / cpuclk; in show_latency()
39 min = (curr_li.min_latency * 1000000000) / cpuclk; in show_latency()
40 avg = (curr_li.latency_sum * 1000000000) / (cpuclk * curr_li.interrupt_cnt); in show_latency()
/OK3568_Linux_fs/u-boot/arch/mips/mach-ath79/ar934x/
H A Dclk.c264 u32 cpuclk, ddrclk, busclk; in ar934x_update_clock() local
277 cpuclk = ar934x_get_xtal(); in ar934x_update_clock()
279 cpuclk = cpupll; in ar934x_update_clock()
281 cpuclk = ddrpll; in ar934x_update_clock()
304 gd->cpu_clk = cpuclk / (cpudiv + 1); in ar934x_update_clock()
/OK3568_Linux_fs/u-boot/board/aries/m53evk/
H A Dm53evk.c316 uint32_t cpuclk; in m53_set_clock() local
323 cpuclk = gpio_get_value(IMX_GPIO_NR(4, 0)) ? 1200 : 800; in m53_set_clock()
325 ret = mxc_set_clock(ref_clk, cpuclk, MXC_ARM_CLK); in m53_set_clock()
327 printf("CPU: Switch CPU clock to %dMHz failed\n", cpuclk); in m53_set_clock()
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Darmada-xp-mv78460.dtsi35 clocks = <&cpuclk 0>;
43 clocks = <&cpuclk 1>;
51 clocks = <&cpuclk 2>;
59 clocks = <&cpuclk 3>;
H A Darmada-xp-98dx3336.dtsi22 clocks = <&cpuclk 1>;
H A Darmada-xp-98dx4251.dtsi22 clocks = <&cpuclk 1>;
H A Darmada-xp-mv78230.dtsi33 clocks = <&cpuclk 0>;
41 clocks = <&cpuclk 1>;
H A Darmada-xp-98dx3236.dtsi35 clocks = <&cpuclk 0>;
148 cpuclk: clock-complex@18700 { label
H A Darmada-xp-mv78260.dtsi34 clocks = <&cpuclk 0>;
42 clocks = <&cpuclk 1>;
H A Darmada-xp.dtsi102 cpuclk: clock-complex@18700 { label
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Darmada-xp-mv78460.dtsi72 clocks = <&cpuclk 0>;
80 clocks = <&cpuclk 1>;
88 clocks = <&cpuclk 2>;
96 clocks = <&cpuclk 3>;
H A Darmada-xp-mv78230.dtsi70 clocks = <&cpuclk 0>;
78 clocks = <&cpuclk 1>;
H A Darmada-xp-mv78260.dtsi71 clocks = <&cpuclk 0>;
79 clocks = <&cpuclk 1>;
/OK3568_Linux_fs/u-boot/board/inversepath/usbarmory/
H A Dusbarmory.c371 const uint32_t cpuclk = CPU_CLOCK; in set_clock() local
375 ret = mxc_set_clock(ref_clk, cpuclk, MXC_ARM_CLK); in set_clock()
377 printf("CPU: Switch CPU clock to %dMHZ failed\n", cpuclk); in set_clock()

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