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Searched refs:clkin1 (Results 1 – 25 of 26) sorted by relevance

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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Damlogic,meson-gx.txt20 "clkin1" - Other parent clock of internal mux
21 The driver has an internal mux clock which switches between clkin0 and clkin1 depending on the
36 clock-names = "core", "clkin0", "clkin1";
/OK3568_Linux_fs/kernel/arch/c6x/platforms/
H A Dplldata.c27 struct clk clkin1 = { variable
29 .node = LIST_HEAD_INIT(clkin1.node),
30 .children = LIST_HEAD_INIT(clkin1.children),
31 .childnode = LIST_HEAD_INIT(clkin1.childnode),
39 .parent = &clkin1,
441 clkin1.rate = val; in c64x_setup_clocks()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/
H A Dpwm-meson.txt19 - clock-names: Could contain at least the "clkin0" and/or "clkin1" names.
28 clock-names = "clkin0", "clkin1";
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dmdio-mux-meson-g12a.txt14 * "clkin1" : SoC 50MHz MPLL
24 clock-names = "pclk", "clkin0", "clkin1";
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dmeson-gxbb.dtsi104 clock-names = "stmmaceth", "clkin0", "clkin1";
599 clock-names = "core", "clkin0", "clkin1";
606 clock-names = "core", "clkin0", "clkin1";
613 clock-names = "core", "clkin0", "clkin1";
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb.dtsi299 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
780 clock-names = "core", "clkin0", "clkin1";
788 clock-names = "core", "clkin0", "clkin1";
796 clock-names = "core", "clkin0", "clkin1";
H A Dmeson-gxl.dtsi136 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
849 clock-names = "core", "clkin0", "clkin1";
857 clock-names = "core", "clkin0", "clkin1";
865 clock-names = "core", "clkin0", "clkin1";
H A Dmeson-g12b-khadas-vim3.dtsi104 clock-names = "clkin1";
H A Dmeson-sm1-khadas-vim3l.dts69 clock-names = "clkin1";
H A Dmeson-gxl-s905x-khadas-vim.dts175 clock-names = "clkin0", "clkin1" ;
H A Dmeson-g12a-u200.dts250 clock-names = "clkin1";
H A Dmeson-g12-common.dtsi229 clock-names = "stmmaceth", "clkin0", "clkin1",
1714 clock-names = "pclk", "clkin0", "clkin1";
2325 clock-names = "core", "clkin0", "clkin1";
2337 clock-names = "core", "clkin0", "clkin1";
2349 clock-names = "core", "clkin0", "clkin1";
H A Dmeson-g12b-w400.dtsi316 clock-names = "clkin1";
H A Dmeson-axg.dtsi226 clock-names = "stmmaceth", "clkin0", "clkin1",
1762 clock-names = "core", "clkin0", "clkin1";
1774 clock-names = "core", "clkin0", "clkin1";
H A Dmeson-g12a-x96-max.dts331 clock-names = "clkin1";
H A Dmeson-sm1-odroid-c4.dts412 clock-names = "clkin1";
H A Dmeson-g12a-sei510.dts391 clock-names = "clkin1";
H A Dmeson-sm1-sei610.dts445 clock-names = "clkin1";
H A Dmeson-g12b-odroid-n2.dtsi493 clock-names = "clkin1";
/OK3568_Linux_fs/kernel/arch/c6x/include/asm/
H A Dclock.h135 extern struct clk clkin1;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dmeson8m2.dtsi35 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
H A Dmeson8b-mxq.dts171 clock-names = "clkin0", "clkin1";
H A Dmeson8b.dtsi441 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
574 clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk";
H A Dmeson8b-odroidc1.dts369 clock-names = "clkin0", "clkin1";
H A Dmeson8b-ec100.dts406 clock-names = "clkin0", "clkin1";

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