1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2019 BayLibre SAS. All rights reserved. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "meson-g12a.dtsi" 9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 10*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 11*4882a593Smuzhiyun#include <dt-bindings/gpio/meson-g12a-gpio.h> 12*4882a593Smuzhiyun#include <dt-bindings/sound/meson-g12a-tohdmitx.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/ { 15*4882a593Smuzhiyun compatible = "seirobotics,sei510", "amlogic,g12a"; 16*4882a593Smuzhiyun model = "SEI Robotics SEI510"; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun adc_keys { 19*4882a593Smuzhiyun compatible = "adc-keys"; 20*4882a593Smuzhiyun io-channels = <&saradc 0>; 21*4882a593Smuzhiyun io-channel-names = "buttons"; 22*4882a593Smuzhiyun keyup-threshold-microvolt = <1800000>; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun button-onoff { 25*4882a593Smuzhiyun label = "On/Off"; 26*4882a593Smuzhiyun linux,code = <KEY_POWER>; 27*4882a593Smuzhiyun press-threshold-microvolt = <1700000>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun aliases { 32*4882a593Smuzhiyun serial0 = &uart_AO; 33*4882a593Smuzhiyun ethernet0 = ðmac; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun mono_dac: audio-codec-0 { 37*4882a593Smuzhiyun compatible = "maxim,max98357a"; 38*4882a593Smuzhiyun #sound-dai-cells = <0>; 39*4882a593Smuzhiyun sound-name-prefix = "U16"; 40*4882a593Smuzhiyun sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun dmics: audio-codec-1 { 44*4882a593Smuzhiyun #sound-dai-cells = <0>; 45*4882a593Smuzhiyun compatible = "dmic-codec"; 46*4882a593Smuzhiyun num-channels = <2>; 47*4882a593Smuzhiyun wakeup-delay-ms = <50>; 48*4882a593Smuzhiyun status = "okay"; 49*4882a593Smuzhiyun sound-name-prefix = "MIC"; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun chosen { 53*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun cvbs-connector { 57*4882a593Smuzhiyun compatible = "composite-video-connector"; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun port { 60*4882a593Smuzhiyun cvbs_connector_in: endpoint { 61*4882a593Smuzhiyun remote-endpoint = <&cvbs_vdac_out>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun emmc_pwrseq: emmc-pwrseq { 67*4882a593Smuzhiyun compatible = "mmc-pwrseq-emmc"; 68*4882a593Smuzhiyun reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun hdmi-connector { 72*4882a593Smuzhiyun compatible = "hdmi-connector"; 73*4882a593Smuzhiyun type = "a"; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun port { 76*4882a593Smuzhiyun hdmi_connector_in: endpoint { 77*4882a593Smuzhiyun remote-endpoint = <&hdmi_tx_tmds_out>; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun memory@0 { 83*4882a593Smuzhiyun device_type = "memory"; 84*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x40000000>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun ao_5v: regulator-ao_5v { 88*4882a593Smuzhiyun compatible = "regulator-fixed"; 89*4882a593Smuzhiyun regulator-name = "AO_5V"; 90*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 91*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 92*4882a593Smuzhiyun vin-supply = <&dc_in>; 93*4882a593Smuzhiyun regulator-always-on; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun dc_in: regulator-dc_in { 97*4882a593Smuzhiyun compatible = "regulator-fixed"; 98*4882a593Smuzhiyun regulator-name = "DC_IN"; 99*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 100*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 101*4882a593Smuzhiyun regulator-always-on; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun emmc_1v8: regulator-emmc_1v8 { 105*4882a593Smuzhiyun compatible = "regulator-fixed"; 106*4882a593Smuzhiyun regulator-name = "EMMC_1V8"; 107*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 108*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 109*4882a593Smuzhiyun vin-supply = <&vddao_3v3>; 110*4882a593Smuzhiyun regulator-always-on; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun vddao_3v3: regulator-vddao_3v3 { 114*4882a593Smuzhiyun compatible = "regulator-fixed"; 115*4882a593Smuzhiyun regulator-name = "VDDAO_3V3"; 116*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 117*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 118*4882a593Smuzhiyun vin-supply = <&dc_in>; 119*4882a593Smuzhiyun regulator-always-on; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun vddao_3v3_t: regultor-vddao_3v3_t { 123*4882a593Smuzhiyun compatible = "regulator-fixed"; 124*4882a593Smuzhiyun regulator-name = "VDDAO_3V3_T"; 125*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 126*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 127*4882a593Smuzhiyun vin-supply = <&vddao_3v3>; 128*4882a593Smuzhiyun gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; 129*4882a593Smuzhiyun enable-active-high; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun vddcpu: regulator-vddcpu { 133*4882a593Smuzhiyun /* 134*4882a593Smuzhiyun * SY8120B1ABC DC/DC Regulator. 135*4882a593Smuzhiyun */ 136*4882a593Smuzhiyun compatible = "pwm-regulator"; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun regulator-name = "VDDCPU"; 139*4882a593Smuzhiyun regulator-min-microvolt = <721000>; 140*4882a593Smuzhiyun regulator-max-microvolt = <1022000>; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun pwm-supply = <&dc_in>; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun pwms = <&pwm_AO_cd 1 1250 0>; 145*4882a593Smuzhiyun pwm-dutycycle-range = <100 0>; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun regulator-boot-on; 148*4882a593Smuzhiyun regulator-always-on; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun vddio_ao1v8: regulator-vddio_ao1v8 { 152*4882a593Smuzhiyun compatible = "regulator-fixed"; 153*4882a593Smuzhiyun regulator-name = "VDDIO_AO1V8"; 154*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 155*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 156*4882a593Smuzhiyun vin-supply = <&vddao_3v3>; 157*4882a593Smuzhiyun regulator-always-on; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 161*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 162*4882a593Smuzhiyun reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; 163*4882a593Smuzhiyun clocks = <&wifi32k>; 164*4882a593Smuzhiyun clock-names = "ext_clock"; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun wifi32k: wifi32k { 168*4882a593Smuzhiyun compatible = "pwm-clock"; 169*4882a593Smuzhiyun #clock-cells = <0>; 170*4882a593Smuzhiyun clock-frequency = <32768>; 171*4882a593Smuzhiyun pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun sound { 175*4882a593Smuzhiyun compatible = "amlogic,axg-sound-card"; 176*4882a593Smuzhiyun model = "G12A-SEI510"; 177*4882a593Smuzhiyun audio-aux-devs = <&tdmout_a>, <&tdmout_b>, 178*4882a593Smuzhiyun <&tdmin_a>, <&tdmin_b>; 179*4882a593Smuzhiyun audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", 180*4882a593Smuzhiyun "TDMOUT_A IN 1", "FRDDR_B OUT 0", 181*4882a593Smuzhiyun "TDMOUT_A IN 2", "FRDDR_C OUT 0", 182*4882a593Smuzhiyun "TDM_A Playback", "TDMOUT_A OUT", 183*4882a593Smuzhiyun "TDMOUT_B IN 0", "FRDDR_A OUT 1", 184*4882a593Smuzhiyun "TDMOUT_B IN 1", "FRDDR_B OUT 1", 185*4882a593Smuzhiyun "TDMOUT_B IN 2", "FRDDR_C OUT 1", 186*4882a593Smuzhiyun "TDM_B Playback", "TDMOUT_B OUT", 187*4882a593Smuzhiyun "TODDR_A IN 4", "PDM Capture", 188*4882a593Smuzhiyun "TODDR_B IN 4", "PDM Capture", 189*4882a593Smuzhiyun "TODDR_C IN 4", "PDM Capture", 190*4882a593Smuzhiyun "TDMIN_A IN 0", "TDM_A Capture", 191*4882a593Smuzhiyun "TDMIN_A IN 3", "TDM_A Loopback", 192*4882a593Smuzhiyun "TDMIN_B IN 0", "TDM_A Capture", 193*4882a593Smuzhiyun "TDMIN_B IN 3", "TDM_A Loopback", 194*4882a593Smuzhiyun "TDMIN_A IN 1", "TDM_B Capture", 195*4882a593Smuzhiyun "TDMIN_A IN 4", "TDM_B Loopback", 196*4882a593Smuzhiyun "TDMIN_B IN 1", "TDM_B Capture", 197*4882a593Smuzhiyun "TDMIN_B IN 4", "TDM_B Loopback", 198*4882a593Smuzhiyun "TODDR_A IN 0", "TDMIN_A OUT", 199*4882a593Smuzhiyun "TODDR_B IN 0", "TDMIN_A OUT", 200*4882a593Smuzhiyun "TODDR_C IN 0", "TDMIN_A OUT", 201*4882a593Smuzhiyun "TODDR_A IN 1", "TDMIN_B OUT", 202*4882a593Smuzhiyun "TODDR_B IN 1", "TDMIN_B OUT", 203*4882a593Smuzhiyun "TODDR_C IN 1", "TDMIN_B OUT"; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun assigned-clocks = <&clkc CLKID_MPLL2>, 206*4882a593Smuzhiyun <&clkc CLKID_MPLL0>, 207*4882a593Smuzhiyun <&clkc CLKID_MPLL1>; 208*4882a593Smuzhiyun assigned-clock-parents = <0>, <0>, <0>; 209*4882a593Smuzhiyun assigned-clock-rates = <294912000>, 210*4882a593Smuzhiyun <270950400>, 211*4882a593Smuzhiyun <393216000>; 212*4882a593Smuzhiyun status = "okay"; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun dai-link-0 { 215*4882a593Smuzhiyun sound-dai = <&frddr_a>; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun dai-link-1 { 219*4882a593Smuzhiyun sound-dai = <&frddr_b>; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun dai-link-2 { 223*4882a593Smuzhiyun sound-dai = <&frddr_c>; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun dai-link-3 { 227*4882a593Smuzhiyun sound-dai = <&toddr_a>; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun dai-link-4 { 231*4882a593Smuzhiyun sound-dai = <&toddr_b>; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun dai-link-5 { 235*4882a593Smuzhiyun sound-dai = <&toddr_c>; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun /* internal speaker interface */ 239*4882a593Smuzhiyun dai-link-6 { 240*4882a593Smuzhiyun sound-dai = <&tdmif_a>; 241*4882a593Smuzhiyun dai-format = "i2s"; 242*4882a593Smuzhiyun dai-tdm-slot-tx-mask-0 = <1 1>; 243*4882a593Smuzhiyun mclk-fs = <256>; 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun codec-0 { 246*4882a593Smuzhiyun sound-dai = <&mono_dac>; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun codec-1 { 250*4882a593Smuzhiyun sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun /* 8ch hdmi interface */ 255*4882a593Smuzhiyun dai-link-7 { 256*4882a593Smuzhiyun sound-dai = <&tdmif_b>; 257*4882a593Smuzhiyun dai-format = "i2s"; 258*4882a593Smuzhiyun dai-tdm-slot-tx-mask-0 = <1 1>; 259*4882a593Smuzhiyun dai-tdm-slot-tx-mask-1 = <1 1>; 260*4882a593Smuzhiyun dai-tdm-slot-tx-mask-2 = <1 1>; 261*4882a593Smuzhiyun dai-tdm-slot-tx-mask-3 = <1 1>; 262*4882a593Smuzhiyun mclk-fs = <256>; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun codec { 265*4882a593Smuzhiyun sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; 266*4882a593Smuzhiyun }; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun /* internal digital mics */ 270*4882a593Smuzhiyun dai-link-8 { 271*4882a593Smuzhiyun sound-dai = <&pdm>; 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun codec { 274*4882a593Smuzhiyun sound-dai = <&dmics>; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun /* hdmi glue */ 279*4882a593Smuzhiyun dai-link-9 { 280*4882a593Smuzhiyun sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun codec { 283*4882a593Smuzhiyun sound-dai = <&hdmi_tx>; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun}; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun&arb { 290*4882a593Smuzhiyun status = "okay"; 291*4882a593Smuzhiyun}; 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun&cec_AO { 294*4882a593Smuzhiyun pinctrl-0 = <&cec_ao_a_h_pins>; 295*4882a593Smuzhiyun pinctrl-names = "default"; 296*4882a593Smuzhiyun status = "disabled"; 297*4882a593Smuzhiyun hdmi-phandle = <&hdmi_tx>; 298*4882a593Smuzhiyun}; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun&cecb_AO { 301*4882a593Smuzhiyun pinctrl-0 = <&cec_ao_b_h_pins>; 302*4882a593Smuzhiyun pinctrl-names = "default"; 303*4882a593Smuzhiyun status = "okay"; 304*4882a593Smuzhiyun hdmi-phandle = <&hdmi_tx>; 305*4882a593Smuzhiyun}; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun&clkc_audio { 308*4882a593Smuzhiyun status = "okay"; 309*4882a593Smuzhiyun}; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun&cpu0 { 312*4882a593Smuzhiyun cpu-supply = <&vddcpu>; 313*4882a593Smuzhiyun operating-points-v2 = <&cpu_opp_table>; 314*4882a593Smuzhiyun clocks = <&clkc CLKID_CPU_CLK>; 315*4882a593Smuzhiyun clock-latency = <50000>; 316*4882a593Smuzhiyun}; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun&cpu1 { 319*4882a593Smuzhiyun cpu-supply = <&vddcpu>; 320*4882a593Smuzhiyun operating-points-v2 = <&cpu_opp_table>; 321*4882a593Smuzhiyun clocks = <&clkc CLKID_CPU_CLK>; 322*4882a593Smuzhiyun clock-latency = <50000>; 323*4882a593Smuzhiyun}; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun&cpu2 { 326*4882a593Smuzhiyun cpu-supply = <&vddcpu>; 327*4882a593Smuzhiyun operating-points-v2 = <&cpu_opp_table>; 328*4882a593Smuzhiyun clocks = <&clkc CLKID_CPU_CLK>; 329*4882a593Smuzhiyun clock-latency = <50000>; 330*4882a593Smuzhiyun}; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun&cpu3 { 333*4882a593Smuzhiyun cpu-supply = <&vddcpu>; 334*4882a593Smuzhiyun operating-points-v2 = <&cpu_opp_table>; 335*4882a593Smuzhiyun clocks = <&clkc CLKID_CPU_CLK>; 336*4882a593Smuzhiyun clock-latency = <50000>; 337*4882a593Smuzhiyun}; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun&cvbs_vdac_port { 340*4882a593Smuzhiyun cvbs_vdac_out: endpoint { 341*4882a593Smuzhiyun remote-endpoint = <&cvbs_connector_in>; 342*4882a593Smuzhiyun }; 343*4882a593Smuzhiyun}; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyunðmac { 346*4882a593Smuzhiyun status = "okay"; 347*4882a593Smuzhiyun phy-handle = <&internal_ephy>; 348*4882a593Smuzhiyun phy-mode = "rmii"; 349*4882a593Smuzhiyun}; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun&frddr_a { 352*4882a593Smuzhiyun status = "okay"; 353*4882a593Smuzhiyun}; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun&frddr_b { 356*4882a593Smuzhiyun status = "okay"; 357*4882a593Smuzhiyun}; 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun&frddr_c { 360*4882a593Smuzhiyun status = "okay"; 361*4882a593Smuzhiyun}; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun&hdmi_tx { 364*4882a593Smuzhiyun status = "okay"; 365*4882a593Smuzhiyun pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; 366*4882a593Smuzhiyun pinctrl-names = "default"; 367*4882a593Smuzhiyun}; 368*4882a593Smuzhiyun 369*4882a593Smuzhiyun&hdmi_tx_tmds_port { 370*4882a593Smuzhiyun hdmi_tx_tmds_out: endpoint { 371*4882a593Smuzhiyun remote-endpoint = <&hdmi_connector_in>; 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun}; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun&i2c3 { 376*4882a593Smuzhiyun status = "okay"; 377*4882a593Smuzhiyun pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; 378*4882a593Smuzhiyun pinctrl-names = "default"; 379*4882a593Smuzhiyun}; 380*4882a593Smuzhiyun 381*4882a593Smuzhiyun&ir { 382*4882a593Smuzhiyun status = "okay"; 383*4882a593Smuzhiyun pinctrl-0 = <&remote_input_ao_pins>; 384*4882a593Smuzhiyun pinctrl-names = "default"; 385*4882a593Smuzhiyun}; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun&pwm_AO_cd { 388*4882a593Smuzhiyun pinctrl-0 = <&pwm_ao_d_e_pins>; 389*4882a593Smuzhiyun pinctrl-names = "default"; 390*4882a593Smuzhiyun clocks = <&xtal>; 391*4882a593Smuzhiyun clock-names = "clkin1"; 392*4882a593Smuzhiyun status = "okay"; 393*4882a593Smuzhiyun}; 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun&pwm_ef { 396*4882a593Smuzhiyun status = "okay"; 397*4882a593Smuzhiyun pinctrl-0 = <&pwm_e_pins>; 398*4882a593Smuzhiyun pinctrl-names = "default"; 399*4882a593Smuzhiyun clocks = <&xtal>; 400*4882a593Smuzhiyun clock-names = "clkin0"; 401*4882a593Smuzhiyun}; 402*4882a593Smuzhiyun 403*4882a593Smuzhiyun&pdm { 404*4882a593Smuzhiyun pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_din1_z_pins>, 405*4882a593Smuzhiyun <&pdm_din2_z_pins>, <&pdm_din3_z_pins>, 406*4882a593Smuzhiyun <&pdm_dclk_z_pins>; 407*4882a593Smuzhiyun pinctrl-names = "default"; 408*4882a593Smuzhiyun status = "okay"; 409*4882a593Smuzhiyun}; 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun&saradc { 412*4882a593Smuzhiyun status = "okay"; 413*4882a593Smuzhiyun vref-supply = <&vddio_ao1v8>; 414*4882a593Smuzhiyun}; 415*4882a593Smuzhiyun 416*4882a593Smuzhiyun/* SDIO */ 417*4882a593Smuzhiyun&sd_emmc_a { 418*4882a593Smuzhiyun status = "okay"; 419*4882a593Smuzhiyun pinctrl-0 = <&sdio_pins>; 420*4882a593Smuzhiyun pinctrl-1 = <&sdio_clk_gate_pins>; 421*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 422*4882a593Smuzhiyun #address-cells = <1>; 423*4882a593Smuzhiyun #size-cells = <0>; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun bus-width = <4>; 426*4882a593Smuzhiyun cap-sd-highspeed; 427*4882a593Smuzhiyun sd-uhs-sdr50; 428*4882a593Smuzhiyun max-frequency = <100000000>; 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun non-removable; 431*4882a593Smuzhiyun disable-wp; 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun /* WiFi firmware requires power to be kept while in suspend */ 434*4882a593Smuzhiyun keep-power-in-suspend; 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 437*4882a593Smuzhiyun 438*4882a593Smuzhiyun vmmc-supply = <&vddao_3v3>; 439*4882a593Smuzhiyun vqmmc-supply = <&vddio_ao1v8>; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun brcmf: wifi@1 { 442*4882a593Smuzhiyun reg = <1>; 443*4882a593Smuzhiyun compatible = "brcm,bcm4329-fmac"; 444*4882a593Smuzhiyun }; 445*4882a593Smuzhiyun}; 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun/* SD card */ 448*4882a593Smuzhiyun&sd_emmc_b { 449*4882a593Smuzhiyun status = "okay"; 450*4882a593Smuzhiyun pinctrl-0 = <&sdcard_c_pins>; 451*4882a593Smuzhiyun pinctrl-1 = <&sdcard_clk_gate_c_pins>; 452*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun bus-width = <4>; 455*4882a593Smuzhiyun cap-sd-highspeed; 456*4882a593Smuzhiyun max-frequency = <50000000>; 457*4882a593Smuzhiyun disable-wp; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; 460*4882a593Smuzhiyun vmmc-supply = <&vddao_3v3>; 461*4882a593Smuzhiyun vqmmc-supply = <&vddao_3v3>; 462*4882a593Smuzhiyun}; 463*4882a593Smuzhiyun 464*4882a593Smuzhiyun/* eMMC */ 465*4882a593Smuzhiyun&sd_emmc_c { 466*4882a593Smuzhiyun status = "okay"; 467*4882a593Smuzhiyun pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; 468*4882a593Smuzhiyun pinctrl-1 = <&emmc_clk_gate_pins>; 469*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 470*4882a593Smuzhiyun 471*4882a593Smuzhiyun bus-width = <8>; 472*4882a593Smuzhiyun cap-mmc-highspeed; 473*4882a593Smuzhiyun mmc-ddr-1_8v; 474*4882a593Smuzhiyun mmc-hs200-1_8v; 475*4882a593Smuzhiyun max-frequency = <200000000>; 476*4882a593Smuzhiyun non-removable; 477*4882a593Smuzhiyun disable-wp; 478*4882a593Smuzhiyun 479*4882a593Smuzhiyun mmc-pwrseq = <&emmc_pwrseq>; 480*4882a593Smuzhiyun vmmc-supply = <&vddao_3v3>; 481*4882a593Smuzhiyun vqmmc-supply = <&emmc_1v8>; 482*4882a593Smuzhiyun}; 483*4882a593Smuzhiyun 484*4882a593Smuzhiyun&tdmif_a { 485*4882a593Smuzhiyun pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>; 486*4882a593Smuzhiyun pinctrl-names = "default"; 487*4882a593Smuzhiyun status = "okay"; 488*4882a593Smuzhiyun 489*4882a593Smuzhiyun assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>, 490*4882a593Smuzhiyun <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>; 491*4882a593Smuzhiyun assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>, 492*4882a593Smuzhiyun <&clkc_audio AUD_CLKID_MST_A_LRCLK>; 493*4882a593Smuzhiyun assigned-clock-rates = <0>, <0>; 494*4882a593Smuzhiyun}; 495*4882a593Smuzhiyun 496*4882a593Smuzhiyun&tdmif_b { 497*4882a593Smuzhiyun status = "okay"; 498*4882a593Smuzhiyun}; 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun&tdmin_a { 501*4882a593Smuzhiyun status = "okay"; 502*4882a593Smuzhiyun}; 503*4882a593Smuzhiyun 504*4882a593Smuzhiyun&tdmin_b { 505*4882a593Smuzhiyun status = "okay"; 506*4882a593Smuzhiyun}; 507*4882a593Smuzhiyun 508*4882a593Smuzhiyun&tdmout_a { 509*4882a593Smuzhiyun status = "okay"; 510*4882a593Smuzhiyun}; 511*4882a593Smuzhiyun 512*4882a593Smuzhiyun&tdmout_b { 513*4882a593Smuzhiyun status = "okay"; 514*4882a593Smuzhiyun}; 515*4882a593Smuzhiyun 516*4882a593Smuzhiyun&toddr_a { 517*4882a593Smuzhiyun status = "okay"; 518*4882a593Smuzhiyun}; 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun&toddr_b { 521*4882a593Smuzhiyun status = "okay"; 522*4882a593Smuzhiyun}; 523*4882a593Smuzhiyun 524*4882a593Smuzhiyun&toddr_c { 525*4882a593Smuzhiyun status = "okay"; 526*4882a593Smuzhiyun}; 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun&tohdmitx { 529*4882a593Smuzhiyun status = "okay"; 530*4882a593Smuzhiyun}; 531*4882a593Smuzhiyun 532*4882a593Smuzhiyun&uart_A { 533*4882a593Smuzhiyun status = "okay"; 534*4882a593Smuzhiyun pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; 535*4882a593Smuzhiyun pinctrl-names = "default"; 536*4882a593Smuzhiyun uart-has-rtscts; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun bluetooth { 539*4882a593Smuzhiyun compatible = "brcm,bcm43438-bt"; 540*4882a593Smuzhiyun shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; 541*4882a593Smuzhiyun max-speed = <2000000>; 542*4882a593Smuzhiyun clocks = <&wifi32k>; 543*4882a593Smuzhiyun clock-names = "lpo"; 544*4882a593Smuzhiyun vbat-supply = <&vddao_3v3>; 545*4882a593Smuzhiyun vddio-supply = <&vddio_ao1v8>; 546*4882a593Smuzhiyun }; 547*4882a593Smuzhiyun}; 548*4882a593Smuzhiyun 549*4882a593Smuzhiyun&uart_AO { 550*4882a593Smuzhiyun status = "okay"; 551*4882a593Smuzhiyun pinctrl-0 = <&uart_ao_a_pins>; 552*4882a593Smuzhiyun pinctrl-names = "default"; 553*4882a593Smuzhiyun}; 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun&usb { 556*4882a593Smuzhiyun status = "okay"; 557*4882a593Smuzhiyun dr_mode = "host"; 558*4882a593Smuzhiyun}; 559