1*4882a593SmuzhiyunAmlogic Meson PWM Controller 2*4882a593Smuzhiyun============================ 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun- compatible: Shall contain "amlogic,meson8b-pwm" 6*4882a593Smuzhiyun or "amlogic,meson-gxbb-pwm" 7*4882a593Smuzhiyun or "amlogic,meson-gxbb-ao-pwm" 8*4882a593Smuzhiyun or "amlogic,meson-axg-ee-pwm" 9*4882a593Smuzhiyun or "amlogic,meson-axg-ao-pwm" 10*4882a593Smuzhiyun or "amlogic,meson-g12a-ee-pwm" 11*4882a593Smuzhiyun or "amlogic,meson-g12a-ao-pwm-ab" 12*4882a593Smuzhiyun or "amlogic,meson-g12a-ao-pwm-cd" 13*4882a593Smuzhiyun- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of 14*4882a593Smuzhiyun the cells format. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunOptional properties: 17*4882a593Smuzhiyun- clocks: Could contain one or two parents clocks phandle for each of the two 18*4882a593Smuzhiyun PWM channels. 19*4882a593Smuzhiyun- clock-names: Could contain at least the "clkin0" and/or "clkin1" names. 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunExample: 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun pwm_ab: pwm@8550 { 24*4882a593Smuzhiyun compatible = "amlogic,meson-gxbb-pwm"; 25*4882a593Smuzhiyun reg = <0x0 0x08550 0x0 0x10>; 26*4882a593Smuzhiyun #pwm-cells = <3>; 27*4882a593Smuzhiyun clocks = <&xtal>, <&xtal>; 28*4882a593Smuzhiyun clock-names = "clkin0", "clkin1"; 29*4882a593Smuzhiyun } 30