1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 OR MIT 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright 2015 Endless Mobile, Inc. 4*4882a593Smuzhiyun * Author: Carlo Caione <carlo@endlessm.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include "meson8b.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "TRONFY MXQ S805"; 15*4882a593Smuzhiyun compatible = "tronfy,mxq", "amlogic,meson8b"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun aliases { 18*4882a593Smuzhiyun serial0 = &uart_AO; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun chosen { 22*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun memory { 26*4882a593Smuzhiyun device_type = "memory"; 27*4882a593Smuzhiyun reg = <0x40000000 0x40000000>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun iio-hwmon { 31*4882a593Smuzhiyun compatible = "iio-hwmon"; 32*4882a593Smuzhiyun io-channels = <&saradc 8>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun vcck: regulator-vcck { 36*4882a593Smuzhiyun compatible = "pwm-regulator"; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun regulator-name = "VCCK"; 39*4882a593Smuzhiyun regulator-min-microvolt = <860000>; 40*4882a593Smuzhiyun regulator-max-microvolt = <1140000>; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun pwm-supply = <&vcc_5v>; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun pwms = <&pwm_cd 0 1148 0>; 45*4882a593Smuzhiyun pwm-dutycycle-range = <100 0>; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun regulator-boot-on; 48*4882a593Smuzhiyun regulator-always-on; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun vcc_1v8: regulator-vcc1v8 { 52*4882a593Smuzhiyun compatible = "regulator-fixed"; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun regulator-name = "VCC1V8"; 55*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 56*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun vin-supply = <&vcc_3v3>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun vcc_3v3: regulator-vcc3v3 { 62*4882a593Smuzhiyun compatible = "regulator-fixed"; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun regulator-name = "VCC3V3"; 65*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 66*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun vin-supply = <&vcc_5v>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun vcc_5v: regulator-vcc5v { 72*4882a593Smuzhiyun compatible = "regulator-fixed"; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun regulator-name = "VCC5V"; 75*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 76*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun regulator-boot-on; 79*4882a593Smuzhiyun regulator-always-on; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun vddee: regulator-vddee { 83*4882a593Smuzhiyun compatible = "pwm-regulator"; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun regulator-name = "VDDEE"; 86*4882a593Smuzhiyun regulator-min-microvolt = <860000>; 87*4882a593Smuzhiyun regulator-max-microvolt = <1140000>; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun pwm-supply = <&vcc_5v>; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun pwms = <&pwm_cd 1 1148 0>; 92*4882a593Smuzhiyun pwm-dutycycle-range = <100 0>; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun regulator-boot-on; 95*4882a593Smuzhiyun regulator-always-on; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun}; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun&cpu0 { 100*4882a593Smuzhiyun cpu-supply = <&vcck>; 101*4882a593Smuzhiyun}; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyunðmac { 104*4882a593Smuzhiyun status = "okay"; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun pinctrl-0 = <ð_rmii_pins>; 107*4882a593Smuzhiyun pinctrl-names = "default"; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun phy-handle = <ð_phy0>; 110*4882a593Smuzhiyun phy-mode = "rmii"; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun mdio { 113*4882a593Smuzhiyun compatible = "snps,dwmac-mdio"; 114*4882a593Smuzhiyun #address-cells = <1>; 115*4882a593Smuzhiyun #size-cells = <0>; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun eth_phy0: ethernet-phy@0 { 118*4882a593Smuzhiyun /* IC Plus IP101A/G (0x02430c54) */ 119*4882a593Smuzhiyun reg = <0>; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun reset-assert-us = <10000>; 122*4882a593Smuzhiyun reset-deassert-us = <10000>; 123*4882a593Smuzhiyun reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun icplus,select-interrupt; 126*4882a593Smuzhiyun interrupt-parent = <&gpio_intc>; 127*4882a593Smuzhiyun /* GPIOH_3 */ 128*4882a593Smuzhiyun interrupts = <17 IRQ_TYPE_LEVEL_LOW>; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun}; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun&mali { 134*4882a593Smuzhiyun mali-supply = <&vddee>; 135*4882a593Smuzhiyun}; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun&saradc { 138*4882a593Smuzhiyun status = "okay"; 139*4882a593Smuzhiyun vref-supply = <&vcc_1v8>; 140*4882a593Smuzhiyun}; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun&sdio { 143*4882a593Smuzhiyun status = "okay"; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun pinctrl-0 = <&sd_b_pins>; 146*4882a593Smuzhiyun pinctrl-names = "default"; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* SD card */ 149*4882a593Smuzhiyun sd_card_slot: slot@1 { 150*4882a593Smuzhiyun compatible = "mmc-slot"; 151*4882a593Smuzhiyun reg = <1>; 152*4882a593Smuzhiyun status = "okay"; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun bus-width = <4>; 155*4882a593Smuzhiyun no-sdio; 156*4882a593Smuzhiyun cap-mmc-highspeed; 157*4882a593Smuzhiyun cap-sd-highspeed; 158*4882a593Smuzhiyun disable-wp; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun vmmc-supply = <&vcc_3v3>; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun}; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun&pwm_cd { 167*4882a593Smuzhiyun status = "okay"; 168*4882a593Smuzhiyun pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; 169*4882a593Smuzhiyun pinctrl-names = "default"; 170*4882a593Smuzhiyun clocks = <&xtal>, <&xtal>; 171*4882a593Smuzhiyun clock-names = "clkin0", "clkin1"; 172*4882a593Smuzhiyun}; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun&uart_AO { 175*4882a593Smuzhiyun status = "okay"; 176*4882a593Smuzhiyun pinctrl-0 = <&uart_ao_a_pins>; 177*4882a593Smuzhiyun pinctrl-names = "default"; 178*4882a593Smuzhiyun}; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun&usb0 { 181*4882a593Smuzhiyun status = "okay"; 182*4882a593Smuzhiyun}; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun&usb0_phy { 185*4882a593Smuzhiyun status = "okay"; 186*4882a593Smuzhiyun}; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun&usb1 { 189*4882a593Smuzhiyun status = "okay"; 190*4882a593Smuzhiyun}; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun&usb1_phy { 193*4882a593Smuzhiyun status = "okay"; 194*4882a593Smuzhiyun}; 195