1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2019 BayLibre, SAS 4*4882a593Smuzhiyun * Author: Neil Armstrong <narmstrong@baylibre.com> 5*4882a593Smuzhiyun * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "meson-g12b.dtsi" 11*4882a593Smuzhiyun#include "meson-g12b-s922x.dtsi" 12*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 13*4882a593Smuzhiyun#include <dt-bindings/gpio/meson-g12a-gpio.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun aliases { 17*4882a593Smuzhiyun serial0 = &uart_AO; 18*4882a593Smuzhiyun ethernet0 = ðmac; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun chosen { 22*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun memory@0 { 26*4882a593Smuzhiyun device_type = "memory"; 27*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x40000000>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun emmc_pwrseq: emmc-pwrseq { 31*4882a593Smuzhiyun compatible = "mmc-pwrseq-emmc"; 32*4882a593Smuzhiyun reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 36*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 37*4882a593Smuzhiyun reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; 38*4882a593Smuzhiyun clocks = <&wifi32k>; 39*4882a593Smuzhiyun clock-names = "ext_clock"; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun flash_1v8: regulator-flash_1v8 { 43*4882a593Smuzhiyun compatible = "regulator-fixed"; 44*4882a593Smuzhiyun regulator-name = "FLASH_1V8"; 45*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 46*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 47*4882a593Smuzhiyun vin-supply = <&vcc_3v3>; 48*4882a593Smuzhiyun regulator-always-on; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun main_12v: regulator-main_12v { 52*4882a593Smuzhiyun compatible = "regulator-fixed"; 53*4882a593Smuzhiyun regulator-name = "12V"; 54*4882a593Smuzhiyun regulator-min-microvolt = <12000000>; 55*4882a593Smuzhiyun regulator-max-microvolt = <12000000>; 56*4882a593Smuzhiyun regulator-always-on; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun vcc_5v: regulator-vcc_5v { 60*4882a593Smuzhiyun compatible = "regulator-fixed"; 61*4882a593Smuzhiyun regulator-name = "VCC_5V"; 62*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 63*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 64*4882a593Smuzhiyun vin-supply = <&main_12v>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; 67*4882a593Smuzhiyun enable-active-high; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun vcc_1v8: regulator-vcc_1v8 { 71*4882a593Smuzhiyun compatible = "regulator-fixed"; 72*4882a593Smuzhiyun regulator-name = "VCC_1V8"; 73*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 74*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 75*4882a593Smuzhiyun vin-supply = <&vcc_3v3>; 76*4882a593Smuzhiyun regulator-always-on; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun vcc_3v3: regulator-vcc_3v3 { 80*4882a593Smuzhiyun compatible = "regulator-fixed"; 81*4882a593Smuzhiyun regulator-name = "VCC_3V3"; 82*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 83*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 84*4882a593Smuzhiyun vin-supply = <&vddao_3v3>; 85*4882a593Smuzhiyun regulator-always-on; 86*4882a593Smuzhiyun /* FIXME: actually controlled by VDDCPU_B_EN */ 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun vddcpu_a: regulator-vddcpu-a { 90*4882a593Smuzhiyun /* 91*4882a593Smuzhiyun * MP1653 Regulator. 92*4882a593Smuzhiyun */ 93*4882a593Smuzhiyun compatible = "pwm-regulator"; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun regulator-name = "VDDCPU_A"; 96*4882a593Smuzhiyun regulator-min-microvolt = <721000>; 97*4882a593Smuzhiyun regulator-max-microvolt = <1022000>; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun pwm-supply = <&main_12v>; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun pwms = <&pwm_ab 0 1250 0>; 102*4882a593Smuzhiyun pwm-dutycycle-range = <100 0>; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun regulator-boot-on; 105*4882a593Smuzhiyun regulator-always-on; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun vddcpu_b: regulator-vddcpu-b { 109*4882a593Smuzhiyun /* 110*4882a593Smuzhiyun * MP1652 Regulator. 111*4882a593Smuzhiyun */ 112*4882a593Smuzhiyun compatible = "pwm-regulator"; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun regulator-name = "VDDCPU_B"; 115*4882a593Smuzhiyun regulator-min-microvolt = <721000>; 116*4882a593Smuzhiyun regulator-max-microvolt = <1022000>; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun pwm-supply = <&main_12v>; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun pwms = <&pwm_AO_cd 1 1250 0>; 121*4882a593Smuzhiyun pwm-dutycycle-range = <100 0>; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun regulator-boot-on; 124*4882a593Smuzhiyun regulator-always-on; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun usb1_pow: regulator-usb1-pow { 128*4882a593Smuzhiyun compatible = "regulator-fixed"; 129*4882a593Smuzhiyun regulator-name = "USB1_POW"; 130*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 131*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 132*4882a593Smuzhiyun vin-supply = <&vcc_5v>; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun /* connected to SY6280A Power Switch */ 135*4882a593Smuzhiyun gpio = <&gpio GPIOA_8 GPIO_ACTIVE_HIGH>; 136*4882a593Smuzhiyun enable-active-high; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun usb_pwr_en: regulator-usb-pwr-en { 140*4882a593Smuzhiyun compatible = "regulator-fixed"; 141*4882a593Smuzhiyun regulator-name = "USB_PWR_EN"; 142*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 143*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 144*4882a593Smuzhiyun vin-supply = <&vcc_5v>; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun /* Connected to USB3 Type-A Port power enable */ 147*4882a593Smuzhiyun gpio = <&gpio GPIOAO_7 GPIO_ACTIVE_HIGH>; 148*4882a593Smuzhiyun enable-active-high; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun vddao_1v8: regulator-vddao-1v8 { 152*4882a593Smuzhiyun compatible = "regulator-fixed"; 153*4882a593Smuzhiyun regulator-name = "VDDAO_1V8"; 154*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 155*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 156*4882a593Smuzhiyun vin-supply = <&vddao_3v3>; 157*4882a593Smuzhiyun regulator-always-on; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun vddao_3v3: regulator-vddao-3v3 { 161*4882a593Smuzhiyun compatible = "regulator-fixed"; 162*4882a593Smuzhiyun regulator-name = "VDDAO_3V3"; 163*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 164*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 165*4882a593Smuzhiyun vin-supply = <&main_12v>; 166*4882a593Smuzhiyun regulator-always-on; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun cvbs-connector { 170*4882a593Smuzhiyun compatible = "composite-video-connector"; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun port { 173*4882a593Smuzhiyun cvbs_connector_in: endpoint { 174*4882a593Smuzhiyun remote-endpoint = <&cvbs_vdac_out>; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun hdmi-connector { 180*4882a593Smuzhiyun compatible = "hdmi-connector"; 181*4882a593Smuzhiyun type = "a"; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun port { 184*4882a593Smuzhiyun hdmi_connector_in: endpoint { 185*4882a593Smuzhiyun remote-endpoint = <&hdmi_tx_tmds_out>; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun wifi32k: wifi32k { 191*4882a593Smuzhiyun compatible = "pwm-clock"; 192*4882a593Smuzhiyun #clock-cells = <0>; 193*4882a593Smuzhiyun clock-frequency = <32768>; 194*4882a593Smuzhiyun pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun}; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun&cec_AO { 199*4882a593Smuzhiyun pinctrl-0 = <&cec_ao_a_h_pins>; 200*4882a593Smuzhiyun pinctrl-names = "default"; 201*4882a593Smuzhiyun status = "disabled"; 202*4882a593Smuzhiyun hdmi-phandle = <&hdmi_tx>; 203*4882a593Smuzhiyun}; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun&cecb_AO { 206*4882a593Smuzhiyun pinctrl-0 = <&cec_ao_b_h_pins>; 207*4882a593Smuzhiyun pinctrl-names = "default"; 208*4882a593Smuzhiyun status = "okay"; 209*4882a593Smuzhiyun hdmi-phandle = <&hdmi_tx>; 210*4882a593Smuzhiyun}; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun&cpu0 { 213*4882a593Smuzhiyun cpu-supply = <&vddcpu_b>; 214*4882a593Smuzhiyun operating-points-v2 = <&cpu_opp_table_0>; 215*4882a593Smuzhiyun clocks = <&clkc CLKID_CPU_CLK>; 216*4882a593Smuzhiyun clock-latency = <50000>; 217*4882a593Smuzhiyun}; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun&cpu1 { 220*4882a593Smuzhiyun cpu-supply = <&vddcpu_b>; 221*4882a593Smuzhiyun operating-points-v2 = <&cpu_opp_table_0>; 222*4882a593Smuzhiyun clocks = <&clkc CLKID_CPU_CLK>; 223*4882a593Smuzhiyun clock-latency = <50000>; 224*4882a593Smuzhiyun}; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun&cpu100 { 227*4882a593Smuzhiyun cpu-supply = <&vddcpu_a>; 228*4882a593Smuzhiyun operating-points-v2 = <&cpub_opp_table_1>; 229*4882a593Smuzhiyun clocks = <&clkc CLKID_CPUB_CLK>; 230*4882a593Smuzhiyun clock-latency = <50000>; 231*4882a593Smuzhiyun}; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun&cpu101 { 234*4882a593Smuzhiyun cpu-supply = <&vddcpu_a>; 235*4882a593Smuzhiyun operating-points-v2 = <&cpub_opp_table_1>; 236*4882a593Smuzhiyun clocks = <&clkc CLKID_CPUB_CLK>; 237*4882a593Smuzhiyun clock-latency = <50000>; 238*4882a593Smuzhiyun}; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun&cpu102 { 241*4882a593Smuzhiyun cpu-supply = <&vddcpu_a>; 242*4882a593Smuzhiyun operating-points-v2 = <&cpub_opp_table_1>; 243*4882a593Smuzhiyun clocks = <&clkc CLKID_CPUB_CLK>; 244*4882a593Smuzhiyun clock-latency = <50000>; 245*4882a593Smuzhiyun}; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun&cpu103 { 248*4882a593Smuzhiyun cpu-supply = <&vddcpu_a>; 249*4882a593Smuzhiyun operating-points-v2 = <&cpub_opp_table_1>; 250*4882a593Smuzhiyun clocks = <&clkc CLKID_CPUB_CLK>; 251*4882a593Smuzhiyun clock-latency = <50000>; 252*4882a593Smuzhiyun}; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun&cvbs_vdac_port { 255*4882a593Smuzhiyun cvbs_vdac_out: endpoint { 256*4882a593Smuzhiyun remote-endpoint = <&cvbs_connector_in>; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun}; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun&ext_mdio { 261*4882a593Smuzhiyun external_phy: ethernet-phy@0 { 262*4882a593Smuzhiyun /* Realtek RTL8211F (0x001cc916) */ 263*4882a593Smuzhiyun reg = <0>; 264*4882a593Smuzhiyun max-speed = <1000>; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun reset-assert-us = <10000>; 267*4882a593Smuzhiyun reset-deassert-us = <80000>; 268*4882a593Smuzhiyun reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun interrupt-parent = <&gpio_intc>; 271*4882a593Smuzhiyun /* MAC_INTR on GPIOZ_14 */ 272*4882a593Smuzhiyun interrupts = <26 IRQ_TYPE_LEVEL_LOW>; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun}; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyunðmac { 277*4882a593Smuzhiyun pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; 278*4882a593Smuzhiyun pinctrl-names = "default"; 279*4882a593Smuzhiyun status = "okay"; 280*4882a593Smuzhiyun phy-mode = "rgmii"; 281*4882a593Smuzhiyun phy-handle = <&external_phy>; 282*4882a593Smuzhiyun amlogic,tx-delay-ns = <2>; 283*4882a593Smuzhiyun}; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun&hdmi_tx { 286*4882a593Smuzhiyun status = "okay"; 287*4882a593Smuzhiyun pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; 288*4882a593Smuzhiyun pinctrl-names = "default"; 289*4882a593Smuzhiyun hdmi-supply = <&vcc_5v>; 290*4882a593Smuzhiyun}; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun&hdmi_tx_tmds_port { 293*4882a593Smuzhiyun hdmi_tx_tmds_out: endpoint { 294*4882a593Smuzhiyun remote-endpoint = <&hdmi_connector_in>; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun}; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun&ir { 299*4882a593Smuzhiyun status = "okay"; 300*4882a593Smuzhiyun pinctrl-0 = <&remote_input_ao_pins>; 301*4882a593Smuzhiyun pinctrl-names = "default"; 302*4882a593Smuzhiyun}; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun&pwm_ab { 305*4882a593Smuzhiyun pinctrl-0 = <&pwm_a_e_pins>; 306*4882a593Smuzhiyun pinctrl-names = "default"; 307*4882a593Smuzhiyun clocks = <&xtal>; 308*4882a593Smuzhiyun clock-names = "clkin0"; 309*4882a593Smuzhiyun status = "okay"; 310*4882a593Smuzhiyun}; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun&pwm_AO_cd { 313*4882a593Smuzhiyun pinctrl-0 = <&pwm_ao_d_e_pins>; 314*4882a593Smuzhiyun pinctrl-names = "default"; 315*4882a593Smuzhiyun clocks = <&xtal>; 316*4882a593Smuzhiyun clock-names = "clkin1"; 317*4882a593Smuzhiyun status = "okay"; 318*4882a593Smuzhiyun}; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun&pwm_ef { 321*4882a593Smuzhiyun pinctrl-0 = <&pwm_e_pins>; 322*4882a593Smuzhiyun pinctrl-names = "default"; 323*4882a593Smuzhiyun clocks = <&xtal>; 324*4882a593Smuzhiyun clock-names = "clkin0"; 325*4882a593Smuzhiyun status = "okay"; 326*4882a593Smuzhiyun}; 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun/* SDIO */ 329*4882a593Smuzhiyun&sd_emmc_a { 330*4882a593Smuzhiyun status = "okay"; 331*4882a593Smuzhiyun pinctrl-0 = <&sdio_pins>; 332*4882a593Smuzhiyun pinctrl-1 = <&sdio_clk_gate_pins>; 333*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 334*4882a593Smuzhiyun #address-cells = <1>; 335*4882a593Smuzhiyun #size-cells = <0>; 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun bus-width = <4>; 338*4882a593Smuzhiyun cap-sd-highspeed; 339*4882a593Smuzhiyun max-frequency = <100000000>; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun /* WiFi firmware requires power to be kept while in suspend */ 342*4882a593Smuzhiyun keep-power-in-suspend; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun non-removable; 345*4882a593Smuzhiyun disable-wp; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun vmmc-supply = <&vddao_3v3>; 350*4882a593Smuzhiyun vqmmc-supply = <&vddao_1v8>; 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun brcmf: wifi@1 { 353*4882a593Smuzhiyun reg = <1>; 354*4882a593Smuzhiyun compatible = "brcm,bcm4329-fmac"; 355*4882a593Smuzhiyun }; 356*4882a593Smuzhiyun}; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun/* SD card */ 359*4882a593Smuzhiyun&sd_emmc_b { 360*4882a593Smuzhiyun status = "okay"; 361*4882a593Smuzhiyun pinctrl-0 = <&sdcard_c_pins>; 362*4882a593Smuzhiyun pinctrl-1 = <&sdcard_clk_gate_c_pins>; 363*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun bus-width = <4>; 366*4882a593Smuzhiyun cap-sd-highspeed; 367*4882a593Smuzhiyun max-frequency = <50000000>; 368*4882a593Smuzhiyun disable-wp; 369*4882a593Smuzhiyun 370*4882a593Smuzhiyun cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; 371*4882a593Smuzhiyun vmmc-supply = <&vddao_3v3>; 372*4882a593Smuzhiyun vqmmc-supply = <&vddao_3v3>; 373*4882a593Smuzhiyun}; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun/* eMMC */ 376*4882a593Smuzhiyun&sd_emmc_c { 377*4882a593Smuzhiyun status = "okay"; 378*4882a593Smuzhiyun pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; 379*4882a593Smuzhiyun pinctrl-1 = <&emmc_clk_gate_pins>; 380*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 381*4882a593Smuzhiyun 382*4882a593Smuzhiyun bus-width = <8>; 383*4882a593Smuzhiyun cap-mmc-highspeed; 384*4882a593Smuzhiyun max-frequency = <100000000>; 385*4882a593Smuzhiyun disable-wp; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun mmc-pwrseq = <&emmc_pwrseq>; 388*4882a593Smuzhiyun vmmc-supply = <&vcc_3v3>; 389*4882a593Smuzhiyun vqmmc-supply = <&flash_1v8>; 390*4882a593Smuzhiyun}; 391*4882a593Smuzhiyun 392*4882a593Smuzhiyun&uart_A { 393*4882a593Smuzhiyun status = "okay"; 394*4882a593Smuzhiyun pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; 395*4882a593Smuzhiyun pinctrl-names = "default"; 396*4882a593Smuzhiyun uart-has-rtscts; 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun bluetooth { 399*4882a593Smuzhiyun compatible = "brcm,bcm43438-bt"; 400*4882a593Smuzhiyun shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; 401*4882a593Smuzhiyun max-speed = <2000000>; 402*4882a593Smuzhiyun clocks = <&wifi32k>; 403*4882a593Smuzhiyun clock-names = "lpo"; 404*4882a593Smuzhiyun }; 405*4882a593Smuzhiyun}; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun&uart_AO { 408*4882a593Smuzhiyun status = "okay"; 409*4882a593Smuzhiyun pinctrl-0 = <&uart_ao_a_pins>; 410*4882a593Smuzhiyun pinctrl-names = "default"; 411*4882a593Smuzhiyun}; 412*4882a593Smuzhiyun 413*4882a593Smuzhiyun&usb { 414*4882a593Smuzhiyun status = "okay"; 415*4882a593Smuzhiyun dr_mode = "host"; 416*4882a593Smuzhiyun vbus-supply = <&usb_pwr_en>; 417*4882a593Smuzhiyun}; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun&usb2_phy0 { 420*4882a593Smuzhiyun phy-supply = <&usb1_pow>; 421*4882a593Smuzhiyun}; 422*4882a593Smuzhiyun 423*4882a593Smuzhiyun&usb2_phy1 { 424*4882a593Smuzhiyun phy-supply = <&usb1_pow>; 425*4882a593Smuzhiyun}; 426