xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2019 BayLibre, SAS
4*4882a593Smuzhiyun * Author: Neil Armstrong <narmstrong@baylibre.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
8*4882a593Smuzhiyun#include <dt-bindings/gpio/meson-g12a-gpio.h>
9*4882a593Smuzhiyun#include <dt-bindings/sound/meson-g12a-toacodec.h>
10*4882a593Smuzhiyun#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	aliases {
14*4882a593Smuzhiyun		serial0 = &uart_AO;
15*4882a593Smuzhiyun		ethernet0 = &ethmac;
16*4882a593Smuzhiyun	};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	dio2133: audio-amplifier-0 {
19*4882a593Smuzhiyun		compatible = "simple-audio-amplifier";
20*4882a593Smuzhiyun		enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
21*4882a593Smuzhiyun		VCC-supply = <&vcc_5v>;
22*4882a593Smuzhiyun		sound-name-prefix = "U19";
23*4882a593Smuzhiyun		status = "okay";
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	chosen {
27*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	memory@0 {
31*4882a593Smuzhiyun		device_type = "memory";
32*4882a593Smuzhiyun		reg = <0x0 0x0 0x0 0x40000000>;
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	emmc_pwrseq: emmc-pwrseq {
36*4882a593Smuzhiyun		compatible = "mmc-pwrseq-emmc";
37*4882a593Smuzhiyun		reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	leds {
41*4882a593Smuzhiyun		compatible = "gpio-leds";
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun		blue {
44*4882a593Smuzhiyun			label = "n2:blue";
45*4882a593Smuzhiyun			gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
46*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
47*4882a593Smuzhiyun		};
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	tflash_vdd: regulator-tflash_vdd {
51*4882a593Smuzhiyun		compatible = "regulator-fixed";
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		regulator-name = "TFLASH_VDD";
54*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
55*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun		gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
58*4882a593Smuzhiyun		enable-active-high;
59*4882a593Smuzhiyun		regulator-always-on;
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	tf_io: gpio-regulator-tf_io {
63*4882a593Smuzhiyun		compatible = "regulator-gpio";
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun		regulator-name = "TF_IO";
66*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
67*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun		gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
70*4882a593Smuzhiyun		gpios-states = <0>;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun		states = <3300000 0>,
73*4882a593Smuzhiyun			 <1800000 1>;
74*4882a593Smuzhiyun	};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun	flash_1v8: regulator-flash_1v8 {
77*4882a593Smuzhiyun		compatible = "regulator-fixed";
78*4882a593Smuzhiyun		regulator-name = "FLASH_1V8";
79*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
80*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
81*4882a593Smuzhiyun		vin-supply = <&vcc_3v3>;
82*4882a593Smuzhiyun		regulator-always-on;
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	main_12v: regulator-main_12v {
86*4882a593Smuzhiyun		compatible = "regulator-fixed";
87*4882a593Smuzhiyun		regulator-name = "12V";
88*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
89*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
90*4882a593Smuzhiyun		regulator-always-on;
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	vcc_5v: regulator-vcc_5v {
94*4882a593Smuzhiyun		compatible = "regulator-fixed";
95*4882a593Smuzhiyun		regulator-name = "5V";
96*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
97*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
98*4882a593Smuzhiyun		regulator-always-on;
99*4882a593Smuzhiyun		vin-supply = <&main_12v>;
100*4882a593Smuzhiyun	};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun	vcc_1v8: regulator-vcc_1v8 {
103*4882a593Smuzhiyun		compatible = "regulator-fixed";
104*4882a593Smuzhiyun		regulator-name = "VCC_1V8";
105*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
106*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
107*4882a593Smuzhiyun		vin-supply = <&vcc_3v3>;
108*4882a593Smuzhiyun		regulator-always-on;
109*4882a593Smuzhiyun	};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun	vcc_3v3: regulator-vcc_3v3 {
112*4882a593Smuzhiyun		compatible = "regulator-fixed";
113*4882a593Smuzhiyun		regulator-name = "VCC_3V3";
114*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
115*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
116*4882a593Smuzhiyun		vin-supply = <&vddao_3v3>;
117*4882a593Smuzhiyun		regulator-always-on;
118*4882a593Smuzhiyun		/* FIXME: actually controlled by VDDCPU_B_EN */
119*4882a593Smuzhiyun	};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun	vddcpu_a: regulator-vddcpu-a {
122*4882a593Smuzhiyun		/*
123*4882a593Smuzhiyun		 * MP8756GD Regulator.
124*4882a593Smuzhiyun		 */
125*4882a593Smuzhiyun		compatible = "pwm-regulator";
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun		regulator-name = "VDDCPU_A";
128*4882a593Smuzhiyun		regulator-min-microvolt = <721000>;
129*4882a593Smuzhiyun		regulator-max-microvolt = <1022000>;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun		pwm-supply = <&main_12v>;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun		pwms = <&pwm_ab 0 1250 0>;
134*4882a593Smuzhiyun		pwm-dutycycle-range = <100 0>;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun		regulator-boot-on;
137*4882a593Smuzhiyun		regulator-always-on;
138*4882a593Smuzhiyun	};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun	vddcpu_b: regulator-vddcpu-b {
141*4882a593Smuzhiyun		/*
142*4882a593Smuzhiyun		 * Silergy SY8120B1ABC Regulator.
143*4882a593Smuzhiyun		 */
144*4882a593Smuzhiyun		compatible = "pwm-regulator";
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun		regulator-name = "VDDCPU_B";
147*4882a593Smuzhiyun		regulator-min-microvolt = <721000>;
148*4882a593Smuzhiyun		regulator-max-microvolt = <1022000>;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun		pwm-supply = <&main_12v>;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun		pwms = <&pwm_AO_cd 1 1250 0>;
153*4882a593Smuzhiyun		pwm-dutycycle-range = <100 0>;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun		regulator-boot-on;
156*4882a593Smuzhiyun		regulator-always-on;
157*4882a593Smuzhiyun	};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun	hub_5v: regulator-hub_5v {
160*4882a593Smuzhiyun		compatible = "regulator-fixed";
161*4882a593Smuzhiyun		regulator-name = "HUB_5V";
162*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
163*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
164*4882a593Smuzhiyun		vin-supply = <&vcc_5v>;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun		/* Connected to the Hub CHIPENABLE, LOW sets low power state */
167*4882a593Smuzhiyun		gpio = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
168*4882a593Smuzhiyun		enable-active-high;
169*4882a593Smuzhiyun	};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun	usb_pwr_en: regulator-usb_pwr_en {
172*4882a593Smuzhiyun		compatible = "regulator-fixed";
173*4882a593Smuzhiyun		regulator-name = "USB_PWR_EN";
174*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
175*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
176*4882a593Smuzhiyun		vin-supply = <&vcc_5v>;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun		/* Connected to the microUSB port power enable */
179*4882a593Smuzhiyun		gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
180*4882a593Smuzhiyun		enable-active-high;
181*4882a593Smuzhiyun	};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun	vddao_1v8: regulator-vddao_1v8 {
184*4882a593Smuzhiyun		compatible = "regulator-fixed";
185*4882a593Smuzhiyun		regulator-name = "VDDAO_1V8";
186*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
187*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
188*4882a593Smuzhiyun		vin-supply = <&vddao_3v3>;
189*4882a593Smuzhiyun		regulator-always-on;
190*4882a593Smuzhiyun	};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun	vddao_3v3: regulator-vddao_3v3 {
193*4882a593Smuzhiyun		compatible = "regulator-fixed";
194*4882a593Smuzhiyun		regulator-name = "VDDAO_3V3";
195*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
196*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
197*4882a593Smuzhiyun		vin-supply = <&main_12v>;
198*4882a593Smuzhiyun		regulator-always-on;
199*4882a593Smuzhiyun	};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun	hdmi-connector {
202*4882a593Smuzhiyun		compatible = "hdmi-connector";
203*4882a593Smuzhiyun		type = "a";
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun		port {
206*4882a593Smuzhiyun			hdmi_connector_in: endpoint {
207*4882a593Smuzhiyun				remote-endpoint = <&hdmi_tx_tmds_out>;
208*4882a593Smuzhiyun			};
209*4882a593Smuzhiyun		};
210*4882a593Smuzhiyun	};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun	sound {
213*4882a593Smuzhiyun		compatible = "amlogic,axg-sound-card";
214*4882a593Smuzhiyun		model = "G12B-ODROID-N2";
215*4882a593Smuzhiyun		audio-widgets = "Line", "Lineout";
216*4882a593Smuzhiyun		audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>,
217*4882a593Smuzhiyun				 <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>,
218*4882a593Smuzhiyun				 <&dio2133>;
219*4882a593Smuzhiyun		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
220*4882a593Smuzhiyun				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
221*4882a593Smuzhiyun				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
222*4882a593Smuzhiyun				"TDM_B Playback", "TDMOUT_B OUT",
223*4882a593Smuzhiyun				"TDMOUT_C IN 0", "FRDDR_A OUT 2",
224*4882a593Smuzhiyun				"TDMOUT_C IN 1", "FRDDR_B OUT 2",
225*4882a593Smuzhiyun				"TDMOUT_C IN 2", "FRDDR_C OUT 2",
226*4882a593Smuzhiyun				"TDM_C Playback", "TDMOUT_C OUT",
227*4882a593Smuzhiyun				"TDMIN_A IN 4", "TDM_B Loopback",
228*4882a593Smuzhiyun				"TDMIN_B IN 4", "TDM_B Loopback",
229*4882a593Smuzhiyun				"TDMIN_C IN 4", "TDM_B Loopback",
230*4882a593Smuzhiyun				"TDMIN_LB IN 1", "TDM_B Loopback",
231*4882a593Smuzhiyun				"TDMIN_A IN 5", "TDM_C Loopback",
232*4882a593Smuzhiyun				"TDMIN_B IN 5", "TDM_C Loopback",
233*4882a593Smuzhiyun				"TDMIN_C IN 5", "TDM_C Loopback",
234*4882a593Smuzhiyun				"TDMIN_LB IN 2", "TDM_C Loopback",
235*4882a593Smuzhiyun				"TODDR_A IN 0", "TDMIN_A OUT",
236*4882a593Smuzhiyun				"TODDR_B IN 0", "TDMIN_A OUT",
237*4882a593Smuzhiyun				"TODDR_C IN 0", "TDMIN_A OUT",
238*4882a593Smuzhiyun				"TODDR_A IN 1", "TDMIN_B OUT",
239*4882a593Smuzhiyun				"TODDR_B IN 1", "TDMIN_B OUT",
240*4882a593Smuzhiyun				"TODDR_C IN 1", "TDMIN_B OUT",
241*4882a593Smuzhiyun				"TODDR_A IN 2", "TDMIN_C OUT",
242*4882a593Smuzhiyun				"TODDR_B IN 2", "TDMIN_C OUT",
243*4882a593Smuzhiyun				"TODDR_C IN 2", "TDMIN_C OUT",
244*4882a593Smuzhiyun				"TODDR_A IN 6", "TDMIN_LB OUT",
245*4882a593Smuzhiyun				"TODDR_B IN 6", "TDMIN_LB OUT",
246*4882a593Smuzhiyun				"TODDR_C IN 6", "TDMIN_LB OUT",
247*4882a593Smuzhiyun				"U19 INL", "ACODEC LOLP",
248*4882a593Smuzhiyun				"U19 INR", "ACODEC LORP",
249*4882a593Smuzhiyun				"Lineout", "U19 OUTL",
250*4882a593Smuzhiyun				"Lineout", "U19 OUTR";
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun		assigned-clocks = <&clkc CLKID_MPLL2>,
253*4882a593Smuzhiyun				  <&clkc CLKID_MPLL0>,
254*4882a593Smuzhiyun				  <&clkc CLKID_MPLL1>;
255*4882a593Smuzhiyun		assigned-clock-parents = <0>, <0>, <0>;
256*4882a593Smuzhiyun		assigned-clock-rates = <294912000>,
257*4882a593Smuzhiyun				       <270950400>,
258*4882a593Smuzhiyun				       <393216000>;
259*4882a593Smuzhiyun		status = "okay";
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun		dai-link-0 {
262*4882a593Smuzhiyun			sound-dai = <&frddr_a>;
263*4882a593Smuzhiyun		};
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun		dai-link-1 {
266*4882a593Smuzhiyun			sound-dai = <&frddr_b>;
267*4882a593Smuzhiyun		};
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun		dai-link-2 {
270*4882a593Smuzhiyun			sound-dai = <&frddr_c>;
271*4882a593Smuzhiyun		};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun		dai-link-3 {
274*4882a593Smuzhiyun			sound-dai = <&toddr_a>;
275*4882a593Smuzhiyun		};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun		dai-link-4 {
278*4882a593Smuzhiyun			sound-dai = <&toddr_b>;
279*4882a593Smuzhiyun		};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun		dai-link-5 {
282*4882a593Smuzhiyun			sound-dai = <&toddr_c>;
283*4882a593Smuzhiyun		};
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun		/* 8ch hdmi interface */
286*4882a593Smuzhiyun		dai-link-6 {
287*4882a593Smuzhiyun			sound-dai = <&tdmif_b>;
288*4882a593Smuzhiyun			dai-format = "i2s";
289*4882a593Smuzhiyun			dai-tdm-slot-tx-mask-0 = <1 1>;
290*4882a593Smuzhiyun			dai-tdm-slot-tx-mask-1 = <1 1>;
291*4882a593Smuzhiyun			dai-tdm-slot-tx-mask-2 = <1 1>;
292*4882a593Smuzhiyun			dai-tdm-slot-tx-mask-3 = <1 1>;
293*4882a593Smuzhiyun			mclk-fs = <256>;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun			codec-0 {
296*4882a593Smuzhiyun				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
297*4882a593Smuzhiyun			};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun			codec-1 {
300*4882a593Smuzhiyun				sound-dai = <&toacodec TOACODEC_IN_B>;
301*4882a593Smuzhiyun			};
302*4882a593Smuzhiyun		};
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun		/* i2s jack output interface */
305*4882a593Smuzhiyun		dai-link-7 {
306*4882a593Smuzhiyun			sound-dai = <&tdmif_c>;
307*4882a593Smuzhiyun			dai-format = "i2s";
308*4882a593Smuzhiyun			dai-tdm-slot-tx-mask-0 = <1 1>;
309*4882a593Smuzhiyun			mclk-fs = <256>;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun			codec-0 {
312*4882a593Smuzhiyun				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
313*4882a593Smuzhiyun			};
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun			codec-1 {
316*4882a593Smuzhiyun				sound-dai = <&toacodec TOACODEC_IN_C>;
317*4882a593Smuzhiyun			};
318*4882a593Smuzhiyun		};
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun		/* hdmi glue */
321*4882a593Smuzhiyun		dai-link-8 {
322*4882a593Smuzhiyun			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun			codec {
325*4882a593Smuzhiyun				sound-dai = <&hdmi_tx>;
326*4882a593Smuzhiyun			};
327*4882a593Smuzhiyun		};
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun		/* acodec glue */
330*4882a593Smuzhiyun		dai-link-9 {
331*4882a593Smuzhiyun			sound-dai = <&toacodec TOACODEC_OUT>;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun			codec {
334*4882a593Smuzhiyun				sound-dai = <&acodec>;
335*4882a593Smuzhiyun			};
336*4882a593Smuzhiyun		};
337*4882a593Smuzhiyun	};
338*4882a593Smuzhiyun};
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun&acodec {
341*4882a593Smuzhiyun	AVDD-supply = <&vddao_1v8>;
342*4882a593Smuzhiyun	status = "okay";
343*4882a593Smuzhiyun};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun&arb {
346*4882a593Smuzhiyun	status = "okay";
347*4882a593Smuzhiyun};
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun&cec_AO {
350*4882a593Smuzhiyun	pinctrl-0 = <&cec_ao_a_h_pins>;
351*4882a593Smuzhiyun	pinctrl-names = "default";
352*4882a593Smuzhiyun	status = "disabled";
353*4882a593Smuzhiyun	hdmi-phandle = <&hdmi_tx>;
354*4882a593Smuzhiyun};
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun&cecb_AO {
357*4882a593Smuzhiyun	pinctrl-0 = <&cec_ao_b_h_pins>;
358*4882a593Smuzhiyun	pinctrl-names = "default";
359*4882a593Smuzhiyun	status = "okay";
360*4882a593Smuzhiyun	hdmi-phandle = <&hdmi_tx>;
361*4882a593Smuzhiyun};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun&clkc_audio {
364*4882a593Smuzhiyun	status = "okay";
365*4882a593Smuzhiyun};
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun&cpu0 {
368*4882a593Smuzhiyun	cpu-supply = <&vddcpu_b>;
369*4882a593Smuzhiyun	operating-points-v2 = <&cpu_opp_table_0>;
370*4882a593Smuzhiyun	clocks = <&clkc CLKID_CPU_CLK>;
371*4882a593Smuzhiyun	clock-latency = <50000>;
372*4882a593Smuzhiyun};
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun&cpu1 {
375*4882a593Smuzhiyun	cpu-supply = <&vddcpu_b>;
376*4882a593Smuzhiyun	operating-points-v2 = <&cpu_opp_table_0>;
377*4882a593Smuzhiyun	clocks = <&clkc CLKID_CPU_CLK>;
378*4882a593Smuzhiyun	clock-latency = <50000>;
379*4882a593Smuzhiyun};
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun&cpu100 {
382*4882a593Smuzhiyun	cpu-supply = <&vddcpu_a>;
383*4882a593Smuzhiyun	operating-points-v2 = <&cpub_opp_table_1>;
384*4882a593Smuzhiyun	clocks = <&clkc CLKID_CPUB_CLK>;
385*4882a593Smuzhiyun	clock-latency = <50000>;
386*4882a593Smuzhiyun};
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun&cpu101 {
389*4882a593Smuzhiyun	cpu-supply = <&vddcpu_a>;
390*4882a593Smuzhiyun	operating-points-v2 = <&cpub_opp_table_1>;
391*4882a593Smuzhiyun	clocks = <&clkc CLKID_CPUB_CLK>;
392*4882a593Smuzhiyun	clock-latency = <50000>;
393*4882a593Smuzhiyun};
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun&cpu102 {
396*4882a593Smuzhiyun	cpu-supply = <&vddcpu_a>;
397*4882a593Smuzhiyun	operating-points-v2 = <&cpub_opp_table_1>;
398*4882a593Smuzhiyun	clocks = <&clkc CLKID_CPUB_CLK>;
399*4882a593Smuzhiyun	clock-latency = <50000>;
400*4882a593Smuzhiyun};
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun&cpu103 {
403*4882a593Smuzhiyun	cpu-supply = <&vddcpu_a>;
404*4882a593Smuzhiyun	operating-points-v2 = <&cpub_opp_table_1>;
405*4882a593Smuzhiyun	clocks = <&clkc CLKID_CPUB_CLK>;
406*4882a593Smuzhiyun	clock-latency = <50000>;
407*4882a593Smuzhiyun};
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun&ext_mdio {
410*4882a593Smuzhiyun	external_phy: ethernet-phy@0 {
411*4882a593Smuzhiyun		/* Realtek RTL8211F (0x001cc916) */
412*4882a593Smuzhiyun		reg = <0>;
413*4882a593Smuzhiyun		max-speed = <1000>;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun		reset-assert-us = <10000>;
416*4882a593Smuzhiyun		reset-deassert-us = <80000>;
417*4882a593Smuzhiyun		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun		interrupt-parent = <&gpio_intc>;
420*4882a593Smuzhiyun		/* MAC_INTR on GPIOZ_14 */
421*4882a593Smuzhiyun		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
422*4882a593Smuzhiyun	};
423*4882a593Smuzhiyun};
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun&ethmac {
426*4882a593Smuzhiyun	pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
427*4882a593Smuzhiyun	pinctrl-names = "default";
428*4882a593Smuzhiyun	status = "okay";
429*4882a593Smuzhiyun	phy-mode = "rgmii";
430*4882a593Smuzhiyun	phy-handle = <&external_phy>;
431*4882a593Smuzhiyun	amlogic,tx-delay-ns = <2>;
432*4882a593Smuzhiyun};
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun&frddr_a {
435*4882a593Smuzhiyun	status = "okay";
436*4882a593Smuzhiyun};
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun&frddr_b {
439*4882a593Smuzhiyun	status = "okay";
440*4882a593Smuzhiyun};
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun&frddr_c {
443*4882a593Smuzhiyun	status = "okay";
444*4882a593Smuzhiyun};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun&gpio {
447*4882a593Smuzhiyun	/*
448*4882a593Smuzhiyun	 * WARNING: The USB Hub on the Odroid-N2 needs a reset signal
449*4882a593Smuzhiyun	 * to be turned high in order to be detected by the USB Controller
450*4882a593Smuzhiyun	 * This signal should be handled by a USB specific power sequence
451*4882a593Smuzhiyun	 * in order to reset the Hub when USB bus is powered down.
452*4882a593Smuzhiyun	 */
453*4882a593Smuzhiyun	usb-hub {
454*4882a593Smuzhiyun		gpio-hog;
455*4882a593Smuzhiyun		gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
456*4882a593Smuzhiyun		output-high;
457*4882a593Smuzhiyun		line-name = "usb-hub-reset";
458*4882a593Smuzhiyun	};
459*4882a593Smuzhiyun};
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun&hdmi_tx {
462*4882a593Smuzhiyun	status = "okay";
463*4882a593Smuzhiyun	pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
464*4882a593Smuzhiyun	pinctrl-names = "default";
465*4882a593Smuzhiyun	hdmi-supply = <&vcc_5v>;
466*4882a593Smuzhiyun};
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun&hdmi_tx_tmds_port {
469*4882a593Smuzhiyun	hdmi_tx_tmds_out: endpoint {
470*4882a593Smuzhiyun		remote-endpoint = <&hdmi_connector_in>;
471*4882a593Smuzhiyun	};
472*4882a593Smuzhiyun};
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun&ir {
475*4882a593Smuzhiyun	status = "okay";
476*4882a593Smuzhiyun	pinctrl-0 = <&remote_input_ao_pins>;
477*4882a593Smuzhiyun	pinctrl-names = "default";
478*4882a593Smuzhiyun	linux,rc-map-name = "rc-odroid";
479*4882a593Smuzhiyun};
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun&pwm_ab {
482*4882a593Smuzhiyun	pinctrl-0 = <&pwm_a_e_pins>;
483*4882a593Smuzhiyun	pinctrl-names = "default";
484*4882a593Smuzhiyun	clocks = <&xtal>;
485*4882a593Smuzhiyun	clock-names = "clkin0";
486*4882a593Smuzhiyun	status = "okay";
487*4882a593Smuzhiyun};
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun&pwm_AO_cd {
490*4882a593Smuzhiyun	pinctrl-0 = <&pwm_ao_d_e_pins>;
491*4882a593Smuzhiyun	pinctrl-names = "default";
492*4882a593Smuzhiyun	clocks = <&xtal>;
493*4882a593Smuzhiyun	clock-names = "clkin1";
494*4882a593Smuzhiyun	status = "okay";
495*4882a593Smuzhiyun};
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun/* SD card */
498*4882a593Smuzhiyun&sd_emmc_b {
499*4882a593Smuzhiyun	status = "okay";
500*4882a593Smuzhiyun	pinctrl-0 = <&sdcard_c_pins>;
501*4882a593Smuzhiyun	pinctrl-1 = <&sdcard_clk_gate_c_pins>;
502*4882a593Smuzhiyun	pinctrl-names = "default", "clk-gate";
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun	bus-width = <4>;
505*4882a593Smuzhiyun	cap-sd-highspeed;
506*4882a593Smuzhiyun	max-frequency = <50000000>;
507*4882a593Smuzhiyun	disable-wp;
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
510*4882a593Smuzhiyun	vmmc-supply = <&tflash_vdd>;
511*4882a593Smuzhiyun	vqmmc-supply = <&tf_io>;
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun};
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun/* eMMC */
516*4882a593Smuzhiyun&sd_emmc_c {
517*4882a593Smuzhiyun	status = "okay";
518*4882a593Smuzhiyun	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
519*4882a593Smuzhiyun	pinctrl-1 = <&emmc_clk_gate_pins>;
520*4882a593Smuzhiyun	pinctrl-names = "default", "clk-gate";
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun	bus-width = <8>;
523*4882a593Smuzhiyun	cap-mmc-highspeed;
524*4882a593Smuzhiyun	mmc-ddr-1_8v;
525*4882a593Smuzhiyun	mmc-hs200-1_8v;
526*4882a593Smuzhiyun	max-frequency = <200000000>;
527*4882a593Smuzhiyun	disable-wp;
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun	mmc-pwrseq = <&emmc_pwrseq>;
530*4882a593Smuzhiyun	vmmc-supply = <&vcc_3v3>;
531*4882a593Smuzhiyun	vqmmc-supply = <&flash_1v8>;
532*4882a593Smuzhiyun};
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun/*
535*4882a593Smuzhiyun * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR pins
536*4882a593Smuzhiyun * and eMMC Data 4 to 7 pins.
537*4882a593Smuzhiyun * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
538*4882a593Smuzhiyun * and change bus-width to 4 then spifc can be enabled.
539*4882a593Smuzhiyun * The SW1 slide should also be set to the correct position.
540*4882a593Smuzhiyun */
541*4882a593Smuzhiyun&spifc {
542*4882a593Smuzhiyun	status = "disabled";
543*4882a593Smuzhiyun	pinctrl-0 = <&nor_pins>;
544*4882a593Smuzhiyun	pinctrl-names = "default";
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun	mx25u64: flash@0 {
547*4882a593Smuzhiyun		#address-cells = <1>;
548*4882a593Smuzhiyun		#size-cells = <1>;
549*4882a593Smuzhiyun		compatible = "mxicy,mx25u6435f", "jedec,spi-nor";
550*4882a593Smuzhiyun		reg = <0>;
551*4882a593Smuzhiyun		spi-max-frequency = <104000000>;
552*4882a593Smuzhiyun	};
553*4882a593Smuzhiyun};
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun&tdmif_b {
556*4882a593Smuzhiyun	status = "okay";
557*4882a593Smuzhiyun};
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun&tdmif_c {
560*4882a593Smuzhiyun	status = "okay";
561*4882a593Smuzhiyun};
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun&tdmin_a {
564*4882a593Smuzhiyun	status = "okay";
565*4882a593Smuzhiyun};
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun&tdmin_b {
568*4882a593Smuzhiyun	status = "okay";
569*4882a593Smuzhiyun};
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun&tdmin_c {
572*4882a593Smuzhiyun	status = "okay";
573*4882a593Smuzhiyun};
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun&tdmin_lb {
576*4882a593Smuzhiyun	status = "okay";
577*4882a593Smuzhiyun};
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun&tdmout_b {
580*4882a593Smuzhiyun	status = "okay";
581*4882a593Smuzhiyun};
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun&tdmout_c {
584*4882a593Smuzhiyun	status = "okay";
585*4882a593Smuzhiyun};
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun&toacodec {
588*4882a593Smuzhiyun	status = "okay";
589*4882a593Smuzhiyun};
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun&tohdmitx {
592*4882a593Smuzhiyun	status = "okay";
593*4882a593Smuzhiyun};
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun&toddr_a {
596*4882a593Smuzhiyun	status = "okay";
597*4882a593Smuzhiyun};
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun&toddr_b {
600*4882a593Smuzhiyun	status = "okay";
601*4882a593Smuzhiyun};
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun&toddr_c {
604*4882a593Smuzhiyun	status = "okay";
605*4882a593Smuzhiyun};
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun&uart_AO {
608*4882a593Smuzhiyun	status = "okay";
609*4882a593Smuzhiyun	pinctrl-0 = <&uart_ao_a_pins>;
610*4882a593Smuzhiyun	pinctrl-names = "default";
611*4882a593Smuzhiyun};
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun&usb {
614*4882a593Smuzhiyun	status = "okay";
615*4882a593Smuzhiyun	vbus-supply = <&usb_pwr_en>;
616*4882a593Smuzhiyun};
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun&usb2_phy0 {
619*4882a593Smuzhiyun	phy-supply = <&vcc_5v>;
620*4882a593Smuzhiyun};
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun&usb2_phy1 {
623*4882a593Smuzhiyun	/* Enable the hub which is connected to this port */
624*4882a593Smuzhiyun	phy-supply = <&hub_5v>;
625*4882a593Smuzhiyun};
626