xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/meson8b-odroidc1.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 OR MIT
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2015 Endless Mobile, Inc.
4*4882a593Smuzhiyun * Author: Carlo Caione <carlo@endlessm.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include "meson8b.dtsi"
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "Hardkernel ODROID-C1";
13*4882a593Smuzhiyun	compatible = "hardkernel,odroid-c1", "amlogic,meson8b";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	aliases {
16*4882a593Smuzhiyun		serial0 = &uart_AO;
17*4882a593Smuzhiyun		mmc0 = &sd_card_slot;
18*4882a593Smuzhiyun		mmc1 = &sdhc;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	chosen {
22*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	memory {
26*4882a593Smuzhiyun		device_type = "memory";
27*4882a593Smuzhiyun		reg = <0x40000000 0x40000000>;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	emmc_pwrseq: emmc-pwrseq {
31*4882a593Smuzhiyun		compatible = "mmc-pwrseq-emmc";
32*4882a593Smuzhiyun		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	leds {
36*4882a593Smuzhiyun		compatible = "gpio-leds";
37*4882a593Smuzhiyun		blue {
38*4882a593Smuzhiyun			label = "c1:blue:alive";
39*4882a593Smuzhiyun			gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
40*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
41*4882a593Smuzhiyun			default-state = "off";
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun	p5v0: regulator-p5v0 {
46*4882a593Smuzhiyun		compatible = "regulator-fixed";
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun		regulator-name = "P5V0";
49*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
50*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	tflash_vdd: regulator-tflash_vdd {
54*4882a593Smuzhiyun		/*
55*4882a593Smuzhiyun		 * signal name from schematics: TFLASH_VDD_EN
56*4882a593Smuzhiyun		 */
57*4882a593Smuzhiyun		compatible = "regulator-fixed";
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		regulator-name = "TFLASH_VDD";
60*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
61*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun		vin-supply = <&vcc_3v3>;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun		gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
66*4882a593Smuzhiyun		enable-active-high;
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun	tf_io: gpio-regulator-tf_io {
70*4882a593Smuzhiyun		compatible = "regulator-gpio";
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun		regulator-name = "TF_IO";
73*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
74*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun		vin-supply = <&vcc_3v3>;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun		/*
79*4882a593Smuzhiyun		 * signal name from schematics: TF_3V3N_1V8_EN
80*4882a593Smuzhiyun		 */
81*4882a593Smuzhiyun		gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
82*4882a593Smuzhiyun		gpios-states = <0>;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun		states = <3300000 0
85*4882a593Smuzhiyun			  1800000 1>;
86*4882a593Smuzhiyun	};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun	iio-hwmon {
89*4882a593Smuzhiyun		compatible = "iio-hwmon";
90*4882a593Smuzhiyun		io-channels = <&saradc 8>;
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	rtc32k_xtal: rtc32k-xtal-clk {
94*4882a593Smuzhiyun		/* X3 in the schematics */
95*4882a593Smuzhiyun		compatible = "fixed-clock";
96*4882a593Smuzhiyun		clock-frequency = <32768>;
97*4882a593Smuzhiyun		clock-output-names = "RTC32K";
98*4882a593Smuzhiyun		#clock-cells = <0>;
99*4882a593Smuzhiyun	};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun	vcc_1v8: regulator-vcc-1v8 {
102*4882a593Smuzhiyun		/*
103*4882a593Smuzhiyun		 * RICHTEK RT9179 configured for a fixed output voltage of
104*4882a593Smuzhiyun		 * 1.8V. This supplies not only VCC1V8 but also IOREF_1V8 and
105*4882a593Smuzhiyun		 * VDD1V8 according to the schematics.
106*4882a593Smuzhiyun		 */
107*4882a593Smuzhiyun		compatible = "regulator-fixed";
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun		regulator-name = "VCC1V8";
110*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
111*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun		vin-supply = <&p5v0>;
114*4882a593Smuzhiyun	};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun	vcc_3v3: regulator-vcc-3v3 {
117*4882a593Smuzhiyun		/*
118*4882a593Smuzhiyun		 * Monolithic Power Systems MP2161 configured for a fixed
119*4882a593Smuzhiyun		 * output voltage of 3.3V. This supplies not only VCC3V3 but
120*4882a593Smuzhiyun		 * also VDD3V3 and VDDIO_AO3V3 according to the schematics.
121*4882a593Smuzhiyun		 */
122*4882a593Smuzhiyun		compatible = "regulator-fixed";
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun		regulator-name = "VCC3V3";
125*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
126*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun		vin-supply = <&p5v0>;
129*4882a593Smuzhiyun	};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun	vcck: regulator-vcck {
132*4882a593Smuzhiyun		/* Monolithic Power Systems MP2161 */
133*4882a593Smuzhiyun		compatible = "pwm-regulator";
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun		regulator-name = "VCCK";
136*4882a593Smuzhiyun		regulator-min-microvolt = <860000>;
137*4882a593Smuzhiyun		regulator-max-microvolt = <1140000>;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun		pwm-supply = <&p5v0>;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun		pwms = <&pwm_cd 0 12218 0>;
142*4882a593Smuzhiyun		pwm-dutycycle-range = <91 0>;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun		regulator-boot-on;
145*4882a593Smuzhiyun		regulator-always-on;
146*4882a593Smuzhiyun	};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun	vddc_ddr: regulator-vddc-ddr {
149*4882a593Smuzhiyun		/*
150*4882a593Smuzhiyun		 * Monolithic Power Systems MP2161 configured for a fixed
151*4882a593Smuzhiyun		 * output voltage of 1.5V. This supplies not only DDR_VDDC but
152*4882a593Smuzhiyun		 * also DDR3_1V5 according to the schematics.
153*4882a593Smuzhiyun		 */
154*4882a593Smuzhiyun		compatible = "regulator-fixed";
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun		regulator-name = "DDR_VDDC";
157*4882a593Smuzhiyun		regulator-min-microvolt = <1500000>;
158*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun		vin-supply = <&p5v0>;
161*4882a593Smuzhiyun	};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun	vddee: regulator-vddee {
164*4882a593Smuzhiyun		/* Monolithic Power Systems MP2161 */
165*4882a593Smuzhiyun		compatible = "pwm-regulator";
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun		regulator-name = "VDDEE";
168*4882a593Smuzhiyun		regulator-min-microvolt = <860000>;
169*4882a593Smuzhiyun		regulator-max-microvolt = <1140000>;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun		pwm-supply = <&p5v0>;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun		pwms = <&pwm_cd 1 12218 0>;
174*4882a593Smuzhiyun		pwm-dutycycle-range = <91 0>;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun		regulator-boot-on;
177*4882a593Smuzhiyun		regulator-always-on;
178*4882a593Smuzhiyun	};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun	vdd_rtc: regulator-vdd-rtc {
181*4882a593Smuzhiyun		/*
182*4882a593Smuzhiyun		 * Torex Semiconductor XC6215 configured for a fixed output of
183*4882a593Smuzhiyun		 * 0.9V.
184*4882a593Smuzhiyun		 */
185*4882a593Smuzhiyun		compatible = "regulator-fixed";
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun		regulator-name = "VDD_RTC";
188*4882a593Smuzhiyun		regulator-min-microvolt = <900000>;
189*4882a593Smuzhiyun		regulator-max-microvolt = <900000>;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun		vin-supply = <&vcc_3v3>;
192*4882a593Smuzhiyun	};
193*4882a593Smuzhiyun};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun&cpu0 {
196*4882a593Smuzhiyun	cpu-supply = <&vcck>;
197*4882a593Smuzhiyun};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun&efuse {
200*4882a593Smuzhiyun	ethernet_mac_address: mac@1b4 {
201*4882a593Smuzhiyun		reg = <0x1b4 0x6>;
202*4882a593Smuzhiyun	};
203*4882a593Smuzhiyun};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun&ethmac {
206*4882a593Smuzhiyun	status = "okay";
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun	pinctrl-0 = <&eth_rgmii_pins>;
209*4882a593Smuzhiyun	pinctrl-names = "default";
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun	phy-handle = <&eth_phy>;
212*4882a593Smuzhiyun	phy-mode = "rgmii-id";
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun	nvmem-cells = <&ethernet_mac_address>;
215*4882a593Smuzhiyun	nvmem-cell-names = "mac-address";
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun	mdio {
218*4882a593Smuzhiyun		compatible = "snps,dwmac-mdio";
219*4882a593Smuzhiyun		#address-cells = <1>;
220*4882a593Smuzhiyun		#size-cells = <0>;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun		/* Realtek RTL8211F (0x001cc916) */
223*4882a593Smuzhiyun		eth_phy: ethernet-phy@0 {
224*4882a593Smuzhiyun			reg = <0>;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun			reset-assert-us = <10000>;
227*4882a593Smuzhiyun			reset-deassert-us = <80000>;
228*4882a593Smuzhiyun			reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun			interrupt-parent = <&gpio_intc>;
231*4882a593Smuzhiyun			/* GPIOH_3 */
232*4882a593Smuzhiyun			interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
233*4882a593Smuzhiyun		};
234*4882a593Smuzhiyun	};
235*4882a593Smuzhiyun};
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun&gpio {
238*4882a593Smuzhiyun	gpio-line-names = /* Bank GPIOX */
239*4882a593Smuzhiyun			  "J2 Header Pin 35", "J2 Header Pin 36",
240*4882a593Smuzhiyun			  "J2 Header Pin 32", "J2 Header Pin 31",
241*4882a593Smuzhiyun			  "J2 Header Pin 29", "J2 Header Pin 18",
242*4882a593Smuzhiyun			  "J2 Header Pin 22", "J2 Header Pin 16",
243*4882a593Smuzhiyun			  "J2 Header Pin 23", "J2 Header Pin 21",
244*4882a593Smuzhiyun			  "J2 Header Pin 19", "J2 Header Pin 33",
245*4882a593Smuzhiyun			  "J2 Header Pin 8", "J2 Header Pin 10",
246*4882a593Smuzhiyun			  "J2 Header Pin 15", "J2 Header Pin 13",
247*4882a593Smuzhiyun			  "J2 Header Pin 24", "J2 Header Pin 26",
248*4882a593Smuzhiyun			  /* Bank GPIOY */
249*4882a593Smuzhiyun			  "Revision (upper)", "Revision (lower)",
250*4882a593Smuzhiyun			  "J2 Header Pin 7", "", "J2 Header Pin 12",
251*4882a593Smuzhiyun			  "J2 Header Pin 11", "", "", "",
252*4882a593Smuzhiyun			  "TFLASH_VDD_EN", "", "",
253*4882a593Smuzhiyun			  /* Bank GPIODV */
254*4882a593Smuzhiyun			  "VCCK_PWM (PWM_C)", "I2CA_SDA", "I2CA_SCL",
255*4882a593Smuzhiyun			  "I2CB_SDA", "I2CB_SCL", "VDDEE_PWM (PWM_D)",
256*4882a593Smuzhiyun			  "",
257*4882a593Smuzhiyun			  /* Bank GPIOH */
258*4882a593Smuzhiyun			  "HDMI_HPD", "HDMI_I2C_SDA", "HDMI_I2C_SCL",
259*4882a593Smuzhiyun			  "ETH_PHY_INTR", "ETH_PHY_NRST", "ETH_TXD1",
260*4882a593Smuzhiyun			  "ETH_TXD0", "ETH_TXD3", "ETH_TXD2",
261*4882a593Smuzhiyun			  "ETH_RGMII_TX_CLK",
262*4882a593Smuzhiyun			  /* Bank CARD */
263*4882a593Smuzhiyun			  "SD_DATA1 (SDB_D1)", "SD_DATA0 (SDB_D0)",
264*4882a593Smuzhiyun			  "SD_CLK",  "SD_CMD", "SD_DATA3 (SDB_D3)",
265*4882a593Smuzhiyun			  "SD_DATA2 (SDB_D2)", "SD_CDN (SD_DET_N)",
266*4882a593Smuzhiyun			  /* Bank BOOT */
267*4882a593Smuzhiyun			  "SDC_D0 (EMMC)", "SDC_D1 (EMMC)",
268*4882a593Smuzhiyun			  "SDC_D2 (EMMC)", "SDC_D3 (EMMC)",
269*4882a593Smuzhiyun			  "SDC_D4 (EMMC)", "SDC_D5 (EMMC)",
270*4882a593Smuzhiyun			  "SDC_D6 (EMMC)", "SDC_D7 (EMMC)",
271*4882a593Smuzhiyun			  "SDC_CLK (EMMC)", "SDC_RSTn (EMMC)",
272*4882a593Smuzhiyun			  "SDC_CMD (EMMC)", "BOOT_SEL", "", "", "",
273*4882a593Smuzhiyun			  "", "", "", "",
274*4882a593Smuzhiyun			  /* Bank DIF */
275*4882a593Smuzhiyun			  "ETH_RXD1", "ETH_RXD0", "ETH_RX_DV",
276*4882a593Smuzhiyun			  "RGMII_RX_CLK", "ETH_RXD3", "ETH_RXD2",
277*4882a593Smuzhiyun			  "ETH_TXEN", "ETH_PHY_REF_CLK_25MOUT",
278*4882a593Smuzhiyun			  "ETH_MDC", "ETH_MDIO";
279*4882a593Smuzhiyun};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun&gpio_ao {
282*4882a593Smuzhiyun	gpio-line-names = "UART TX", "UART RX", "",
283*4882a593Smuzhiyun			  "TF_3V3N_1V8_EN", "USB_HUB_RST_N",
284*4882a593Smuzhiyun			  "USB_OTG_PWREN", "J7 Header Pin 2",
285*4882a593Smuzhiyun			  "IR_IN", "J7 Header Pin 4",
286*4882a593Smuzhiyun			  "J7 Header Pin 6", "J7 Header Pin 5",
287*4882a593Smuzhiyun			  "J7 Header Pin 7", "HDMI_CEC",
288*4882a593Smuzhiyun			  "SYS_LED", "", "";
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun	/*
291*4882a593Smuzhiyun	 * WARNING: The USB Hub on the Odroid-C1/C1+ needs a reset signal
292*4882a593Smuzhiyun	 * to be turned high in order to be detected by the USB Controller.
293*4882a593Smuzhiyun	 * This signal should be handled by a USB specific power sequence
294*4882a593Smuzhiyun	 * in order to reset the Hub when USB bus is powered down.
295*4882a593Smuzhiyun	 */
296*4882a593Smuzhiyun	usb-hub {
297*4882a593Smuzhiyun		gpio-hog;
298*4882a593Smuzhiyun		gpios = <GPIOAO_4 GPIO_ACTIVE_HIGH>;
299*4882a593Smuzhiyun		output-high;
300*4882a593Smuzhiyun		line-name = "usb-hub-reset";
301*4882a593Smuzhiyun	};
302*4882a593Smuzhiyun};
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun&ir_receiver {
305*4882a593Smuzhiyun	status = "okay";
306*4882a593Smuzhiyun	pinctrl-0 = <&ir_recv_pins>;
307*4882a593Smuzhiyun	pinctrl-names = "default";
308*4882a593Smuzhiyun};
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun&mali {
311*4882a593Smuzhiyun	mali-supply = <&vddee>;
312*4882a593Smuzhiyun};
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun&saradc {
315*4882a593Smuzhiyun	status = "okay";
316*4882a593Smuzhiyun	vref-supply = <&vcc_1v8>;
317*4882a593Smuzhiyun};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun&sdhc {
320*4882a593Smuzhiyun	status = "okay";
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun	pinctrl-0 = <&sdxc_c_pins>;
323*4882a593Smuzhiyun	pinctrl-names = "default";
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun	bus-width = <8>;
326*4882a593Smuzhiyun	max-frequency = <100000000>;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun	disable-wp;
329*4882a593Smuzhiyun	cap-mmc-highspeed;
330*4882a593Smuzhiyun	mmc-hs200-1_8v;
331*4882a593Smuzhiyun	no-sdio;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun	mmc-pwrseq = <&emmc_pwrseq>;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun	vmmc-supply = <&vcc_3v3>;
336*4882a593Smuzhiyun	vqmmc-supply = <&vcc_1v8>;
337*4882a593Smuzhiyun};
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun&sdio {
340*4882a593Smuzhiyun	status = "okay";
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun	pinctrl-0 = <&sd_b_pins>;
343*4882a593Smuzhiyun	pinctrl-names = "default";
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun	/* SD card */
346*4882a593Smuzhiyun	sd_card_slot: slot@1 {
347*4882a593Smuzhiyun		compatible = "mmc-slot";
348*4882a593Smuzhiyun		reg = <1>;
349*4882a593Smuzhiyun		status = "okay";
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun		bus-width = <4>;
352*4882a593Smuzhiyun		no-sdio;
353*4882a593Smuzhiyun		cap-mmc-highspeed;
354*4882a593Smuzhiyun		cap-sd-highspeed;
355*4882a593Smuzhiyun		disable-wp;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun		cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun		vmmc-supply = <&tflash_vdd>;
360*4882a593Smuzhiyun		vqmmc-supply = <&tf_io>;
361*4882a593Smuzhiyun	};
362*4882a593Smuzhiyun};
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun&pwm_cd {
365*4882a593Smuzhiyun	status = "okay";
366*4882a593Smuzhiyun	pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
367*4882a593Smuzhiyun	pinctrl-names = "default";
368*4882a593Smuzhiyun	clocks = <&xtal>, <&xtal>;
369*4882a593Smuzhiyun	clock-names = "clkin0", "clkin1";
370*4882a593Smuzhiyun};
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun&rtc {
373*4882a593Smuzhiyun	/* needs to be enabled manually when a battery is connected */
374*4882a593Smuzhiyun	clocks = <&rtc32k_xtal>;
375*4882a593Smuzhiyun	vdd-supply = <&vdd_rtc>;
376*4882a593Smuzhiyun};
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun&uart_AO {
379*4882a593Smuzhiyun	status = "okay";
380*4882a593Smuzhiyun	pinctrl-0 = <&uart_ao_a_pins>;
381*4882a593Smuzhiyun	pinctrl-names = "default";
382*4882a593Smuzhiyun};
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun&usb1_phy {
385*4882a593Smuzhiyun	status = "okay";
386*4882a593Smuzhiyun};
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun&usb1 {
389*4882a593Smuzhiyun	status = "okay";
390*4882a593Smuzhiyun};
391