xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2018 BayLibre SAS. All rights reserved.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun#include "meson-g12a.dtsi"
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun#include <dt-bindings/gpio/meson-g12a-gpio.h>
11*4882a593Smuzhiyun#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	compatible = "amediatech,x96-max", "amlogic,g12a";
15*4882a593Smuzhiyun	model = "Shenzhen Amediatech Technology Co., Ltd X96 Max";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	aliases {
18*4882a593Smuzhiyun		serial0 = &uart_AO;
19*4882a593Smuzhiyun		ethernet0 = &ethmac;
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	spdif_dit: audio-codec-1 {
23*4882a593Smuzhiyun		#sound-dai-cells = <0>;
24*4882a593Smuzhiyun		compatible = "linux,spdif-dit";
25*4882a593Smuzhiyun		status = "okay";
26*4882a593Smuzhiyun		sound-name-prefix = "DIT";
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	chosen {
30*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun	memory@0 {
33*4882a593Smuzhiyun		device_type = "memory";
34*4882a593Smuzhiyun		reg = <0x0 0x0 0x0 0x40000000>;
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun	cvbs-connector {
38*4882a593Smuzhiyun		compatible = "composite-video-connector";
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		port {
41*4882a593Smuzhiyun			cvbs_connector_in: endpoint {
42*4882a593Smuzhiyun				remote-endpoint = <&cvbs_vdac_out>;
43*4882a593Smuzhiyun			};
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	hdmi-connector {
48*4882a593Smuzhiyun		compatible = "hdmi-connector";
49*4882a593Smuzhiyun		type = "a";
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun		port {
52*4882a593Smuzhiyun			hdmi_connector_in: endpoint {
53*4882a593Smuzhiyun				remote-endpoint = <&hdmi_tx_tmds_out>;
54*4882a593Smuzhiyun			};
55*4882a593Smuzhiyun		};
56*4882a593Smuzhiyun	};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	emmc_pwrseq: emmc-pwrseq {
59*4882a593Smuzhiyun		compatible = "mmc-pwrseq-emmc";
60*4882a593Smuzhiyun		reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
64*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
65*4882a593Smuzhiyun		reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
66*4882a593Smuzhiyun		clocks = <&wifi32k>;
67*4882a593Smuzhiyun		clock-names = "ext_clock";
68*4882a593Smuzhiyun	};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun	flash_1v8: regulator-flash_1v8 {
71*4882a593Smuzhiyun		compatible = "regulator-fixed";
72*4882a593Smuzhiyun		regulator-name = "FLASH_1V8";
73*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
74*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
75*4882a593Smuzhiyun		vin-supply = <&vcc_3v3>;
76*4882a593Smuzhiyun		regulator-always-on;
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	dc_in: regulator-dc_in {
80*4882a593Smuzhiyun		compatible = "regulator-fixed";
81*4882a593Smuzhiyun		regulator-name = "DC_IN";
82*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
83*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
84*4882a593Smuzhiyun		regulator-always-on;
85*4882a593Smuzhiyun	};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun	vcc_1v8: regulator-vcc_1v8 {
88*4882a593Smuzhiyun		compatible = "regulator-fixed";
89*4882a593Smuzhiyun		regulator-name = "VCC_1V8";
90*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
91*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
92*4882a593Smuzhiyun		vin-supply = <&vcc_3v3>;
93*4882a593Smuzhiyun		regulator-always-on;
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	vcc_3v3: regulator-vcc_3v3 {
97*4882a593Smuzhiyun		compatible = "regulator-fixed";
98*4882a593Smuzhiyun		regulator-name = "VCC_3V3";
99*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
100*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
101*4882a593Smuzhiyun		vin-supply = <&vddao_3v3>;
102*4882a593Smuzhiyun		regulator-always-on;
103*4882a593Smuzhiyun		/* FIXME: actually controlled by VDDCPU_B_EN */
104*4882a593Smuzhiyun	};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun	vcc_5v: regulator-vcc_5v {
107*4882a593Smuzhiyun		compatible = "regulator-fixed";
108*4882a593Smuzhiyun		regulator-name = "VCC_5V";
109*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
110*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
111*4882a593Smuzhiyun		vin-supply = <&dc_in>;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun		gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
114*4882a593Smuzhiyun		enable-active-low;
115*4882a593Smuzhiyun	};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun	vddao_1v8: regulator-vddao_1v8 {
118*4882a593Smuzhiyun		compatible = "regulator-fixed";
119*4882a593Smuzhiyun		regulator-name = "VDDAO_1V8";
120*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
121*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
122*4882a593Smuzhiyun		vin-supply = <&vddao_3v3>;
123*4882a593Smuzhiyun		regulator-always-on;
124*4882a593Smuzhiyun	};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun	vddao_3v3: regulator-vddao_3v3 {
127*4882a593Smuzhiyun		compatible = "regulator-fixed";
128*4882a593Smuzhiyun		regulator-name = "VDDAO_3V3";
129*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
130*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
131*4882a593Smuzhiyun		vin-supply = <&dc_in>;
132*4882a593Smuzhiyun		regulator-always-on;
133*4882a593Smuzhiyun	};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	vddcpu: regulator-vddcpu {
136*4882a593Smuzhiyun		compatible = "pwm-regulator";
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun		regulator-name = "VDDCPU";
139*4882a593Smuzhiyun		regulator-min-microvolt = <721000>;
140*4882a593Smuzhiyun		regulator-max-microvolt = <1022000>;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun		pwm-supply = <&dc_in>;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun		pwms = <&pwm_AO_cd 1 1250 0>;
145*4882a593Smuzhiyun		pwm-dutycycle-range = <100 0>;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun		regulator-boot-on;
148*4882a593Smuzhiyun		regulator-always-on;
149*4882a593Smuzhiyun	};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun	sound {
152*4882a593Smuzhiyun		compatible = "amlogic,axg-sound-card";
153*4882a593Smuzhiyun		model = "G12A-X96-MAX";
154*4882a593Smuzhiyun		audio-aux-devs = <&tdmout_b>;
155*4882a593Smuzhiyun		audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
156*4882a593Smuzhiyun				"TDMOUT_B IN 1", "FRDDR_B OUT 1",
157*4882a593Smuzhiyun				"TDMOUT_B IN 2", "FRDDR_C OUT 1",
158*4882a593Smuzhiyun				"TDM_B Playback", "TDMOUT_B OUT",
159*4882a593Smuzhiyun				"SPDIFOUT IN 0", "FRDDR_A OUT 3",
160*4882a593Smuzhiyun				"SPDIFOUT IN 1", "FRDDR_B OUT 3",
161*4882a593Smuzhiyun				"SPDIFOUT IN 2", "FRDDR_C OUT 3";
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun		assigned-clocks = <&clkc CLKID_MPLL2>,
164*4882a593Smuzhiyun				  <&clkc CLKID_MPLL0>,
165*4882a593Smuzhiyun				  <&clkc CLKID_MPLL1>;
166*4882a593Smuzhiyun		assigned-clock-parents = <0>, <0>, <0>;
167*4882a593Smuzhiyun		assigned-clock-rates = <294912000>,
168*4882a593Smuzhiyun				       <270950400>,
169*4882a593Smuzhiyun				       <393216000>;
170*4882a593Smuzhiyun		status = "okay";
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun		dai-link-0 {
173*4882a593Smuzhiyun			sound-dai = <&frddr_a>;
174*4882a593Smuzhiyun		};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun		dai-link-1 {
177*4882a593Smuzhiyun			sound-dai = <&frddr_b>;
178*4882a593Smuzhiyun		};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun		dai-link-2 {
181*4882a593Smuzhiyun			sound-dai = <&frddr_c>;
182*4882a593Smuzhiyun		};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun		/* 8ch hdmi interface */
185*4882a593Smuzhiyun		dai-link-3 {
186*4882a593Smuzhiyun			sound-dai = <&tdmif_b>;
187*4882a593Smuzhiyun			dai-format = "i2s";
188*4882a593Smuzhiyun			dai-tdm-slot-tx-mask-0 = <1 1>;
189*4882a593Smuzhiyun			dai-tdm-slot-tx-mask-1 = <1 1>;
190*4882a593Smuzhiyun			dai-tdm-slot-tx-mask-2 = <1 1>;
191*4882a593Smuzhiyun			dai-tdm-slot-tx-mask-3 = <1 1>;
192*4882a593Smuzhiyun			mclk-fs = <256>;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun			codec {
195*4882a593Smuzhiyun				sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
196*4882a593Smuzhiyun			};
197*4882a593Smuzhiyun		};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun		/* spdif hdmi or toslink interface */
200*4882a593Smuzhiyun		dai-link-4 {
201*4882a593Smuzhiyun			sound-dai = <&spdifout>;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun			codec-0 {
204*4882a593Smuzhiyun				sound-dai = <&spdif_dit>;
205*4882a593Smuzhiyun			};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun			codec-1 {
208*4882a593Smuzhiyun				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
209*4882a593Smuzhiyun			};
210*4882a593Smuzhiyun		};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun		/* spdif hdmi interface */
213*4882a593Smuzhiyun		dai-link-5 {
214*4882a593Smuzhiyun			sound-dai = <&spdifout_b>;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun			codec {
217*4882a593Smuzhiyun				sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
218*4882a593Smuzhiyun			};
219*4882a593Smuzhiyun		};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun		/* hdmi glue */
222*4882a593Smuzhiyun		dai-link-6 {
223*4882a593Smuzhiyun			sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun			codec {
226*4882a593Smuzhiyun				sound-dai = <&hdmi_tx>;
227*4882a593Smuzhiyun			};
228*4882a593Smuzhiyun		};
229*4882a593Smuzhiyun	};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun	wifi32k: wifi32k {
232*4882a593Smuzhiyun		compatible = "pwm-clock";
233*4882a593Smuzhiyun		#clock-cells = <0>;
234*4882a593Smuzhiyun		clock-frequency = <32768>;
235*4882a593Smuzhiyun		pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
236*4882a593Smuzhiyun	};
237*4882a593Smuzhiyun};
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun&arb {
240*4882a593Smuzhiyun	status = "okay";
241*4882a593Smuzhiyun};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun&cec_AO {
244*4882a593Smuzhiyun	pinctrl-0 = <&cec_ao_a_h_pins>;
245*4882a593Smuzhiyun	pinctrl-names = "default";
246*4882a593Smuzhiyun	status = "disabled";
247*4882a593Smuzhiyun	hdmi-phandle = <&hdmi_tx>;
248*4882a593Smuzhiyun};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun&cecb_AO {
251*4882a593Smuzhiyun	pinctrl-0 = <&cec_ao_b_h_pins>;
252*4882a593Smuzhiyun	pinctrl-names = "default";
253*4882a593Smuzhiyun	status = "okay";
254*4882a593Smuzhiyun	hdmi-phandle = <&hdmi_tx>;
255*4882a593Smuzhiyun};
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun&clkc_audio {
258*4882a593Smuzhiyun	status = "okay";
259*4882a593Smuzhiyun};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun&cpu0 {
262*4882a593Smuzhiyun	cpu-supply = <&vddcpu>;
263*4882a593Smuzhiyun	operating-points-v2 = <&cpu_opp_table>;
264*4882a593Smuzhiyun	clocks = <&clkc CLKID_CPU_CLK>;
265*4882a593Smuzhiyun	clock-latency = <50000>;
266*4882a593Smuzhiyun};
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun&cpu1 {
269*4882a593Smuzhiyun	cpu-supply = <&vddcpu>;
270*4882a593Smuzhiyun	operating-points-v2 = <&cpu_opp_table>;
271*4882a593Smuzhiyun	clocks = <&clkc CLKID_CPU_CLK>;
272*4882a593Smuzhiyun	clock-latency = <50000>;
273*4882a593Smuzhiyun};
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun&cpu2 {
276*4882a593Smuzhiyun	cpu-supply = <&vddcpu>;
277*4882a593Smuzhiyun	operating-points-v2 = <&cpu_opp_table>;
278*4882a593Smuzhiyun	clocks = <&clkc CLKID_CPU_CLK>;
279*4882a593Smuzhiyun	clock-latency = <50000>;
280*4882a593Smuzhiyun};
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun&cpu3 {
283*4882a593Smuzhiyun	cpu-supply = <&vddcpu>;
284*4882a593Smuzhiyun	operating-points-v2 = <&cpu_opp_table>;
285*4882a593Smuzhiyun	clocks = <&clkc CLKID_CPU_CLK>;
286*4882a593Smuzhiyun	clock-latency = <50000>;
287*4882a593Smuzhiyun};
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun&cvbs_vdac_port {
290*4882a593Smuzhiyun	cvbs_vdac_out: endpoint {
291*4882a593Smuzhiyun		remote-endpoint = <&cvbs_connector_in>;
292*4882a593Smuzhiyun	};
293*4882a593Smuzhiyun};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun&frddr_a {
296*4882a593Smuzhiyun	status = "okay";
297*4882a593Smuzhiyun};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun&frddr_b {
300*4882a593Smuzhiyun	status = "okay";
301*4882a593Smuzhiyun};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun&frddr_c {
304*4882a593Smuzhiyun	status = "okay";
305*4882a593Smuzhiyun};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun&hdmi_tx {
308*4882a593Smuzhiyun	status = "okay";
309*4882a593Smuzhiyun	pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
310*4882a593Smuzhiyun	pinctrl-names = "default";
311*4882a593Smuzhiyun	hdmi-supply = <&vcc_5v>;
312*4882a593Smuzhiyun};
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun&hdmi_tx_tmds_port {
315*4882a593Smuzhiyun	hdmi_tx_tmds_out: endpoint {
316*4882a593Smuzhiyun		remote-endpoint = <&hdmi_connector_in>;
317*4882a593Smuzhiyun	};
318*4882a593Smuzhiyun};
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun&ir {
321*4882a593Smuzhiyun	status = "okay";
322*4882a593Smuzhiyun	pinctrl-0 = <&remote_input_ao_pins>;
323*4882a593Smuzhiyun	pinctrl-names = "default";
324*4882a593Smuzhiyun	linux,rc-map-name = "rc-x96max";
325*4882a593Smuzhiyun};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun&pwm_AO_cd {
328*4882a593Smuzhiyun	pinctrl-0 = <&pwm_ao_d_e_pins>;
329*4882a593Smuzhiyun	pinctrl-names = "default";
330*4882a593Smuzhiyun	clocks = <&xtal>;
331*4882a593Smuzhiyun	clock-names = "clkin1";
332*4882a593Smuzhiyun	status = "okay";
333*4882a593Smuzhiyun};
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun&ext_mdio {
336*4882a593Smuzhiyun	external_phy: ethernet-phy@0 {
337*4882a593Smuzhiyun		/* Realtek RTL8211F (0x001cc916) */
338*4882a593Smuzhiyun		reg = <0>;
339*4882a593Smuzhiyun		max-speed = <1000>;
340*4882a593Smuzhiyun		eee-broken-1000t;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun		reset-assert-us = <10000>;
343*4882a593Smuzhiyun		reset-deassert-us = <80000>;
344*4882a593Smuzhiyun		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun		interrupt-parent = <&gpio_intc>;
347*4882a593Smuzhiyun		/* MAC_INTR on GPIOZ_14 */
348*4882a593Smuzhiyun		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
349*4882a593Smuzhiyun	};
350*4882a593Smuzhiyun};
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun&ethmac {
353*4882a593Smuzhiyun	pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
354*4882a593Smuzhiyun	pinctrl-names = "default";
355*4882a593Smuzhiyun	status = "okay";
356*4882a593Smuzhiyun	phy-mode = "rgmii";
357*4882a593Smuzhiyun	phy-handle = <&external_phy>;
358*4882a593Smuzhiyun	amlogic,tx-delay-ns = <2>;
359*4882a593Smuzhiyun};
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun&pwm_ef {
362*4882a593Smuzhiyun	status = "okay";
363*4882a593Smuzhiyun	pinctrl-0 = <&pwm_e_pins>;
364*4882a593Smuzhiyun	pinctrl-names = "default";
365*4882a593Smuzhiyun	clocks = <&xtal>;
366*4882a593Smuzhiyun	clock-names = "clkin0";
367*4882a593Smuzhiyun};
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun&uart_A {
370*4882a593Smuzhiyun	status = "okay";
371*4882a593Smuzhiyun	pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
372*4882a593Smuzhiyun	pinctrl-names = "default";
373*4882a593Smuzhiyun	uart-has-rtscts;
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun	bluetooth {
376*4882a593Smuzhiyun		compatible = "brcm,bcm43438-bt";
377*4882a593Smuzhiyun		shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
378*4882a593Smuzhiyun		max-speed = <2000000>;
379*4882a593Smuzhiyun		clocks = <&wifi32k>;
380*4882a593Smuzhiyun		clock-names = "lpo";
381*4882a593Smuzhiyun	};
382*4882a593Smuzhiyun};
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun&uart_AO {
385*4882a593Smuzhiyun	status = "okay";
386*4882a593Smuzhiyun	pinctrl-0 = <&uart_ao_a_pins>;
387*4882a593Smuzhiyun	pinctrl-names = "default";
388*4882a593Smuzhiyun};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun&usb {
391*4882a593Smuzhiyun	status = "okay";
392*4882a593Smuzhiyun	dr_mode = "host";
393*4882a593Smuzhiyun};
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun/* SDIO */
396*4882a593Smuzhiyun&sd_emmc_a {
397*4882a593Smuzhiyun	status = "okay";
398*4882a593Smuzhiyun	pinctrl-0 = <&sdio_pins>;
399*4882a593Smuzhiyun	pinctrl-1 = <&sdio_clk_gate_pins>;
400*4882a593Smuzhiyun	pinctrl-names = "default", "clk-gate";
401*4882a593Smuzhiyun	#address-cells = <1>;
402*4882a593Smuzhiyun	#size-cells = <0>;
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun	bus-width = <4>;
405*4882a593Smuzhiyun	cap-sd-highspeed;
406*4882a593Smuzhiyun	sd-uhs-sdr50;
407*4882a593Smuzhiyun	max-frequency = <100000000>;
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun	non-removable;
410*4882a593Smuzhiyun	disable-wp;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun	/* WiFi firmware requires power to be kept while in suspend */
413*4882a593Smuzhiyun	keep-power-in-suspend;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun	vmmc-supply = <&vddao_3v3>;
418*4882a593Smuzhiyun	vqmmc-supply = <&vddao_1v8>;
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun	brcmf: wifi@1 {
421*4882a593Smuzhiyun		reg = <1>;
422*4882a593Smuzhiyun		compatible = "brcm,bcm4329-fmac";
423*4882a593Smuzhiyun	};
424*4882a593Smuzhiyun};
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun/* SD card */
427*4882a593Smuzhiyun&sd_emmc_b {
428*4882a593Smuzhiyun	status = "okay";
429*4882a593Smuzhiyun	pinctrl-0 = <&sdcard_c_pins>;
430*4882a593Smuzhiyun	pinctrl-1 = <&sdcard_clk_gate_c_pins>;
431*4882a593Smuzhiyun	pinctrl-names = "default", "clk-gate";
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun	bus-width = <4>;
434*4882a593Smuzhiyun	cap-sd-highspeed;
435*4882a593Smuzhiyun	max-frequency = <100000000>;
436*4882a593Smuzhiyun	disable-wp;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun	cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
439*4882a593Smuzhiyun	vmmc-supply = <&vddao_3v3>;
440*4882a593Smuzhiyun	vqmmc-supply = <&vddao_3v3>;
441*4882a593Smuzhiyun};
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun/* eMMC */
444*4882a593Smuzhiyun&sd_emmc_c {
445*4882a593Smuzhiyun	status = "okay";
446*4882a593Smuzhiyun	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
447*4882a593Smuzhiyun	pinctrl-1 = <&emmc_clk_gate_pins>;
448*4882a593Smuzhiyun	pinctrl-names = "default", "clk-gate";
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun	bus-width = <8>;
451*4882a593Smuzhiyun	cap-mmc-highspeed;
452*4882a593Smuzhiyun	max-frequency = <100000000>;
453*4882a593Smuzhiyun	non-removable;
454*4882a593Smuzhiyun	disable-wp;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun	mmc-pwrseq = <&emmc_pwrseq>;
457*4882a593Smuzhiyun	vmmc-supply = <&vcc_3v3>;
458*4882a593Smuzhiyun	vqmmc-supply = <&flash_1v8>;
459*4882a593Smuzhiyun};
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun&spdifout {
462*4882a593Smuzhiyun	pinctrl-0 = <&spdif_out_h_pins>;
463*4882a593Smuzhiyun	pinctrl-names = "default";
464*4882a593Smuzhiyun	status = "okay";
465*4882a593Smuzhiyun};
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun&spdifout_b {
468*4882a593Smuzhiyun	status = "okay";
469*4882a593Smuzhiyun};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun&tdmif_b {
472*4882a593Smuzhiyun	status = "okay";
473*4882a593Smuzhiyun};
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun&tdmout_b {
476*4882a593Smuzhiyun	status = "okay";
477*4882a593Smuzhiyun};
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun&tohdmitx {
480*4882a593Smuzhiyun	status = "okay";
481*4882a593Smuzhiyun};
482