| /OK3568_Linux_fs/u-boot/include/dt-bindings/clock/ |
| H A D | rk3036-cru.h | 12 #define PLL_APLL 1 macro
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| H A D | rk3188-cru-common.h | 12 #define PLL_APLL 1 macro
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| H A D | rk3128-cru.h | 11 #define PLL_APLL 1 macro
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| H A D | rk3228-cru.h | 11 #define PLL_APLL 1 macro
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| H A D | rv1108-cru.h | 11 #define PLL_APLL 0 macro
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| H A D | rk3308-cru.h | 20 #define PLL_APLL 1 macro
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| H A D | px30-cru.h | 20 #define PLL_APLL 1 macro
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| H A D | rk3288-cru.h | 9 #define PLL_APLL 1 macro
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| H A D | rk3328-cru.h | 11 #define PLL_APLL 1 macro
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| /OK3568_Linux_fs/kernel/include/dt-bindings/clock/ |
| H A D | rk3036-cru.h | 11 #define PLL_APLL 1 macro
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| H A D | rk3188-cru-common.h | 11 #define PLL_APLL 1 macro
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| H A D | rk3128-cru.h | 11 #define PLL_APLL 1 macro
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| H A D | rk3228-cru.h | 11 #define PLL_APLL 1 macro
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| H A D | rv1108-cru.h | 11 #define PLL_APLL 0 macro
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| H A D | rk3328-cru.h | 11 #define PLL_APLL 1 macro
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| H A D | rk3288-cru.h | 11 #define PLL_APLL 1 macro
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| H A D | px30-cru.h | 7 #define PLL_APLL 1 macro
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| H A D | rk3308-cru.h | 11 #define PLL_APLL 1 macro
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| /OK3568_Linux_fs/kernel/drivers/clk/rockchip/ |
| H A D | clk-rk3188.c | 217 [apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
228 [apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
794 2, clks[PLL_APLL], clks[PLL_GPLL], in rk3066a_clk_init()
819 2, clks[PLL_APLL], clks[PLL_GPLL], in rk3188a_clk_init()
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| H A D | clk-rk3036.c | 143 [apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0),
486 2, clks[PLL_APLL], clks[PLL_GPLL], in rk3036_clk_init()
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| /OK3568_Linux_fs/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3128.c | 66 RK3128_CLK_DUMP(PLL_APLL, "apll", true),
81 [APLL] = PLL(pll_rk3036, PLL_APLL, RK2928_PLL_CON(0),
535 case PLL_APLL: in rk3128_clk_get_rate()
599 case PLL_APLL: in rk3128_clk_set_rate()
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| H A D | clk_rk322x.c | 67 RK322x_CLK_DUMP(PLL_APLL, "apll", true),
82 [APLL] = PLL(pll_rk3036, PLL_APLL, RK2928_PLL_CON(0),
582 case PLL_APLL: in rk322x_clk_get_rate()
643 case PLL_APLL: in rk322x_clk_set_rate()
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| H A D | clk_rk3328.c | 90 RK3328_CLK_DUMP(PLL_APLL, "apll", true),
106 [APLL] = PLL(pll_rk3328, PLL_APLL, RK3328_PLL_CON(0),
800 case PLL_APLL: in rk3328_clk_get_rate()
873 case PLL_APLL: in rk3328_clk_set_rate()
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| H A D | clk_rk3066.c | 48 RK3066_CLK_DUMP(PLL_APLL, "apll", true),
513 case PLL_APLL: in rk3066_clk_set_rate()
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3288/ |
| H A D | rk3288.c | 269 clk.id = PLL_APLL; in veyron_init()
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