| /OK3568_Linux_fs/kernel/include/dt-bindings/clock/ |
| H A D | exynos5410.h | 24 #define CLK_SCLK_UART2 130 macro
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| H A D | exynos5250.h | 44 #define CLK_SCLK_UART2 148 macro
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| H A D | exynos7-clk.h | 39 #define CLK_SCLK_UART2 5 macro
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| H A D | exynos4.h | 66 #define CLK_SCLK_UART2 153 macro
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| H A D | exynos5420.h | 31 #define CLK_SCLK_UART2 130 macro
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| H A D | exynos3250.h | 256 #define CLK_SCLK_UART2 248 macro
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| H A D | exynos5433.h | 435 #define CLK_SCLK_UART2 34 macro
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | exynos5250-clock.txt | 39 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| H A D | exynos5420-clock.txt | 40 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| H A D | exynos4-clock.txt | 41 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| /OK3568_Linux_fs/u-boot/include/dt-bindings/clock/ |
| H A D | exynos7420-clk.h | 42 #define CLK_SCLK_UART2 5 macro
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | exynos7420.dtsi | 53 <&clock_top0 CLK_SCLK_UART2>,
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| /OK3568_Linux_fs/u-boot/drivers/clk/exynos/ |
| H A D | clk-exynos7420.c | 131 case CLK_SCLK_UART2: in exynos7420_top0_get_rate()
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| /OK3568_Linux_fs/kernel/drivers/clk/samsung/ |
| H A D | clk-exynos5410.c | 216 GATE(CLK_SCLK_UART2, "sclk_uart2", "div_uart2",
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| H A D | clk-exynos5250.c | 495 GATE(CLK_SCLK_UART2, "sclk_uart2", "div_uart2",
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| H A D | clk-exynos3250.c | 563 GATE(CLK_SCLK_UART2, "sclk_uart2", "div_uart2",
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| H A D | clk-exynos7.c | 361 GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_sclk_uart2",
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| H A D | clk-exynos4.c | 781 GATE(CLK_SCLK_UART2, "uclk2", "div_uart2", SRC_MASK_PERIL0, 8,
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| H A D | clk-exynos5420.c | 983 GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_uart2",
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | exynos5410.dtsi | 358 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| H A D | exynos3250.dtsi | 526 clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
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| H A D | exynos4.dtsi | 475 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| H A D | exynos5250.dtsi | 1209 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| H A D | exynos5420.dtsi | 1343 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/exynos/ |
| H A D | exynos7.dtsi | 188 <&clock_top0 CLK_SCLK_UART2>,
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