xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/exynos5250-clock.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* Samsung Exynos5250 Clock Controller
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThe Exynos5250 clock controller generates and supplies clock to various
4*4882a593Smuzhiyuncontrollers within the Exynos5250 SoC.
5*4882a593Smuzhiyun
6*4882a593SmuzhiyunRequired Properties:
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun- compatible: should be one of the following.
9*4882a593Smuzhiyun  - "samsung,exynos5250-clock" - controller compatible with Exynos5250 SoC.
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped
12*4882a593Smuzhiyun  region.
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun- #clock-cells: should be 1.
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunEach clock is assigned an identifier and client nodes can use this identifier
17*4882a593Smuzhiyunto specify the clock which they consume.
18*4882a593Smuzhiyun
19*4882a593SmuzhiyunAll available clocks are defined as preprocessor macros in
20*4882a593Smuzhiyundt-bindings/clock/exynos5250.h header and can be used in device
21*4882a593Smuzhiyuntree sources.
22*4882a593Smuzhiyun
23*4882a593SmuzhiyunExample 1: An example of a clock controller node is listed below.
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	clock: clock-controller@10010000 {
26*4882a593Smuzhiyun		compatible = "samsung,exynos5250-clock";
27*4882a593Smuzhiyun		reg = <0x10010000 0x30000>;
28*4882a593Smuzhiyun		#clock-cells = <1>;
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593SmuzhiyunExample 2: UART controller node that consumes the clock generated by the clock
32*4882a593Smuzhiyun	   controller. Refer to the standard clock bindings for information
33*4882a593Smuzhiyun	   about 'clocks' and 'clock-names' property.
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	serial@13820000 {
36*4882a593Smuzhiyun		compatible = "samsung,exynos4210-uart";
37*4882a593Smuzhiyun		reg = <0x13820000 0x100>;
38*4882a593Smuzhiyun		interrupts = <0 54 0>;
39*4882a593Smuzhiyun		clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
40*4882a593Smuzhiyun		clock-names = "uart", "clk_uart_baud0";
41*4882a593Smuzhiyun	};
42