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Searched refs:CLK_MM_DISP_WDMA0 (Results 1 – 14 of 14) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt6765-mm.c43 GATE_MM(CLK_MM_DISP_WDMA0, "mm_disp_wdma0", "mm_ck", 11),
H A Dclk-mt8183-mm.c61 GATE_MM0(CLK_MM_DISP_WDMA0, "mm_disp_wdma0", "mm_sel", 25),
H A Dclk-mt6797-mm.c66 GATE_MM0(CLK_MM_DISP_WDMA0, "mm_disp_wdma0", "mm_sel", 21),
H A Dclk-mt6779-mm.c60 GATE_MM0(CLK_MM_DISP_WDMA0, "mm_disp_wdma0", "mm_sel", 25),
H A Dclk-mt8173-mm.c68 GATE_MM0(CLK_MM_DISP_WDMA0, "mm_disp_wdma0", "mm_sel", 21),
H A Dclk-mt2712-mm.c83 GATE_MM0(CLK_MM_DISP_WDMA0, "mm_disp_wdma0", "mm_sel", 21),
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt6797-clk.h236 #define CLK_MM_DISP_WDMA0 22 macro
H A Dmt6765-clk.h262 #define CLK_MM_DISP_WDMA0 11 macro
H A Dmt8173-clk.h269 #define CLK_MM_DISP_WDMA0 21 macro
H A Dmt8183-clk.h333 #define CLK_MM_DISP_WDMA0 24 macro
H A Dmt2712-clk.h322 #define CLK_MM_DISP_WDMA0 21 macro
H A Dmt6779-clk.h365 #define CLK_MM_DISP_WDMA0 25 macro
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,disp.txt133 clocks = <&mmsys CLK_MM_DISP_WDMA0>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi1067 clocks = <&mmsys CLK_MM_DISP_WDMA0>;