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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Chen-Yu Tsai <wens@csie.org>
15 - Maxime Ripard <mripard@kernel.org>
20 - const: allwinner,sun4i-a10-hdmi
21 - const: allwinner,sun5i-a10s-hdmi
22 - const: allwinner,sun6i-a31-hdmi
23 - items:
[all …]
H A Dbrcm,bcm2835-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
14 const: brcm,bcm2835-hdmi
18 - description: HDMI register range
19 - description: HD register range
26 - description: The pixel clock
27 - description: The HDMI state machine clock
[all …]
H A Dbrcm,bcm2711-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
15 - brcm,bcm2711-hdmi0
16 - brcm,bcm2711-hdmi1
20 - description: HDMI controller register range
21 - description: DVP register range
22 - description: HDMI PHY register range
[all …]
H A Dst,stih4xx.txt3 - sti-vtg: video timing generator
5 - compatible: "st,vtg"
6 - reg: Physical base address of the IP registers and length of memory mapped region.
8 - interrupts : VTG interrupt number to the CPU.
9 - st,slave: phandle on a slave vtg
11 - sti-vtac: video timing advanced inter dye communication Rx and TX
13 - compatible: "st,vtac-main" or "st,vtac-aux"
14 - reg: Physical base address of the IP registers and length of memory mapped region.
15 - clocks: from common clock binding: handle hardware IP needed clocks, the
17 See ../clocks/clock-bindings.txt for details.
[all …]
/OK3568_Linux_fs/kernel/drivers/media/i2c/it66353/
H A Dit66353.c1 // SPDX-License-Identifier: GPL-2.0
8 * Wangqiang Guo<kay.guo@rock-chips.com>
28 #include <linux/i2c-dev.h>
58 #define PR_IO(x) { if (g_enable_io_log) dev_dbg(g_it66353->dev, x); }
107 struct i2c_client *client = it66353->client; in i2c_wr()
113 msg.addr = client->addr; in i2c_wr()
117 err = i2c_transfer(client->adapter, &msg, 1); in i2c_wr()
119 dev_err(it66353->dev, "writing register 0x%x from 0x%x failed\n", in i2c_wr()
120 reg, client->addr); in i2c_wr()
124 dev_dbg(it66353->dev, "I2C write 0x%02x = 0x%02x\n", in i2c_wr()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/
H A Dsil-sii8620.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * Copyright (C) 2013-2014 Silicon Image, Inc.
243 /* LM DDC, default value: 0x80 */
252 /* DDC I2C Manual, default value: 0x03 */
263 /* DDC I2C Target Slave Address, default value: 0x00 */
267 /* DDC I2C Target Segment Address, default value: 0x00 */
270 /* DDC I2C Target Offset Address, default value: 0x00 */
273 /* DDC I2C Data In count #1, default value: 0x00 */
276 /* DDC I2C Data In count #2, default value: 0x00 */
280 /* DDC I2C Status, default value: 0x04 */
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/zte/
H A Dzx_vga.c1 // SPDX-License-Identifier: GPL-2.0-only
37 struct zx_vga_i2c *ddc; member
51 struct zx_vga_pwrctrl *pwrctrl = &vga->pwrctrl; in zx_vga_encoder_enable()
54 regmap_update_bits(pwrctrl->regmap, pwrctrl->reg, pwrctrl->mask, in zx_vga_encoder_enable()
55 pwrctrl->mask); in zx_vga_encoder_enable()
57 vou_inf_enable(VOU_VGA, encoder->crtc); in zx_vga_encoder_enable()
63 struct zx_vga_pwrctrl *pwrctrl = &vga->pwrctrl; in zx_vga_encoder_disable()
65 vou_inf_disable(VOU_VGA, encoder->crtc); in zx_vga_encoder_disable()
68 regmap_update_bits(pwrctrl->regmap, pwrctrl->reg, pwrctrl->mask, 0); in zx_vga_encoder_disable()
86 zx_writel(vga->mmio + VGA_AUTO_DETECT_SEL, 0); in zx_vga_connector_get_modes()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dmeson-gxbb-odroidc2.dts6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
47 #include "meson-gxbb.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
51 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
52 model = "Hardkernel ODROID-C2";
59 stdout-path = "serial0:115200n8";
67 usb_otg_pwr: regulator-usb-pwrs {
68 compatible = "regulator-fixed";
70 regulator-name = "USB_OTG_PWR";
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb-nanopi-k2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
12 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
21 stdout-path = "serial0:115200n8";
30 compatible = "gpio-leds";
32 led-stat {
33 label = "nanopi-k2:blue:stat";
35 default-state = "on";
[all …]
H A Dmeson-gxbb-odroidc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
14 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
15 model = "Hardkernel ODROID-C2";
23 stdout-path = "serial0:115200n8";
31 usb_otg_pwr: regulator-usb-pwrs {
32 compatible = "regulator-fixed";
34 regulator-name = "USB_OTG_PWR";
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/sun4i/
H A Dsun4i_hdmi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
15 #include <media/cec-pin.h>
37 #define SUN4I_HDMI_VID_TIMING_X(x) ((((x) - 1) & GENMASK(11, 0)))
38 #define SUN4I_HDMI_VID_TIMING_Y(y) ((((y) - 1) & GENMASK(11, 0)) << 16)
135 #define SUN4I_HDMI_DDC_FIFO_CTRL_RX_THRES_MAX (BIT(4) - 1)
138 #define SUN4I_HDMI_DDC_FIFO_CTRL_TX_THRES_MAX (BIT(4) - 1)
143 #define SUN4I_HDMI_DDC_BYTE_COUNT_MAX (BIT(10) - 1)
187 /* DDC CLK bit fields are the same, but the formula is not */
226 /* DDC FIFO register offset */
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsun5i-a10s.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/dma/sun4i-a10.h>
55 #address-cells = <1>;
56 #size-cells = <1>;
59 framebuffer-lcd0-hdmi {
60 compatible = "allwinner,simple-framebuffer",
61 "simple-framebuffer";
62 allwinner,pipeline = "de_be0-lcd0-hdmi";
70 display-engine {
[all …]
H A Dbcm2835-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 interrupt-parent = <&intc>;
12 compatible = "brcm,bcm2835-dma";
25 /* dma channel 11-14 share one irq */
32 interrupt-names = "dma0",
47 "dma-shared-all";
48 #dma-cells = <1>;
49 brcm,dma-channel-mask = <0x7f35>;
52 intc: interrupt-controller@7e00b200 {
53 compatible = "brcm,bcm2835-armctrl-ic";
[all …]
H A Drk3288-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
11 hdmi_gpio: hdmi-gpio {
17 hdmi_cec_c0: hdmi-cec-c0 {
22 hdmi_cec_c7: hdmi-cec-c7 {
27 hdmi_ddc: hdmi-ddc {
33 hdmi_ddc_unwedge: hdmi-ddc-unwedge {
41 global_pwroff: global-pwroff {
46 ddrio_pwroff: ddrio-pwroff {
[all …]
H A Drk628.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/reset/rk628-rgu.h>
5 #include <dt-bindings/clock/rk628-cgu.h>
8 rk628_xin_osc0_func: rk628-xin-osc0-func {
9 compatible = "fixed-clock";
10 #clock-cells = <0>;
11 clock-frequency = <24000000>;
12 clock-output-names = "rk628_xin_osc0_func";
15 rk628_xin_osc0_half: rk628-xin-osc0-half {
16 compatible = "fixed-factor-clock";
[all …]
H A Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/reset/sun6i-a31-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
61 #address-cells = <1>;
[all …]
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
H A Dimx6qdl-udoo.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
19 stdout-path = &uart2;
23 compatible = "gpio-backlight";
25 default-on;
29 gpio-poweroff {
30 compatible = "gpio-poweroff";
32 pinctrl-0 = <&pinctrl_power_off>;
33 pinctrl-names = "default";
43 * in reality it is a -20t (parallel) model,
[all …]
H A Dda850-lcdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
11 model = "DA850/AM1808/OMAP-L138 LCDK";
12 compatible = "ti,da850-lcdk", "ti,da850";
20 stdout-path = "serial2:115200n8";
28 reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
[all …]
H A Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DesignWare High-Definition Multimedia Interface (HDMI) driver
5 * Copyright (C) 2013-2015 Mentor Graphics Inc.
6 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
13 #include <linux/extcon-provider.h>
21 #include <linux/dma-mapping.h>
25 #include <media/cec-notifier.h>
27 #include <uapi/linux/media-bus-format.h>
40 #include "dw-hdmi-audio.h"
41 #include "dw-hdmi-cec.h"
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/rk628/
H A Drk628_hdmi.c1 // SPDX-License-Identifier: GPL-2.0
5 * Author: Chen Shunqing <csq@rock-chips.com>
13 #include <linux/extcon-provider.h>
26 #include <sound/hdmi-codec.h>
390 u8 pre_emphasis; /* pre-emphasis value */
407 struct i2c_adapter *ddc; member
438 * R = 1.164*Y + 1.596*V - 204
439 * G = 1.164*Y - 0.391*U - 0.813*V + 154
440 * B = 1.164*Y + 2.018*U - 258
449 * R = Y + 1.402*V - 248
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/vc4/
H A Dvc4_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
21 * and transfers them over an internal MAI (multi-channel audio
90 struct drm_info_node *node = (struct drm_info_node *)m->private; in vc4_hdmi_debugfs_regs()
91 struct vc4_hdmi *vc4_hdmi = node->info_ent->data; in vc4_hdmi_debugfs_regs()
94 drm_print_regset32(&p, &vc4_hdmi->hdmi_regset); in vc4_hdmi_debugfs_regs()
95 drm_print_regset32(&p, &vc4_hdmi->hd_regset); in vc4_hdmi_debugfs_regs()
117 reset_control_reset(vc4_hdmi->reset); in vc5_hdmi_reset()
138 clk_cnt = clk_get_rate(vc4_hdmi->hsm_clock) / CEC_CLOCK_FREQ; in vc4_hdmi_cec_update_clk_div()
152 WARN_ON(pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev)); in vc4_hdmi_connector_detect()
154 if (vc4_hdmi->hpd_gpio) { in vc4_hdmi_connector_detect()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra20/
H A Dfuncmux.c4 * SPDX-License-Identifier: GPL-2.0+
7 /* Tegra20 high-level function multiplexing */
70 * Tegra appears to boot with function UARTA pre- in funcmux_select()
73 * group's pins drive the RX signals into the HW. in funcmux_select()
76 * function on SDB to avoid the conflict. Also, tri- in funcmux_select()
116 case FUNCMUX_I2C2_DDC: /* DDC pin group, select I2C2 */ in funcmux_select()
288 return -1; in funcmux_select()
294 return -1; in funcmux_select()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/
H A Ddrm_dp_helper.c51 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
191 const char *arrow = request == DP_AUX_NATIVE_READ ? "->" : "<-"; in drm_dp_dump_access()
195 aux->name, offset, arrow, ret, min(ret, 20), buffer); in drm_dp_dump_access()
198 aux->name, offset, arrow, ret); in drm_dp_dump_access()
204 * The DisplayPort AUX channel is an abstraction to allow generic, driver-
208 * Transactions are described using a hardware-independent drm_dp_aux_msg
210 * Both native and I2C-over-AUX transactions are supported.
226 mutex_lock(&aux->hw_mutex); in drm_dp_dpcd_access()
235 if (ret != 0 && ret != -ETIMEDOUT) { in drm_dp_dpcd_access()
240 ret = aux->transfer(aux, &msg); in drm_dp_dpcd_access()
[all …]

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