Lines Matching +full:ddc +full:- +full:rx

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
11 hdmi_gpio: hdmi-gpio {
17 hdmi_cec_c0: hdmi-cec-c0 {
22 hdmi_cec_c7: hdmi-cec-c7 {
27 hdmi_ddc: hdmi-ddc {
33 hdmi_ddc_unwedge: hdmi-ddc-unwedge {
41 global_pwroff: global-pwroff {
46 ddrio_pwroff: ddrio-pwroff {
51 ddr0_retention: ddr0-retention {
56 ddr1_retention: ddr1-retention {
63 edp_hpd: edp-hpd {
70 i2c0_xfer: i2c0-xfer {
78 i2c1_xfer: i2c1-xfer {
86 i2c2_xfer: i2c2-xfer {
94 i2c3_xfer: i2c3-xfer {
102 i2c4_xfer: i2c4-xfer {
110 i2c5_xfer: i2c5-xfer {
118 i2s0_bus: i2s0-bus {
127 i2s0_mclk: i2s0-mclk {
134 lcdc_rgb_pins: lcdc-rgb-pins {
142 lcdc_sleep_pins: lcdc-sleep-pins {
152 sdmmc_clk: sdmmc-clk {
157 sdmmc_cmd: sdmmc-cmd {
162 sdmmc_cd: sdmmc-cd {
167 sdmmc_bus1: sdmmc-bus1 {
172 sdmmc_bus4: sdmmc-bus4 {
182 sdio0_bus1: sdio0-bus1 {
187 sdio0_bus4: sdio0-bus4 {
195 sdio0_cmd: sdio0-cmd {
200 sdio0_clk: sdio0-clk {
205 sdio0_cd: sdio0-cd {
210 sdio0_wp: sdio0-wp {
215 sdio0_pwr: sdio0-pwr {
220 sdio0_bkpwr: sdio0-bkpwr {
225 sdio0_int: sdio0-int {
232 sdio1_bus1: sdio1-bus1 {
237 sdio1_bus4: sdio1-bus4 {
245 sdio1_cd: sdio1-cd {
250 sdio1_wp: sdio1-wp {
255 sdio1_bkpwr: sdio1-bkpwr {
260 sdio1_int: sdio1-int {
265 sdio1_cmd: sdio1-cmd {
270 sdio1_clk: sdio1-clk {
275 sdio1_pwr: sdio1-pwr {
282 emmc_clk: emmc-clk {
287 emmc_cmd: emmc-cmd {
292 emmc_pwr: emmc-pwr {
297 emmc_bus1: emmc-bus1 {
302 emmc_bus4: emmc-bus4 {
310 emmc_bus8: emmc-bus8 {
324 spi0_clk: spi0-clk {
328 spi0_cs0: spi0-cs0 {
332 spi0_tx: spi0-tx {
336 spi0_rx: spi0-rx {
340 spi0_cs1: spi0-cs1 {
346 spi1_clk: spi1-clk {
350 spi1_cs0: spi1-cs0 {
354 spi1_rx: spi1-rx {
358 spi1_tx: spi1-tx {
365 spi2_cs1: spi2-cs1 {
369 spi2_clk: spi2-clk {
373 spi2_cs0: spi2-cs0 {
377 spi2_rx: spi2-rx {
381 spi2_tx: spi2-tx {
388 uart0_xfer: uart0-xfer {
394 uart0_cts: uart0-cts {
399 uart0_rts: uart0-rts {
406 uart1_xfer: uart1-xfer {
412 uart1_cts: uart1-cts {
417 uart1_rts: uart1-rts {
424 uart2_xfer: uart2-xfer {
433 uart3_xfer: uart3-xfer {
439 uart3_cts: uart3-cts {
444 uart3_rts: uart3-rts {
451 uart4_xfer: uart4-xfer {
457 uart4_cts: uart4-cts {
462 uart4_rts: uart4-rts {
469 otp_pin: otp-pin {
474 otp_out: otp-out {
481 pwm0_pin: pwm0-pin {
486 pwm0_pin_pull_down: pwm0-pin-pull-down {
494 pwm1_pin: pwm1-pin {
499 pwm1_pin_pull_down: pwm1-pin-pull-down {
506 pwm2_pin: pwm2-pin {
511 pwm2_pin_pull_down: pwm2-pin-pull-down {
518 pwm3_pin: pwm3-pin {
523 pwm3_pin_pull_down: pwm3-pin-pull-down {
530 rgmii_pins: rgmii-pins {
549 rmii_pins: rmii-pins {
565 spdif_tx: spdif-tx {
572 isp_mipi: isp-mipi {
578 isp_dvp_d2d9: isp-d2d9 {
596 isp_dvp_d0d1: isp-d0d1 {
603 isp_dvp_d10d11: isp-d10d11 {
610 isp_dvp_d0d7: isp-d0d7 {
623 isp_shutter: isp-shutter {
630 isp_flash_trigger: isp-flash-trigger {
636 isp_prelight: isp-prelight {
642 isp_flash_trigger_as_gpio: isp-flash-trigger-as-gpio {
650 cif_dvp_d0d1: cif-dvp-d0d1 {
656 cif_dvp_d2d9: cif-dvp-d2d9 {
672 cif_dvp_d10d11: cif-dvp-d10d11 {