1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright 2013 Maxime Ripard 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Maxime Ripard <maxime.ripard@free-electrons.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 7*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 8*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 9*4882a593Smuzhiyun * whole. 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * a) This library is free software; you can redistribute it and/or 12*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 13*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 14*4882a593Smuzhiyun * License, or (at your option) any later version. 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * This library is distributed in the hope that it will be useful, 17*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 18*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19*4882a593Smuzhiyun * GNU General Public License for more details. 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * Or, alternatively, 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 24*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 25*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 26*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 27*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 28*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 29*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 30*4882a593Smuzhiyun * conditions: 31*4882a593Smuzhiyun * 32*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 33*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 34*4882a593Smuzhiyun * 35*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 36*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 37*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 38*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 39*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 40*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 41*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 42*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun#include "sun5i.dtsi" 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun#include <dt-bindings/dma/sun4i-a10.h> 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun/ { 50*4882a593Smuzhiyun aliases { 51*4882a593Smuzhiyun ethernet0 = &emac; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun chosen { 55*4882a593Smuzhiyun #address-cells = <1>; 56*4882a593Smuzhiyun #size-cells = <1>; 57*4882a593Smuzhiyun ranges; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun framebuffer-lcd0-hdmi { 60*4882a593Smuzhiyun compatible = "allwinner,simple-framebuffer", 61*4882a593Smuzhiyun "simple-framebuffer"; 62*4882a593Smuzhiyun allwinner,pipeline = "de_be0-lcd0-hdmi"; 63*4882a593Smuzhiyun clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_HDMI>, 64*4882a593Smuzhiyun <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DRAM_DE_BE>, 65*4882a593Smuzhiyun <&ccu CLK_DE_BE>, <&ccu CLK_HDMI>; 66*4882a593Smuzhiyun status = "disabled"; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun display-engine { 71*4882a593Smuzhiyun compatible = "allwinner,sun5i-a10s-display-engine"; 72*4882a593Smuzhiyun allwinner,pipelines = <&fe0>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun soc { 76*4882a593Smuzhiyun hdmi: hdmi@1c16000 { 77*4882a593Smuzhiyun compatible = "allwinner,sun5i-a10s-hdmi"; 78*4882a593Smuzhiyun reg = <0x01c16000 0x1000>; 79*4882a593Smuzhiyun interrupts = <58>; 80*4882a593Smuzhiyun clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>, 81*4882a593Smuzhiyun <&ccu CLK_PLL_VIDEO0_2X>, 82*4882a593Smuzhiyun <&ccu CLK_PLL_VIDEO1_2X>; 83*4882a593Smuzhiyun clock-names = "ahb", "mod", "pll-0", "pll-1"; 84*4882a593Smuzhiyun dmas = <&dma SUN4I_DMA_NORMAL 16>, 85*4882a593Smuzhiyun <&dma SUN4I_DMA_NORMAL 16>, 86*4882a593Smuzhiyun <&dma SUN4I_DMA_DEDICATED 24>; 87*4882a593Smuzhiyun dma-names = "ddc-tx", "ddc-rx", "audio-tx"; 88*4882a593Smuzhiyun status = "disabled"; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun ports { 91*4882a593Smuzhiyun #address-cells = <1>; 92*4882a593Smuzhiyun #size-cells = <0>; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun hdmi_in: port@0 { 95*4882a593Smuzhiyun reg = <0>; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun hdmi_in_tcon0: endpoint { 98*4882a593Smuzhiyun remote-endpoint = <&tcon0_out_hdmi>; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun hdmi_out: port@1 { 103*4882a593Smuzhiyun reg = <1>; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun pwm: pwm@1c20e00 { 109*4882a593Smuzhiyun compatible = "allwinner,sun5i-a10s-pwm"; 110*4882a593Smuzhiyun reg = <0x01c20e00 0xc>; 111*4882a593Smuzhiyun clocks = <&ccu CLK_HOSC>; 112*4882a593Smuzhiyun #pwm-cells = <3>; 113*4882a593Smuzhiyun status = "disabled"; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&ccu { 119*4882a593Smuzhiyun compatible = "allwinner,sun5i-a10s-ccu"; 120*4882a593Smuzhiyun}; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun&mmc1 { 123*4882a593Smuzhiyun pinctrl-names = "default"; 124*4882a593Smuzhiyun pinctrl-0 = <&mmc1_pins>; 125*4882a593Smuzhiyun}; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun&pio { 128*4882a593Smuzhiyun compatible = "allwinner,sun5i-a10s-pinctrl"; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun uart0_pb_pins: uart0-pb-pins { 131*4882a593Smuzhiyun pins = "PB19", "PB20"; 132*4882a593Smuzhiyun function = "uart0"; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun uart2_pc_pins: uart2-pc-pins { 136*4882a593Smuzhiyun pins = "PC18", "PC19"; 137*4882a593Smuzhiyun function = "uart2"; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun emac_pa_pins: emac-pa-pins { 141*4882a593Smuzhiyun pins = "PA0", "PA1", "PA2", 142*4882a593Smuzhiyun "PA3", "PA4", "PA5", "PA6", 143*4882a593Smuzhiyun "PA7", "PA8", "PA9", "PA10", 144*4882a593Smuzhiyun "PA11", "PA12", "PA13", "PA14", 145*4882a593Smuzhiyun "PA15", "PA16"; 146*4882a593Smuzhiyun function = "emac"; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun mmc1_pins: mmc1-pins { 150*4882a593Smuzhiyun pins = "PG3", "PG4", "PG5", 151*4882a593Smuzhiyun "PG6", "PG7", "PG8"; 152*4882a593Smuzhiyun function = "mmc1"; 153*4882a593Smuzhiyun drive-strength = <30>; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun spi2_pb_pins: spi2-pb-pins { 157*4882a593Smuzhiyun pins = "PB12", "PB13", "PB14"; 158*4882a593Smuzhiyun function = "spi2"; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun spi2_cs0_pb_pin: spi2-cs0-pb-pin { 162*4882a593Smuzhiyun pins = "PB11"; 163*4882a593Smuzhiyun function = "spi2"; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun}; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun&tcon0_out { 168*4882a593Smuzhiyun tcon0_out_hdmi: endpoint@2 { 169*4882a593Smuzhiyun reg = <2>; 170*4882a593Smuzhiyun remote-endpoint = <&hdmi_in_tcon0>; 171*4882a593Smuzhiyun allwinner,tcon-channel = <1>; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun}; 174