Home
last modified time | relevance | path

Searched +full:mmu +full:- +full:500 (Results 1 – 25 of 131) sorted by relevance

123456

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iommu/
H A Darm,smmu.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM System MMU Architecture Implementation
10 - Will Deacon <will@kernel.org>
11 - Robin Murphy <Robin.Murphy@arm.com>
23 pattern: "^iommu@[0-9a-f]*"
26 - description: Qcom SoCs implementing "arm,smmu-v2"
28 - enum:
29 - qcom,msm8996-smmu-v2
[all …]
/OK3568_Linux_fs/kernel/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-impl.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #define pr_fmt(fmt) "arm-smmu: " fmt
10 #include "arm-smmu.h"
44 /* Since we don't care for sGFAR, we can do without 64-bit accessors */
65 cs->id_base = atomic_fetch_add(smmu->num_context_banks, &context_count); in cavium_cfg_probe()
66 dev_notice(smmu->dev, "\tenabling workaround for Cavium erratum 27704\n"); in cavium_cfg_probe()
74 struct cavium_smmu *cs = container_of(smmu_domain->smmu, in cavium_init_context()
77 if (smmu_domain->stage == ARM_SMMU_DOMAIN_S2) in cavium_init_context()
78 smmu_domain->cfg.vmid += cs->id_base; in cavium_init_context()
80 smmu_domain->cfg.asid += cs->id_base; in cavium_init_context()
[all …]
H A Darm-smmu-nvidia.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2019-2020 NVIDIA CORPORATION. All rights reserved.
10 #include "arm-smmu.h"
13 * Tegra194 has three ARM MMU-500 Instances.
16 * non-isochronous HW devices.
20 * The third instance usage is through standard arm-smmu driver itself and
36 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page()
89 for (spin_cnt = TLB_SPIN_COUNT; spin_cnt > 0; spin_cnt--) { in nvidia_smmu_tlb_sync()
109 dev_err_ratelimited(smmu->dev, in nvidia_smmu_tlb_sync()
110 "TLB sync timed out -- SMMU may be deadlocked\n"); in nvidia_smmu_tlb_sync()
[all …]
/OK3568_Linux_fs/u-boot/drivers/net/
H A Dsmc91111.c1 /*------------------------------------------------------------------------
3 . This is a driver for SMSC's 91C111 single-chip Ethernet device.
6 . Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * SPDX-License-Identifier: GPL-2.0+
43 . 06/19/03 Richard Woodruff Made u-boot environment aware and added mac addr checks.
48 ----------------------------------------------------------------------------*/
57 /* Use power-down feature of the chip */
74 /*------------------------------------------------------------------------
78 -------------------------------------------------------------------------*/
107 /*------------------------------------------------------------------------
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mpc8572ds/
H A Dmpc8572ds.c2 * Copyright 2007-2011 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/mmu.h>
59 * Fixed sdram init -- doesn't use serial presence detect.
65 struct ccsr_ddr __iomem *ddr = &immap->im_ddr; in fixed_sdram()
68 ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS; in fixed_sdram()
69 ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
71 ddr->timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; in fixed_sdram()
72 ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; in fixed_sdram()
73 ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; in fixed_sdram()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-mvebu/
H A Dcpu.c2 * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
42 writel(readl(&reg->rstoutn_mask) | 1, &reg->rstoutn_mask); in reset_cpu()
43 writel(readl(&reg->sys_soft_rst) | 1, &reg->sys_soft_rst); in reset_cpu()
82 { 7, 0x0, 500, 250, 250 },
83 { 8, 0x0, 500, 250, 334 },
84 { 9, 0x0, 500, 250, 500 },
100 { 25, 0x0, 1000, 500, 500 },
101 { 26, 0x0, 1000, 500, 667 },
102 { 27, 0x0, 1000, 333, 500 },
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mpc8536ds/
H A Dmpc8536ds.c2 * Copyright 2008-2012 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/mmu.h>
35 setbits_be32(&gur->pmuxcr, in board_early_init_f()
41 * So set SDHC_WP to active-low when use MPC8536 Rev1.1 and greater.*/ in board_early_init_f()
45 setbits_be32(&gur->gencfgr, MPC85xx_GENCFGR_SDHC_WP_INV); in board_early_init_f()
87 * Fixed sdram init -- doesn't use serial presence detect.
93 struct ccsr_ddr __iomem *ddr = &immap->im_ddr; in fixed_sdram()
96 ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS; in fixed_sdram()
97 ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG; in fixed_sdram()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/gma500/
H A Dpsb_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2007-2011, Intel Corporation.
42 * to the different groups of PowerVR 5-series chip designs
46 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx
47 * PowerVR SGX535 - Moorestown - Intel GMA 600
48 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx
49 * PowerVR SGX540 - Medfield - Intel Atom Z2460
50 * PowerVR SGX544MP2 - Medfield -
51 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
52 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
[all …]
/OK3568_Linux_fs/u-boot/board/renesas/MigoR/
H A Dlowlevel_init.S2 * Copyright (C) 2007-2008
10 * SPDX-License-Identifier: GPL-2.0+
35 write32 MMUCR_A, MMUCR_D ! Address of MMU Control Register
51 ! 0xA507 -> timer_STOP / WDT_CLK = max
54 ! 0x5A00 -> Clear
57 ! 0xA504 -> timer_STOP / CLK = 500ms
/OK3568_Linux_fs/kernel/arch/arm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
7 select ARCH_HAS_DEBUG_VIRTUAL if MMU
20 select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
21 select ARCH_HAS_STRICT_MODULE_RWX if MMU && (!ROCKCHIP_MINI_KERNEL || STRICT_KERNEL_RWX)
24 select ARCH_HAS_TEARDOWN_DMA_OPS if MMU
36 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
40 select BUILDTIME_TABLE_SORT if MMU
46 select DMA_REMAP if MMU
70 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
71 select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU
[all …]
/OK3568_Linux_fs/u-boot/board/hisilicon/poplar/
H A Dpoplar.c3 * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
5 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/armv8/mmu.h>
64 gd->ram_size = get_ram_size(NULL, 0x80000000); in dram_init()
85 gd->bd->bi_dram[0].start = KERNEL_TEXT_OFFSET; in dram_init_banksize()
86 gd->bd->bi_dram[0].size = gd->ram_size - gd->bd->bi_dram[0].start; in dram_init_banksize()
94 /* close EOP pre-emphasis. open data pre-emphasis */ in usb2_phy_config()
137 udelay(500); in usb2_phy_init()
/OK3568_Linux_fs/u-boot/board/ms7722se/
H A Dlowlevel_init.S10 * SPDX-License-Identifier: GPL-2.0+
40 * Address of MMU Control Register
56 ! write16 RWTCSR_A, RWTCSR_D_1 /* 0xA507 -> timer_STOP/WDT_CLK=max */
59 write16 RWTCNT_A, RWTCNT_D /*0x5A00 -> Clear */
62 write16 RWTCSR_A, RWTCSR_D_2 /* 0xA504 -> timer_STOP/CLK=500ms */
/OK3568_Linux_fs/kernel/drivers/cpufreq/
H A Dpmac32-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
41 * init/main.c to make it non-init before enabling DEBUG_FREQ
254 * the above didn't re-enable the DEC */ in pmu_set_cpu_speed()
270 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed()
271 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed()
298 /* Restore userland MMU context */ in pmu_set_cpu_speed()
299 switch_mmu_context(NULL, current->active_mm, NULL); in pmu_set_cpu_speed()
310 * as soon as interrupts are re-enabled and the generic in pmu_set_cpu_speed()
390 * GPIO space, and the device-tree doesn't help. in read_gpio()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/
H A Dmali_kbase_config_defaults.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * (C) COPYRIGHT 2013-2023 ARM Limited. All rights reserved.
18 * http://www.gnu.org/licenses/gpl-2.0.html.
102 * -# Power off one or more shader cores
103 * -# Power off the entire GPU
113 #define DEFAULT_PM_POWEROFF_TICK_SHADER (2) /* 400-800us */
121 /* Default minimum number of scheduling ticks before jobs are soft-stopped.
123 * This defines the time-slice for a job (which may be different from that of a
126 #define DEFAULT_JS_SOFT_STOP_TICKS (1) /* 100ms-200ms */
128 /* Default minimum number of scheduling ticks before CL jobs are soft-stopped. */
[all …]
/OK3568_Linux_fs/kernel/arch/sparc/include/asm/
H A Dfloppy_32.h1 /* SPDX-License-Identifier: GPL-2.0 */
76 #if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */
106 sun_fdc->dor_82077 = value; in sun_set_dor()
111 return sun_fdc->dir_82077; in sun_read_dir()
122 return sun_fdc->status_82072 & ~STATUS_DMA; in sun_82072_fd_inb()
124 return sun_fdc->data_82072; in sun_82072_fd_inb()
142 sun_fdc->data_82072 = value; in sun_82072_fd_outb()
145 sun_fdc->dcr_82072 = value; in sun_82072_fd_outb()
148 sun_fdc->status_82072 = value; in sun_82072_fd_outb()
162 return sun_fdc->status1_82077; in sun_82077_fd_inb()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/lima/
H A Dlima_sched.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
33 return -ENOMEM; in lima_sched_slab_init()
42 if (!--lima_fence_slab_refcnt) { in lima_sched_slab_fini()
62 return f->pipe->base.name; in lima_fence_get_timeline_name()
77 call_rcu(&f->base.rcu, lima_fence_release_rcu); in lima_fence_release()
94 fence->pipe = pipe; in lima_fence_create()
95 dma_fence_init(&fence->base, &lima_fence_ops, &pipe->fence_lock, in lima_fence_create()
96 pipe->fence_context, ++pipe->fence_seqno); in lima_fence_create()
118 task->bos = kmemdup(bos, sizeof(*bos) * num_bos, GFP_KERNEL); in lima_sched_task_init()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/bsc9132qds/
H A DREADME2 --------
4 Microcell, Picocell, and Enterprise-Femto base station market subsegments.
7 core technologies with MAPLE-B2P baseband acceleration processing elements
15 - Power Architecture subsystem including two e500 processors with
16 512-Kbyte shared L2 cache
17 - Two StarCore SC3850 DSP subsystems, each with a 512-Kbyte private L2
19 - 32 Kbyte of shared M3 memory
20 - The Multi Accelerator Platform Engine for Pico BaseStation Baseband
21 Processing (MAPLE-B2P)
22 - Two DDR3/3L memory interfaces with 32-bit data width (40 bits including
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/bsc9131rdb/
H A DREADME2 --------
3 - BSC9131 is integrated device that targets Femto base station market.
5 technologies with MAPLE-B2F baseband acceleration processing elements.
6 - It's MAPLE disabled personality is called 9231.
9 . Power Architecture subsystem including a e500 processor with 256-Kbyte shared
11 . StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache
13 Processing (MAPLE-B2F)
14 . A multi-standard baseband algorithm accelerator for Channel Decoding/Encoding,
20 . DDR3/3L memory interface with 32-bit data width without ECC and 16-bit with
21 ECC, up to 400-MHz clock/800 MHz data rate
[all …]
/OK3568_Linux_fs/kernel/arch/alpha/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
44 The Alpha is a 64-bit general-purpose processor designed and
46 now Hewlett-Packard. The Alpha Linux project has a home page at
52 config MMU config
97 Alcor/Alpha-XLT AS 600, AS 500, XL-300, XL-366
98 Alpha-XL XL-233, XL-266
107 Jensen DECpc 150, DEC 2000 models 300, 500
108 LX164 AlphaPC164-LX
110 Miata Personal Workstation 433/500/600 a/au
117 Ruffian RPX164-2, AlphaPC164-UX, AlphaPC164-BX
[all …]
/OK3568_Linux_fs/external/linux-rga/docs/
H A DRockchip_FAQ_RGA_CN.md3 文件标识：RK-PC-YF-404
7 日期：2023-06-28
33 网址： [www.rock-chips.com](http://www.rock-chips.com)
35 客户服务电话： +86-4007-700-590
37 客户服务传真： +86-591-83951833
39 客户服务邮箱： [fae@rock-chips.com](mailto:fae@rock-chips.com)
41 ---
47 - 技术支持工程师
48 - 软件开发工程师
53 | ---------- | -------- | -------- | ------------------------------- |
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
30 interrupt-names = "mhu_lpri_rx",
32 #mbox-cells = <1>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/misc/
H A Dfsl,qoriq-mc.txt3 The Freescale Management Complex (fsl-mc) is a hardware resource
5 network-oriented packet processing applications. After the fsl-mc
12 For an overview of the DPAA2 architecture and fsl-mc bus see:
16 same hardware "isolation context" and a 10-bit value called an ICID
21 between ICIDs and IOMMUs, so an iommu-map property is used to define
28 For arm-smmu binding, see:
32 The msi-map property is used to associate the devices with both the ITS
36 Documentation/devicetree/bindings/interrupt-controller/msi.txt.
39 Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml.
43 - compatible
[all …]
/OK3568_Linux_fs/kernel/drivers/cpuidle/
H A Dcpuidle-big_little.c1 // SPDX-License-Identifier: GPL-2.0-only
41 * or in the MCPM back-ends.
47 * up and running when the CPU is powered up on cluster wake-up from shutdown.
69 .desc = "ARM little-cluster power down",
75 { .compatible = "arm,idle-state",
86 .exit_latency = 500,
90 .desc = "ARM big-cluster power down",
98 * in power down sequences where caches and MMU may be turned off.
115 * bl_enter_powerdown - Programs CPU to enter the specified state
145 return -ENOMEM; in bl_idle_driver_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/video/rockchip/rve/include/
H A Drve_drv.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Author: Huang Lee <Putin.li@rock-chips.com>
16 #include <linux/dma-buf-cache.h>
17 #include <linux/dma-mapping.h>
52 #include <linux/dma-iommu.h>
53 #include <linux/dma-map-ops.h>
81 #define RVE_ASYNC_TIMEOUT_DELAY 500
224 /* the most time-consuming job, per hrtimer */
285 /* used by rve2's mmu lock */
321 return readl(scheduler->rve_base + offset); in rve_read()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/marvell/
H A Darmada-ap80x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <2>;
25 compatible = "arm,psci-0.2";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
[all …]

123456