1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /**************************************************************************
3*4882a593Smuzhiyun * Copyright (c) 2007-2011, Intel Corporation.
4*4882a593Smuzhiyun * All Rights Reserved.
5*4882a593Smuzhiyun * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
6*4882a593Smuzhiyun * All Rights Reserved.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun **************************************************************************/
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/cpu.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/notifier.h>
13*4882a593Smuzhiyun #include <linux/pm_runtime.h>
14*4882a593Smuzhiyun #include <linux/spinlock.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <asm/set_memory.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <acpi/video.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <drm/drm.h>
21*4882a593Smuzhiyun #include <drm/drm_drv.h>
22*4882a593Smuzhiyun #include <drm/drm_fb_helper.h>
23*4882a593Smuzhiyun #include <drm/drm_file.h>
24*4882a593Smuzhiyun #include <drm/drm_ioctl.h>
25*4882a593Smuzhiyun #include <drm/drm_irq.h>
26*4882a593Smuzhiyun #include <drm/drm_pciids.h>
27*4882a593Smuzhiyun #include <drm/drm_vblank.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include "framebuffer.h"
30*4882a593Smuzhiyun #include "intel_bios.h"
31*4882a593Smuzhiyun #include "mid_bios.h"
32*4882a593Smuzhiyun #include "power.h"
33*4882a593Smuzhiyun #include "psb_drv.h"
34*4882a593Smuzhiyun #include "psb_intel_reg.h"
35*4882a593Smuzhiyun #include "psb_reg.h"
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static struct drm_driver driver;
38*4882a593Smuzhiyun static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /*
41*4882a593Smuzhiyun * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
42*4882a593Smuzhiyun * to the different groups of PowerVR 5-series chip designs
43*4882a593Smuzhiyun *
44*4882a593Smuzhiyun * 0x8086 = Intel Corporation
45*4882a593Smuzhiyun *
46*4882a593Smuzhiyun * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx
47*4882a593Smuzhiyun * PowerVR SGX535 - Moorestown - Intel GMA 600
48*4882a593Smuzhiyun * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx
49*4882a593Smuzhiyun * PowerVR SGX540 - Medfield - Intel Atom Z2460
50*4882a593Smuzhiyun * PowerVR SGX544MP2 - Medfield -
51*4882a593Smuzhiyun * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
52*4882a593Smuzhiyun * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
53*4882a593Smuzhiyun * N2800
54*4882a593Smuzhiyun */
55*4882a593Smuzhiyun static const struct pci_device_id pciidlist[] = {
56*4882a593Smuzhiyun { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
57*4882a593Smuzhiyun { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
58*4882a593Smuzhiyun #if defined(CONFIG_DRM_GMA600)
59*4882a593Smuzhiyun { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
60*4882a593Smuzhiyun { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
61*4882a593Smuzhiyun { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
62*4882a593Smuzhiyun { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
63*4882a593Smuzhiyun { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
64*4882a593Smuzhiyun { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
65*4882a593Smuzhiyun { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
66*4882a593Smuzhiyun { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
67*4882a593Smuzhiyun { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
68*4882a593Smuzhiyun #endif
69*4882a593Smuzhiyun #if defined(CONFIG_DRM_MEDFIELD)
70*4882a593Smuzhiyun { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
71*4882a593Smuzhiyun { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
72*4882a593Smuzhiyun { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
73*4882a593Smuzhiyun { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
74*4882a593Smuzhiyun { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
75*4882a593Smuzhiyun { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
76*4882a593Smuzhiyun { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
77*4882a593Smuzhiyun { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
78*4882a593Smuzhiyun #endif
79*4882a593Smuzhiyun #if defined(CONFIG_DRM_GMA3600)
80*4882a593Smuzhiyun { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
81*4882a593Smuzhiyun { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
82*4882a593Smuzhiyun { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
83*4882a593Smuzhiyun { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
84*4882a593Smuzhiyun { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
85*4882a593Smuzhiyun { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
86*4882a593Smuzhiyun { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
87*4882a593Smuzhiyun { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
88*4882a593Smuzhiyun { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
89*4882a593Smuzhiyun { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
90*4882a593Smuzhiyun { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
91*4882a593Smuzhiyun { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
92*4882a593Smuzhiyun { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
93*4882a593Smuzhiyun { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
94*4882a593Smuzhiyun { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
95*4882a593Smuzhiyun { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
96*4882a593Smuzhiyun #endif
97*4882a593Smuzhiyun { 0, }
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, pciidlist);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun /*
102*4882a593Smuzhiyun * Standard IOCTLs.
103*4882a593Smuzhiyun */
104*4882a593Smuzhiyun static const struct drm_ioctl_desc psb_ioctls[] = {
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun
psb_do_init(struct drm_device * dev)107*4882a593Smuzhiyun static int psb_do_init(struct drm_device *dev)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
110*4882a593Smuzhiyun struct psb_gtt *pg = &dev_priv->gtt;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun uint32_t stolen_gtt;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun if (pg->mmu_gatt_start & 0x0FFFFFFF) {
115*4882a593Smuzhiyun dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
116*4882a593Smuzhiyun return -EINVAL;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
120*4882a593Smuzhiyun stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
121*4882a593Smuzhiyun stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun dev_priv->gatt_free_offset = pg->mmu_gatt_start +
124*4882a593Smuzhiyun (stolen_gtt << PAGE_SHIFT) * 1024;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun spin_lock_init(&dev_priv->irqmask_lock);
127*4882a593Smuzhiyun spin_lock_init(&dev_priv->lock_2d);
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
130*4882a593Smuzhiyun PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
131*4882a593Smuzhiyun PSB_RSGX32(PSB_CR_BIF_BANK1);
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* Do not bypass any MMU access, let them pagefault instead */
134*4882a593Smuzhiyun PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
135*4882a593Smuzhiyun PSB_CR_BIF_CTRL);
136*4882a593Smuzhiyun PSB_RSGX32(PSB_CR_BIF_CTRL);
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun psb_spank(dev_priv);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* mmu_gatt ?? */
141*4882a593Smuzhiyun PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
142*4882a593Smuzhiyun PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun return 0;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
psb_driver_unload(struct drm_device * dev)147*4882a593Smuzhiyun static void psb_driver_unload(struct drm_device *dev)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun /* TODO: Kill vblank etc here */
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun if (dev_priv) {
154*4882a593Smuzhiyun if (dev_priv->backlight_device)
155*4882a593Smuzhiyun gma_backlight_exit(dev);
156*4882a593Smuzhiyun psb_modeset_cleanup(dev);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if (dev_priv->ops->chip_teardown)
159*4882a593Smuzhiyun dev_priv->ops->chip_teardown(dev);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun psb_intel_opregion_fini(dev);
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun if (dev_priv->pf_pd) {
164*4882a593Smuzhiyun psb_mmu_free_pagedir(dev_priv->pf_pd);
165*4882a593Smuzhiyun dev_priv->pf_pd = NULL;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun if (dev_priv->mmu) {
168*4882a593Smuzhiyun struct psb_gtt *pg = &dev_priv->gtt;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun down_read(&pg->sem);
171*4882a593Smuzhiyun psb_mmu_remove_pfn_sequence(
172*4882a593Smuzhiyun psb_mmu_get_default_pd
173*4882a593Smuzhiyun (dev_priv->mmu),
174*4882a593Smuzhiyun pg->mmu_gatt_start,
175*4882a593Smuzhiyun dev_priv->vram_stolen_size >> PAGE_SHIFT);
176*4882a593Smuzhiyun up_read(&pg->sem);
177*4882a593Smuzhiyun psb_mmu_driver_takedown(dev_priv->mmu);
178*4882a593Smuzhiyun dev_priv->mmu = NULL;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun psb_gtt_takedown(dev);
181*4882a593Smuzhiyun if (dev_priv->scratch_page) {
182*4882a593Smuzhiyun set_pages_wb(dev_priv->scratch_page, 1);
183*4882a593Smuzhiyun __free_page(dev_priv->scratch_page);
184*4882a593Smuzhiyun dev_priv->scratch_page = NULL;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun if (dev_priv->vdc_reg) {
187*4882a593Smuzhiyun iounmap(dev_priv->vdc_reg);
188*4882a593Smuzhiyun dev_priv->vdc_reg = NULL;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun if (dev_priv->sgx_reg) {
191*4882a593Smuzhiyun iounmap(dev_priv->sgx_reg);
192*4882a593Smuzhiyun dev_priv->sgx_reg = NULL;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun if (dev_priv->aux_reg) {
195*4882a593Smuzhiyun iounmap(dev_priv->aux_reg);
196*4882a593Smuzhiyun dev_priv->aux_reg = NULL;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun pci_dev_put(dev_priv->aux_pdev);
199*4882a593Smuzhiyun pci_dev_put(dev_priv->lpc_pdev);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun /* Destroy VBT data */
202*4882a593Smuzhiyun psb_intel_destroy_bios(dev);
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun kfree(dev_priv);
205*4882a593Smuzhiyun dev->dev_private = NULL;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun gma_power_uninit(dev);
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
psb_driver_load(struct drm_device * dev,unsigned long flags)210*4882a593Smuzhiyun static int psb_driver_load(struct drm_device *dev, unsigned long flags)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun struct drm_psb_private *dev_priv;
213*4882a593Smuzhiyun unsigned long resource_start, resource_len;
214*4882a593Smuzhiyun unsigned long irqflags;
215*4882a593Smuzhiyun int ret = -ENOMEM;
216*4882a593Smuzhiyun struct drm_connector *connector;
217*4882a593Smuzhiyun struct gma_encoder *gma_encoder;
218*4882a593Smuzhiyun struct psb_gtt *pg;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun /* allocating and initializing driver private data */
221*4882a593Smuzhiyun dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
222*4882a593Smuzhiyun if (dev_priv == NULL)
223*4882a593Smuzhiyun return -ENOMEM;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun dev_priv->ops = (struct psb_ops *)flags;
226*4882a593Smuzhiyun dev_priv->dev = dev;
227*4882a593Smuzhiyun dev->dev_private = (void *) dev_priv;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun pg = &dev_priv->gtt;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun pci_set_master(dev->pdev);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun dev_priv->num_pipe = dev_priv->ops->pipes;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun dev_priv->vdc_reg =
238*4882a593Smuzhiyun ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
239*4882a593Smuzhiyun if (!dev_priv->vdc_reg)
240*4882a593Smuzhiyun goto out_err;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
243*4882a593Smuzhiyun PSB_SGX_SIZE);
244*4882a593Smuzhiyun if (!dev_priv->sgx_reg)
245*4882a593Smuzhiyun goto out_err;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun if (IS_MRST(dev)) {
248*4882a593Smuzhiyun int domain = pci_domain_nr(dev->pdev->bus);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun dev_priv->aux_pdev =
251*4882a593Smuzhiyun pci_get_domain_bus_and_slot(domain, 0,
252*4882a593Smuzhiyun PCI_DEVFN(3, 0));
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun if (dev_priv->aux_pdev) {
255*4882a593Smuzhiyun resource_start = pci_resource_start(dev_priv->aux_pdev,
256*4882a593Smuzhiyun PSB_AUX_RESOURCE);
257*4882a593Smuzhiyun resource_len = pci_resource_len(dev_priv->aux_pdev,
258*4882a593Smuzhiyun PSB_AUX_RESOURCE);
259*4882a593Smuzhiyun dev_priv->aux_reg = ioremap(resource_start,
260*4882a593Smuzhiyun resource_len);
261*4882a593Smuzhiyun if (!dev_priv->aux_reg)
262*4882a593Smuzhiyun goto out_err;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun DRM_DEBUG_KMS("Found aux vdc");
265*4882a593Smuzhiyun } else {
266*4882a593Smuzhiyun /* Couldn't find the aux vdc so map to primary vdc */
267*4882a593Smuzhiyun dev_priv->aux_reg = dev_priv->vdc_reg;
268*4882a593Smuzhiyun DRM_DEBUG_KMS("Couldn't find aux pci device");
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun dev_priv->gmbus_reg = dev_priv->aux_reg;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun dev_priv->lpc_pdev =
273*4882a593Smuzhiyun pci_get_domain_bus_and_slot(domain, 0,
274*4882a593Smuzhiyun PCI_DEVFN(31, 0));
275*4882a593Smuzhiyun if (dev_priv->lpc_pdev) {
276*4882a593Smuzhiyun pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
277*4882a593Smuzhiyun &dev_priv->lpc_gpio_base);
278*4882a593Smuzhiyun pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
279*4882a593Smuzhiyun (u32)dev_priv->lpc_gpio_base | (1L<<31));
280*4882a593Smuzhiyun pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
281*4882a593Smuzhiyun &dev_priv->lpc_gpio_base);
282*4882a593Smuzhiyun dev_priv->lpc_gpio_base &= 0xffc0;
283*4882a593Smuzhiyun if (dev_priv->lpc_gpio_base)
284*4882a593Smuzhiyun DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
285*4882a593Smuzhiyun dev_priv->lpc_gpio_base);
286*4882a593Smuzhiyun else {
287*4882a593Smuzhiyun pci_dev_put(dev_priv->lpc_pdev);
288*4882a593Smuzhiyun dev_priv->lpc_pdev = NULL;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun } else {
292*4882a593Smuzhiyun dev_priv->gmbus_reg = dev_priv->vdc_reg;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun psb_intel_opregion_setup(dev);
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun ret = dev_priv->ops->chip_setup(dev);
298*4882a593Smuzhiyun if (ret)
299*4882a593Smuzhiyun goto out_err;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun /* Init OSPM support */
302*4882a593Smuzhiyun gma_power_init(dev);
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun ret = -ENOMEM;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
307*4882a593Smuzhiyun if (!dev_priv->scratch_page)
308*4882a593Smuzhiyun goto out_err;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun set_pages_uc(dev_priv->scratch_page, 1);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun ret = psb_gtt_init(dev, 0);
313*4882a593Smuzhiyun if (ret)
314*4882a593Smuzhiyun goto out_err;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun ret = -ENOMEM;
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0);
319*4882a593Smuzhiyun if (!dev_priv->mmu)
320*4882a593Smuzhiyun goto out_err;
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
323*4882a593Smuzhiyun if (!dev_priv->pf_pd)
324*4882a593Smuzhiyun goto out_err;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun ret = psb_do_init(dev);
327*4882a593Smuzhiyun if (ret)
328*4882a593Smuzhiyun return ret;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /* Add stolen memory to SGX MMU */
331*4882a593Smuzhiyun down_read(&pg->sem);
332*4882a593Smuzhiyun ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
333*4882a593Smuzhiyun dev_priv->stolen_base >> PAGE_SHIFT,
334*4882a593Smuzhiyun pg->gatt_start,
335*4882a593Smuzhiyun pg->stolen_size >> PAGE_SHIFT, 0);
336*4882a593Smuzhiyun up_read(&pg->sem);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
339*4882a593Smuzhiyun psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
342*4882a593Smuzhiyun PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun acpi_video_register();
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /* Setup vertical blanking handling */
347*4882a593Smuzhiyun ret = drm_vblank_init(dev, dev_priv->num_pipe);
348*4882a593Smuzhiyun if (ret)
349*4882a593Smuzhiyun goto out_err;
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun /*
352*4882a593Smuzhiyun * Install interrupt handlers prior to powering off SGX or else we will
353*4882a593Smuzhiyun * crash.
354*4882a593Smuzhiyun */
355*4882a593Smuzhiyun dev_priv->vdc_irq_mask = 0;
356*4882a593Smuzhiyun dev_priv->pipestat[0] = 0;
357*4882a593Smuzhiyun dev_priv->pipestat[1] = 0;
358*4882a593Smuzhiyun dev_priv->pipestat[2] = 0;
359*4882a593Smuzhiyun spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
360*4882a593Smuzhiyun PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
361*4882a593Smuzhiyun PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
362*4882a593Smuzhiyun PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
363*4882a593Smuzhiyun spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun drm_irq_install(dev, dev->pdev->irq);
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun psb_modeset_init(dev);
370*4882a593Smuzhiyun psb_fbdev_init(dev);
371*4882a593Smuzhiyun drm_kms_helper_poll_init(dev);
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun /* Only add backlight support if we have LVDS output */
374*4882a593Smuzhiyun list_for_each_entry(connector, &dev->mode_config.connector_list,
375*4882a593Smuzhiyun head) {
376*4882a593Smuzhiyun gma_encoder = gma_attached_encoder(connector);
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun switch (gma_encoder->type) {
379*4882a593Smuzhiyun case INTEL_OUTPUT_LVDS:
380*4882a593Smuzhiyun case INTEL_OUTPUT_MIPI:
381*4882a593Smuzhiyun ret = gma_backlight_init(dev);
382*4882a593Smuzhiyun break;
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun if (ret)
387*4882a593Smuzhiyun return ret;
388*4882a593Smuzhiyun psb_intel_opregion_enable_asle(dev);
389*4882a593Smuzhiyun #if 0
390*4882a593Smuzhiyun /* Enable runtime pm at last */
391*4882a593Smuzhiyun pm_runtime_enable(&dev->pdev->dev);
392*4882a593Smuzhiyun pm_runtime_set_active(&dev->pdev->dev);
393*4882a593Smuzhiyun #endif
394*4882a593Smuzhiyun /* Intel drm driver load is done, continue doing pvr load */
395*4882a593Smuzhiyun return 0;
396*4882a593Smuzhiyun out_err:
397*4882a593Smuzhiyun psb_driver_unload(dev);
398*4882a593Smuzhiyun return ret;
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun
get_brightness(struct backlight_device * bd)401*4882a593Smuzhiyun static inline void get_brightness(struct backlight_device *bd)
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
404*4882a593Smuzhiyun if (bd) {
405*4882a593Smuzhiyun bd->props.brightness = bd->ops->get_brightness(bd);
406*4882a593Smuzhiyun backlight_update_status(bd);
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun #endif
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun
psb_unlocked_ioctl(struct file * filp,unsigned int cmd,unsigned long arg)411*4882a593Smuzhiyun static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
412*4882a593Smuzhiyun unsigned long arg)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun struct drm_file *file_priv = filp->private_data;
415*4882a593Smuzhiyun struct drm_device *dev = file_priv->minor->dev;
416*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
417*4882a593Smuzhiyun static unsigned int runtime_allowed;
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
420*4882a593Smuzhiyun runtime_allowed++;
421*4882a593Smuzhiyun pm_runtime_allow(&dev->pdev->dev);
422*4882a593Smuzhiyun dev_priv->rpm_enabled = 1;
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun return drm_ioctl(filp, cmd, arg);
425*4882a593Smuzhiyun /* FIXME: do we need to wrap the other side of this */
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun
psb_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)428*4882a593Smuzhiyun static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun struct drm_device *dev;
431*4882a593Smuzhiyun int ret;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun ret = pci_enable_device(pdev);
434*4882a593Smuzhiyun if (ret)
435*4882a593Smuzhiyun return ret;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun dev = drm_dev_alloc(&driver, &pdev->dev);
438*4882a593Smuzhiyun if (IS_ERR(dev)) {
439*4882a593Smuzhiyun ret = PTR_ERR(dev);
440*4882a593Smuzhiyun goto err_pci_disable_device;
441*4882a593Smuzhiyun }
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun dev->pdev = pdev;
444*4882a593Smuzhiyun pci_set_drvdata(pdev, dev);
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun ret = psb_driver_load(dev, ent->driver_data);
447*4882a593Smuzhiyun if (ret)
448*4882a593Smuzhiyun goto err_drm_dev_put;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun ret = drm_dev_register(dev, ent->driver_data);
451*4882a593Smuzhiyun if (ret)
452*4882a593Smuzhiyun goto err_psb_driver_unload;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun return 0;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun err_psb_driver_unload:
457*4882a593Smuzhiyun psb_driver_unload(dev);
458*4882a593Smuzhiyun err_drm_dev_put:
459*4882a593Smuzhiyun drm_dev_put(dev);
460*4882a593Smuzhiyun err_pci_disable_device:
461*4882a593Smuzhiyun pci_disable_device(pdev);
462*4882a593Smuzhiyun return ret;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
psb_pci_remove(struct pci_dev * pdev)465*4882a593Smuzhiyun static void psb_pci_remove(struct pci_dev *pdev)
466*4882a593Smuzhiyun {
467*4882a593Smuzhiyun struct drm_device *dev = pci_get_drvdata(pdev);
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun drm_dev_unregister(dev);
470*4882a593Smuzhiyun psb_driver_unload(dev);
471*4882a593Smuzhiyun drm_dev_put(dev);
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun static const struct dev_pm_ops psb_pm_ops = {
475*4882a593Smuzhiyun .resume = gma_power_resume,
476*4882a593Smuzhiyun .suspend = gma_power_suspend,
477*4882a593Smuzhiyun .thaw = gma_power_thaw,
478*4882a593Smuzhiyun .freeze = gma_power_freeze,
479*4882a593Smuzhiyun .restore = gma_power_restore,
480*4882a593Smuzhiyun .runtime_suspend = psb_runtime_suspend,
481*4882a593Smuzhiyun .runtime_resume = psb_runtime_resume,
482*4882a593Smuzhiyun .runtime_idle = psb_runtime_idle,
483*4882a593Smuzhiyun };
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun static const struct vm_operations_struct psb_gem_vm_ops = {
486*4882a593Smuzhiyun .fault = psb_gem_fault,
487*4882a593Smuzhiyun .open = drm_gem_vm_open,
488*4882a593Smuzhiyun .close = drm_gem_vm_close,
489*4882a593Smuzhiyun };
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun static const struct file_operations psb_gem_fops = {
492*4882a593Smuzhiyun .owner = THIS_MODULE,
493*4882a593Smuzhiyun .open = drm_open,
494*4882a593Smuzhiyun .release = drm_release,
495*4882a593Smuzhiyun .unlocked_ioctl = psb_unlocked_ioctl,
496*4882a593Smuzhiyun .compat_ioctl = drm_compat_ioctl,
497*4882a593Smuzhiyun .mmap = drm_gem_mmap,
498*4882a593Smuzhiyun .poll = drm_poll,
499*4882a593Smuzhiyun .read = drm_read,
500*4882a593Smuzhiyun };
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun static struct drm_driver driver = {
503*4882a593Smuzhiyun .driver_features = DRIVER_MODESET | DRIVER_GEM,
504*4882a593Smuzhiyun .lastclose = drm_fb_helper_lastclose,
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun .num_ioctls = ARRAY_SIZE(psb_ioctls),
507*4882a593Smuzhiyun .irq_preinstall = psb_irq_preinstall,
508*4882a593Smuzhiyun .irq_postinstall = psb_irq_postinstall,
509*4882a593Smuzhiyun .irq_uninstall = psb_irq_uninstall,
510*4882a593Smuzhiyun .irq_handler = psb_irq_handler,
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun .gem_free_object_unlocked = psb_gem_free_object,
513*4882a593Smuzhiyun .gem_vm_ops = &psb_gem_vm_ops,
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun .dumb_create = psb_gem_dumb_create,
516*4882a593Smuzhiyun .ioctls = psb_ioctls,
517*4882a593Smuzhiyun .fops = &psb_gem_fops,
518*4882a593Smuzhiyun .name = DRIVER_NAME,
519*4882a593Smuzhiyun .desc = DRIVER_DESC,
520*4882a593Smuzhiyun .date = DRIVER_DATE,
521*4882a593Smuzhiyun .major = DRIVER_MAJOR,
522*4882a593Smuzhiyun .minor = DRIVER_MINOR,
523*4882a593Smuzhiyun .patchlevel = DRIVER_PATCHLEVEL
524*4882a593Smuzhiyun };
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun static struct pci_driver psb_pci_driver = {
527*4882a593Smuzhiyun .name = DRIVER_NAME,
528*4882a593Smuzhiyun .id_table = pciidlist,
529*4882a593Smuzhiyun .probe = psb_pci_probe,
530*4882a593Smuzhiyun .remove = psb_pci_remove,
531*4882a593Smuzhiyun .driver.pm = &psb_pm_ops,
532*4882a593Smuzhiyun };
533*4882a593Smuzhiyun
psb_init(void)534*4882a593Smuzhiyun static int __init psb_init(void)
535*4882a593Smuzhiyun {
536*4882a593Smuzhiyun return pci_register_driver(&psb_pci_driver);
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun
psb_exit(void)539*4882a593Smuzhiyun static void __exit psb_exit(void)
540*4882a593Smuzhiyun {
541*4882a593Smuzhiyun pci_unregister_driver(&psb_pci_driver);
542*4882a593Smuzhiyun }
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun late_initcall(psb_init);
545*4882a593Smuzhiyun module_exit(psb_exit);
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun MODULE_AUTHOR(DRIVER_AUTHOR);
548*4882a593Smuzhiyun MODULE_DESCRIPTION(DRIVER_DESC);
549*4882a593Smuzhiyun MODULE_LICENSE("GPL");
550