2  * Copyright 2008-2012 Freescale Semiconductor, Inc.
4  * SPDX-License-Identifier:	GPL-2.0+
11 #include <asm/mmu.h>
35 	setbits_be32(&gur->pmuxcr,  in board_early_init_f()
41 	 * So set SDHC_WP to active-low when use MPC8536 Rev1.1 and greater.*/  in board_early_init_f()
45 		setbits_be32(&gur->gencfgr, MPC85xx_GENCFGR_SDHC_WP_INV);  in board_early_init_f()
87  * Fixed sdram init -- doesn't use serial presence detect.
93 	struct ccsr_ddr __iomem *ddr = &immap->im_ddr;  in fixed_sdram()
96 	ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS;  in fixed_sdram()
97 	ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG;  in fixed_sdram()
99 	ddr->timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;  in fixed_sdram()
100 	ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;  in fixed_sdram()
101 	ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;  in fixed_sdram()
102 	ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;  in fixed_sdram()
103 	ddr->sdram_mode = CONFIG_SYS_DDR_MODE_1;  in fixed_sdram()
104 	ddr->sdram_mode_2 = CONFIG_SYS_DDR_MODE_2;  in fixed_sdram()
105 	ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL;  in fixed_sdram()
106 	ddr->sdram_data_init = CONFIG_SYS_DDR_DATA_INIT;  in fixed_sdram()
107 	ddr->sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CTRL;  in fixed_sdram()
108 	ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL2;  in fixed_sdram()
111 	ddr->err_int_en = CONFIG_SYS_DDR_ERR_INT_EN;  in fixed_sdram()
112 	ddr->err_disable = CONFIG_SYS_DDR_ERR_DIS;  in fixed_sdram()
113 	ddr->err_sbe = CONFIG_SYS_DDR_SBE;  in fixed_sdram()
117 	udelay(500);  in fixed_sdram()
119 	ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL;  in fixed_sdram()
123 	debug("DDR - 1st controller: memory initializing\n");  in fixed_sdram()
128 	while ((ddr->sdram_cfg_2 & (d_init << 4)) != 0) {  in fixed_sdram()
133 	udelay(500);  in fixed_sdram()
157 	devdisr = in_be32(&gur->devdisr);  in pci_init_board()
158 	pordevsr = in_be32(&gur->pordevsr);  in pci_init_board()
159 	porpllsr = in_be32(&gur->porpllsr);  in pci_init_board()
180 			pci_arb ? "arbiter" : "external-arbiter",  in pci_init_board()
191 	setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */  in pci_init_board()
202 	 * Remap Boot flash + PROMJET region to caching-inhibited  in board_early_init_r()
206 	/* Flush d-cache and invalidate i-cache of any FLASH data */  in board_early_init_r()
210 	if (flash_esel == -1) {  in board_early_init_r()