fix(zynqmp): enable A53 workaround(errata 1530924)

BL31 already reports that there is missing CPU workaround for this
erratum as
"WARNING: BL31: cortex_a53: CPU workaround for 1530924 was missing!"

fix(zynqmp): enable A53 workaround(errata 1530924)

BL31 already reports that there is missing CPU workaround for this
erratum as
"WARNING: BL31: cortex_a53: CPU workaround for 1530924 was missing!"

That's why enable it by default as was done by other platforms for
example by commit 74665119f04d ("allwinner: Enable workaround for
Cortex-A53 erratum 1530924").

Change-Id: I251ffe3c307781b07477afb64f4e7af5dd9af9fe
Signed-off-by: Michal Simek <michal.simek@amd.com>

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feat(zynqmp): add SMCCC_ARCH_SOC_ID support

Add support for calling SMCCC_ARCH_SOC_ID which is used by Linux soc_id
driver for printing information about manufacturer and also chip version
and silic

feat(zynqmp): add SMCCC_ARCH_SOC_ID support

Add support for calling SMCCC_ARCH_SOC_ID which is used by Linux soc_id
driver for printing information about manufacturer and also chip version
and silicon ID code. SOC revision is directly mapped to chip ID code.
And SOC version is composed from manufacturer ID based on JEP-106 with
chip_id which contains bits mapped to CPU register 0xffca0044 platform
bits which differentiate between silicon, qemu and other emulated
platforms.

Function description is available at
docs/getting_started/porting-guide.rst.

Change-Id: I1f19e1973593897e71b39244dbdbceb6bd0e8a07
Signed-off-by: Michal Simek <michal.simek@amd.com>

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fix(context-mgmt): enable SCXTNUM access

Enable SCXTNUM_ELx access for lower ELs in non-secure state.
Make realm context setup take this build flag into account but enable it
by default when RME is

fix(context-mgmt): enable SCXTNUM access

Enable SCXTNUM_ELx access for lower ELs in non-secure state.
Make realm context setup take this build flag into account but enable it
by default when RME is used.

Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
Change-Id: Ieb0186b2fdffad464bb9316fc3973772c9c28cd0

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Merge "chore: add encrypt_fw to gitignore" into integration

Merge changes I7bd311d7,Iea7dcfe3,I9d890934 into integration

* changes:
refactor(allwinner): use fdt_node_is_enabled() in AXP driver
fix(allwinner): check RSB availability in DT on H6
refactor

Merge changes I7bd311d7,Iea7dcfe3,I9d890934 into integration

* changes:
refactor(allwinner): use fdt_node_is_enabled() in AXP driver
fix(allwinner): check RSB availability in DT on H6
refactor(fdt): introduce common fdt_node_is_enabled()

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Merge "feat(psa): interface with RSS for NV counters" into integration

feat(psa): interface with RSS for NV counters

Adding AP/RSS interface for retrieving and incrementing non-volatile
counters.

The read interface implements the psa_call:
psa_call(RSS_PLATFORM_SERVIC

feat(psa): interface with RSS for NV counters

Adding AP/RSS interface for retrieving and incrementing non-volatile
counters.

The read interface implements the psa_call:
psa_call(RSS_PLATFORM_SERVICE_HANDLE,
RSS_PLATFORM_API_ID_NV_READ,
in_vec, 1, out_vec, 1);

where the in_vec indicates which of the 3 counters we want, and the
out_vec stores the counter value we get back from RSS.

The increment interface implements the psa_call:
psa_call(RSS_PLATFORM_SERVICE_HANDLE,
RSS_PLATFORM_API_ID_NV_INCREMENT,
in_vec, 1, (psa_outvec *)NULL, 0);

where, again, in_vec indicates the counter to increment, and we don't
get any output parameter from RSS.

Through this service, we will be able to get/increment any of the 3 NV
counters used on a CCA platform:
- NV counter for CCA firmware (BL2, BL31, RMM).
- NV counter for secure firmware.
- NV counter for non-secure firmware.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Signed-off-by: Raef Coles <raef.coles@arm.com>
Change-Id: I4c1c7f4837ebff30de16bb0ce7ecd416b70b1f62

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feat(spmd): map SPMC manifest region as EL3_PAS

Mapped SPMC manifest region as EL3_PAS so that it will get
mapped as Root region in RME enabled system otherwise Secure
region.

Change-Id: I1af5344d7

feat(spmd): map SPMC manifest region as EL3_PAS

Mapped SPMC manifest region as EL3_PAS so that it will get
mapped as Root region in RME enabled system otherwise Secure
region.

Change-Id: I1af5344d7516e948d5b3664bcdb94cdfc367cd78
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(fvp): update device tree with load addresses of TOS_FW config

Provided both the root and secure addresses for TOS_FW config
in case of RME enabled systems where root address is in Root
SRAM and

feat(fvp): update device tree with load addresses of TOS_FW config

Provided both the root and secure addresses for TOS_FW config
in case of RME enabled systems where root address is in Root
SRAM and secure address is in Trusted DRAM.

Non-RME systems are unaffected by this change.

Change-Id: Ifb927c90fa5a68fe5362980858b4ddc5403ac95b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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refactor(fvp): rename the DTB info structure member

In line with the previous patch, the name of the member of the
hw_config DTB info structure has been renamed.

Change-Id: I6689e416fecd66faa515e82

refactor(fvp): rename the DTB info structure member

In line with the previous patch, the name of the member of the
hw_config DTB info structure has been renamed.

Change-Id: I6689e416fecd66faa515e820f1c4b23bcb65bfb1
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(fconf): rename 'ns-load-address' to 'secondary-load-address'

The 'ns-load-address' property has been renamed to 'secondary-load-
address' in order to make it more generic. It can be used to cop

feat(fconf): rename 'ns-load-address' to 'secondary-load-address'

The 'ns-load-address' property has been renamed to 'secondary-load-
address' in order to make it more generic. It can be used to copy
the configuration to any location, be it root, secure, or non-secure.

Change-Id: I122508e155ccd99082296be3f6b8db2f908be221
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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docs(qemu): delineate flash based boot method

Make the language around the explanation for booting via secure flash
clearer. Provide details into the intent of the options given to QEMU.

Change-Id:

docs(qemu): delineate flash based boot method

Make the language around the explanation for booting via secure flash
clearer. Provide details into the intent of the options given to QEMU.

Change-Id: Ia573b900aaa2346cad4f82191110b978f9bd5481
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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refactor(fiptool): move plat_fiptool.mk to tools

Move all plat_fiptool.mks into tools, change the logic to recursively
check for tools/fiptool/plat_fiptool/<plat_path>/plat_fiptool.mk

I.e. for a pl

refactor(fiptool): move plat_fiptool.mk to tools

Move all plat_fiptool.mks into tools, change the logic to recursively
check for tools/fiptool/plat_fiptool/<plat_path>/plat_fiptool.mk

I.e. for a platform that has the path "plat/arm/board/tc/platform.mk",
the makefile will now load the first existing file from:
- tools/fiptool/plat_fiptool/arm/board/tc/plat_fiptool.mk
- tools/fiptool/plat_fiptool/arm/board/plat_fiptool.mk
- tools/fiptool/plat_fiptool/arm/plat_fiptool.mk

This enables fiptool to support multiple platforms, or a specific one.

Remove file-copying previously being used to handle old default path.
Remove custom file cleaning in plat_fiptool.mk.

Change-Id: I95245bcf7143b329481d4394ab64f29bfe9de5ab
Signed-off-by: Raef Coles <raef.coles@arm.com>

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feat(gicv3): enlarge the range for intr_num of structure interrupt_prop_t

As the max ESPI can be 5119, so enlarge the intr_num range of
structure interrupt_prop_t. After the patch the ESPI can be ad

feat(gicv3): enlarge the range for intr_num of structure interrupt_prop_t

As the max ESPI can be 5119, so enlarge the intr_num range of
structure interrupt_prop_t. After the patch the ESPI can be add to
this macro:
define PLATFORM_G1S_PROPS(grp) \
INTR_PROP_DESC(197 - 32 + 4576, GIC_HIGHEST_SEC_PRIORITY, (grp), GIC_INTR_CFG_EDGE), \
INTR_PROP_DESC(199 - 32 + 4576, GIC_HIGHEST_SEC_PRIORITY, (grp), GIC_INTR_CFG_EDGE)

The firmware-design.rst will be updated accordingly.

Signed-off-by: Ming Huang <huangming@linux.alibaba.com>
Change-Id: Ic923868bb1b00c017410dc2aeabfda58ee54782f

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docs: add interrupts-target field to sp manifest

In order to support the ability to target a SPI interrupt to a
particular core, an impdef field "interrupts-target" has been added to
associate and i

docs: add interrupts-target field to sp manifest

In order to support the ability to target a SPI interrupt to a
particular core, an impdef field "interrupts-target" has been added to
associate and interrupt id with an mpidr. The field is optional and if
not provided, existing SPMC behavior of routing to boot strap core is
maintained.

Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com>
Change-Id: I78ccfb45cd9b411cca4b36ff940064fc9dcd1622

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Merge "refactor(tc): update total compute gpu device node" into integration

refactor(allwinner): use fdt_node_is_enabled() in AXP driver

The Allwinner AXP driver was using a private implementation of that
function, remove that in favour of our now common implementation.

Ch

refactor(allwinner): use fdt_node_is_enabled() in AXP driver

The Allwinner AXP driver was using a private implementation of that
function, remove that in favour of our now common implementation.

Change-Id: I7bd311d73060d4bc83f93cff6bedf6c78dddd3ca
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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fix(allwinner): check RSB availability in DT on H6

At the moment we access the RSB bus on all Allwinner H6 boards
unconditionally, even though some boards do not have any PMIC at all,
while others h

fix(allwinner): check RSB availability in DT on H6

At the moment we access the RSB bus on all Allwinner H6 boards
unconditionally, even though some boards do not have any PMIC at all,
while others have some I2C devices connected to the same pins.
The latter case is just fragile, but the first case leads to a hang on
at least one board, as reported by Jernej.

Scan the devicetree, to check for the availability of the RSB bus node.
Proceed only if the RSB DT node is actually enabled.

Change-Id: Iea7dcfe3e085e173334d098ec4ddcb6c4b085771
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Jernej Skrabec <jernej.skrabec@gmail.com>

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refactor(fdt): introduce common fdt_node_is_enabled()

There are several users in the tree which want to check whether a given
FDT node is enabled or not: the "status" property holds that
information

refactor(fdt): introduce common fdt_node_is_enabled()

There are several users in the tree which want to check whether a given
FDT node is enabled or not: the "status" property holds that
information. So far all those users provide private implementations,
some of them having issues.

Export a generic implementation of that function in fdt_wrappers.h, as
a "static inline" function to not increase code size.
Also replace the existing implementation in Arm's fconf code, which had
a tiny bug in needlessly using the property length:
"status = [6f 6b 61 79 20];" would pass the check, where it should not.
The proper solution is also simpler: status must be a string, and
strings must be NUL-terminated in a DT. strcmp() would terminate on the
first NUL in *either* of the two strings it compares, so it would never
walk beyond the property boundary in the DTB.

Change-Id: I9d89093432f127c09add6cf5c93a725bc534e5de
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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refactor(tc): update total compute gpu device node

updated gpu clocks and added gpu simple power model node

Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>
Change-Id: Ia475f136bec8a569

refactor(tc): update total compute gpu device node

updated gpu clocks and added gpu simple power model node

Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>
Change-Id: Ia475f136bec8a569f764255eb87c212a692626dc

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Merge "fix(versal-net): populate gic v3 rdist data statically" into integration

Merge "feat(optee): add loading OP-TEE image via an SMC" into integration

Merge changes from topic "xlnx_feat_chores" into integration

* changes:
chore(xilinx): update print information
feat(versal-net): add jtag dcc support

chore: add encrypt_fw to gitignore

Add tools/encrypt_fw/encrypt_fw & tools/encrypt_fw/encrypt_fw.exe to
.gitignore file, to avoid git listing those binary files.

Signed-off-by: Yann Gautier <yann.g

chore: add encrypt_fw to gitignore

Add tools/encrypt_fw/encrypt_fw & tools/encrypt_fw/encrypt_fw.exe to
.gitignore file, to avoid git listing those binary files.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I2f4ddbe1c11848513fe20f7c8b448a041988cc4f

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chore(xilinx): update print information

Remove company name from the console messages while printing only
relevant information for the platform.

Change-Id: Id8171326e0267eb6f3a26de4eb66143970de2dbd

chore(xilinx): update print information

Remove company name from the console messages while printing only
relevant information for the platform.

Change-Id: Id8171326e0267eb6f3a26de4eb66143970de2dbd
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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