1 /* 2 * Copyright (c) 2019-2023, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef ARCH_FEATURES_H 8 #define ARCH_FEATURES_H 9 10 #include <stdbool.h> 11 12 #include <arch_helpers.h> 13 #include <common/feat_detect.h> 14 15 #define ISOLATE_FIELD(reg, feat) \ 16 ((unsigned int)(((reg) >> (feat ## _SHIFT)) & (feat ## _MASK))) 17 18 static inline bool is_armv7_gentimer_present(void) 19 { 20 /* The Generic Timer is always present in an ARMv8-A implementation */ 21 return true; 22 } 23 24 static inline unsigned int read_feat_pan_id_field(void) 25 { 26 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_PAN); 27 } 28 29 static inline bool is_feat_pan_supported(void) 30 { 31 if (ENABLE_FEAT_PAN == FEAT_STATE_DISABLED) { 32 return false; 33 } 34 35 if (ENABLE_FEAT_PAN == FEAT_STATE_ALWAYS) { 36 return true; 37 } 38 39 return read_feat_pan_id_field() != 0U; 40 } 41 42 static inline unsigned int read_feat_vhe_id_field(void) 43 { 44 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE); 45 } 46 47 static inline bool is_feat_vhe_supported(void) 48 { 49 if (ENABLE_FEAT_VHE == FEAT_STATE_DISABLED) { 50 return false; 51 } 52 53 if (ENABLE_FEAT_VHE == FEAT_STATE_ALWAYS) { 54 return true; 55 } 56 57 return read_feat_vhe_id_field() != 0U; 58 } 59 60 static inline bool is_armv8_2_ttcnp_present(void) 61 { 62 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) & 63 ID_AA64MMFR2_EL1_CNP_MASK) != 0U; 64 } 65 66 static inline bool is_feat_pacqarma3_present(void) 67 { 68 uint64_t mask_id_aa64isar2 = 69 (ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) | 70 (ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT); 71 72 /* If any of the fields is not zero, QARMA3 algorithm is present */ 73 return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U; 74 } 75 76 static inline bool is_armv8_3_pauth_present(void) 77 { 78 uint64_t mask_id_aa64isar1 = 79 (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) | 80 (ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) | 81 (ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) | 82 (ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT); 83 84 /* 85 * If any of the fields is not zero or QARMA3 is present, 86 * PAuth is present 87 */ 88 return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U || 89 is_feat_pacqarma3_present()); 90 } 91 92 static inline bool is_armv8_4_dit_present(void) 93 { 94 return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) & 95 ID_AA64PFR0_DIT_MASK) == 1U; 96 } 97 98 static inline bool is_armv8_4_ttst_present(void) 99 { 100 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) & 101 ID_AA64MMFR2_EL1_ST_MASK) == 1U; 102 } 103 104 static inline bool is_armv8_5_bti_present(void) 105 { 106 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) & 107 ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED; 108 } 109 110 static inline unsigned int get_armv8_5_mte_support(void) 111 { 112 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) & 113 ID_AA64PFR1_EL1_MTE_MASK); 114 } 115 116 static inline unsigned int read_feat_sel2_id_field(void) 117 { 118 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SEL2); 119 } 120 121 static inline bool is_feat_sel2_supported(void) 122 { 123 if (ENABLE_FEAT_SEL2 == FEAT_STATE_DISABLED) { 124 return false; 125 } 126 127 if (ENABLE_FEAT_SEL2 == FEAT_STATE_ALWAYS) { 128 return true; 129 } 130 131 return read_feat_sel2_id_field() != 0U; 132 } 133 134 static inline unsigned int read_feat_twed_id_field(void) 135 { 136 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_TWED); 137 } 138 139 static inline bool is_feat_twed_supported(void) 140 { 141 if (ENABLE_FEAT_TWED == FEAT_STATE_DISABLED) { 142 return false; 143 } 144 145 if (ENABLE_FEAT_TWED == FEAT_STATE_ALWAYS) { 146 return true; 147 } 148 149 return read_feat_twed_id_field() != 0U; 150 } 151 152 static unsigned int read_feat_fgt_id_field(void) 153 { 154 return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT); 155 } 156 157 static inline bool is_feat_fgt_supported(void) 158 { 159 if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) { 160 return false; 161 } 162 163 if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) { 164 return true; 165 } 166 167 return read_feat_fgt_id_field() != 0U; 168 } 169 170 static unsigned int read_feat_ecv_id_field(void) 171 { 172 return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_ECV); 173 } 174 175 static inline bool is_feat_ecv_supported(void) 176 { 177 if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) { 178 return false; 179 } 180 181 if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) { 182 return true; 183 } 184 185 return read_feat_ecv_id_field() != 0U; 186 } 187 188 static inline bool is_feat_ecv_v2_supported(void) 189 { 190 if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) { 191 return false; 192 } 193 194 if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) { 195 return true; 196 } 197 198 return read_feat_ecv_id_field() >= ID_AA64MMFR0_EL1_ECV_SELF_SYNCH; 199 } 200 201 static inline bool is_armv8_5_rng_present(void) 202 { 203 return ((read_id_aa64isar0_el1() >> ID_AA64ISAR0_RNDR_SHIFT) & 204 ID_AA64ISAR0_RNDR_MASK); 205 } 206 207 static unsigned int read_feat_tcrx_id_field(void) 208 { 209 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX); 210 } 211 212 static inline bool is_feat_tcr2_supported(void) 213 { 214 if (ENABLE_FEAT_TCR2 == FEAT_STATE_DISABLED) { 215 return false; 216 } 217 218 if (ENABLE_FEAT_TCR2 == FEAT_STATE_ALWAYS) { 219 return true; 220 } 221 222 return read_feat_tcrx_id_field() != 0U; 223 } 224 225 /******************************************************************************* 226 * Functions to identify the presence of the Activity Monitors Extension 227 ******************************************************************************/ 228 static unsigned int read_feat_amu_id_field(void) 229 { 230 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU); 231 } 232 233 static inline bool is_feat_amu_supported(void) 234 { 235 if (ENABLE_FEAT_AMUv1 == FEAT_STATE_DISABLED) { 236 return false; 237 } 238 239 if (ENABLE_FEAT_AMUv1 == FEAT_STATE_ALWAYS) { 240 return true; 241 } 242 243 return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1; 244 } 245 246 static inline bool is_armv8_6_feat_amuv1p1_present(void) 247 { 248 return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1; 249 } 250 251 /* 252 * Return MPAM version: 253 * 254 * 0x00: None Armv8.0 or later 255 * 0x01: v0.1 Armv8.4 or later 256 * 0x10: v1.0 Armv8.2 or later 257 * 0x11: v1.1 Armv8.4 or later 258 * 259 */ 260 static inline unsigned int read_feat_mpam_version(void) 261 { 262 return (unsigned int)((((read_id_aa64pfr0_el1() >> 263 ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) | 264 ((read_id_aa64pfr1_el1() >> 265 ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK)); 266 } 267 268 static inline bool is_feat_mpam_supported(void) 269 { 270 if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_DISABLED) { 271 return false; 272 } 273 274 if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_ALWAYS) { 275 return true; 276 } 277 278 return read_feat_mpam_version() != 0U; 279 } 280 281 static inline unsigned int read_feat_hcx_id_field(void) 282 { 283 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX); 284 } 285 286 static inline bool is_feat_hcx_supported(void) 287 { 288 if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) { 289 return false; 290 } 291 292 if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) { 293 return true; 294 } 295 296 return read_feat_hcx_id_field() != 0U; 297 } 298 299 static inline bool is_feat_rng_trap_present(void) 300 { 301 return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) & 302 ID_AA64PFR1_EL1_RNDR_TRAP_MASK) 303 == ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED); 304 } 305 306 static inline unsigned int get_armv9_2_feat_rme_support(void) 307 { 308 /* 309 * Return the RME version, zero if not supported. This function can be 310 * used as both an integer value for the RME version or compared to zero 311 * to detect RME presence. 312 */ 313 return (unsigned int)(read_id_aa64pfr0_el1() >> 314 ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK; 315 } 316 317 /********************************************************************************* 318 * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction) 319 ********************************************************************************/ 320 static inline unsigned int read_feat_sb_id_field(void) 321 { 322 return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB); 323 } 324 325 /********************************************************************************* 326 * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2) 327 ********************************************************************************/ 328 static inline unsigned int read_feat_csv2_id_field(void) 329 { 330 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_CSV2); 331 } 332 333 static inline bool is_feat_csv2_2_supported(void) 334 { 335 if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_DISABLED) { 336 return false; 337 } 338 339 if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_ALWAYS) { 340 return true; 341 } 342 343 return read_feat_csv2_id_field() >= ID_AA64PFR0_CSV2_2_SUPPORTED; 344 } 345 346 /********************************************************************************** 347 * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension) 348 *********************************************************************************/ 349 static inline unsigned int read_feat_spe_id_field(void) 350 { 351 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMS); 352 } 353 354 static inline bool is_feat_spe_supported(void) 355 { 356 if (ENABLE_SPE_FOR_NS == FEAT_STATE_DISABLED) { 357 return false; 358 } 359 360 if (ENABLE_SPE_FOR_NS == FEAT_STATE_ALWAYS) { 361 return true; 362 } 363 364 return read_feat_spe_id_field() != 0U; 365 } 366 367 /******************************************************************************* 368 * Function to identify the presence of FEAT_SVE (Scalable Vector Extension) 369 ******************************************************************************/ 370 static inline bool is_armv8_2_feat_sve_present(void) 371 { 372 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT) & 373 ID_AA64PFR0_SVE_MASK) == ID_AA64PFR0_SVE_SUPPORTED); 374 } 375 376 /******************************************************************************* 377 * Function to identify the presence of FEAT_RAS (Reliability,Availability, 378 * and Serviceability Extension) 379 ******************************************************************************/ 380 static inline bool is_armv8_2_feat_ras_present(void) 381 { 382 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) & 383 ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED); 384 } 385 386 /************************************************************************** 387 * Function to identify the presence of FEAT_DIT (Data Independent Timing) 388 *************************************************************************/ 389 static inline bool is_armv8_4_feat_dit_present(void) 390 { 391 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) & 392 ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED); 393 } 394 395 static inline unsigned int read_feat_tracever_id_field(void) 396 { 397 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEVER); 398 } 399 400 static inline bool is_feat_sys_reg_trace_supported(void) 401 { 402 if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_DISABLED) { 403 return false; 404 } 405 406 if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_ALWAYS) { 407 return true; 408 } 409 410 return read_feat_tracever_id_field() != 0U; 411 } 412 413 /************************************************************************* 414 * Function to identify the presence of FEAT_TRF (TraceLift) 415 ************************************************************************/ 416 static inline unsigned int read_feat_trf_id_field(void) 417 { 418 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT); 419 } 420 421 static inline bool is_feat_trf_supported(void) 422 { 423 if (ENABLE_TRF_FOR_NS == FEAT_STATE_DISABLED) { 424 return false; 425 } 426 427 if (ENABLE_TRF_FOR_NS == FEAT_STATE_ALWAYS) { 428 return true; 429 } 430 431 return read_feat_trf_id_field() != 0U; 432 } 433 434 /******************************************************************************** 435 * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization 436 * Support) 437 *******************************************************************************/ 438 static inline unsigned int read_feat_nv_id_field(void) 439 { 440 return ISOLATE_FIELD(read_id_aa64mmfr2_el1(), ID_AA64MMFR2_EL1_NV); 441 } 442 443 static inline bool is_feat_nv2_supported(void) 444 { 445 if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_DISABLED) { 446 return false; 447 } 448 449 if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_ALWAYS) { 450 return true; 451 } 452 453 return read_feat_nv_id_field() >= ID_AA64MMFR2_EL1_NV2_SUPPORTED; 454 } 455 456 /******************************************************************************* 457 * Function to identify the presence of FEAT_BRBE (Branch Record Buffer 458 * Extension) 459 ******************************************************************************/ 460 static inline unsigned int read_feat_brbe_id_field(void) 461 { 462 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE); 463 } 464 465 static inline bool is_feat_brbe_supported(void) 466 { 467 if (ENABLE_BRBE_FOR_NS == FEAT_STATE_DISABLED) { 468 return false; 469 } 470 471 if (ENABLE_BRBE_FOR_NS == FEAT_STATE_ALWAYS) { 472 return true; 473 } 474 475 return read_feat_brbe_id_field() != 0U; 476 } 477 478 /******************************************************************************* 479 * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension) 480 ******************************************************************************/ 481 static inline unsigned int read_feat_trbe_id_field(void) 482 { 483 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER); 484 } 485 486 static inline bool is_feat_trbe_supported(void) 487 { 488 if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) { 489 return false; 490 } 491 492 if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) { 493 return true; 494 } 495 496 return read_feat_trbe_id_field() != 0U; 497 498 } 499 #endif /* ARCH_FEATURES_H */ 500