1 /* 2 * Copyright (c) 2019-2023, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef ARCH_FEATURES_H 8 #define ARCH_FEATURES_H 9 10 #include <stdbool.h> 11 12 #include <arch_helpers.h> 13 #include <common/feat_detect.h> 14 15 #define ISOLATE_FIELD(reg, feat) \ 16 ((unsigned int)(((reg) >> (feat ## _SHIFT)) & (feat ## _MASK))) 17 18 static inline bool is_armv7_gentimer_present(void) 19 { 20 /* The Generic Timer is always present in an ARMv8-A implementation */ 21 return true; 22 } 23 24 static inline unsigned int read_feat_pan_id_field(void) 25 { 26 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_PAN); 27 } 28 29 static inline bool is_feat_pan_supported(void) 30 { 31 if (ENABLE_FEAT_PAN == FEAT_STATE_DISABLED) { 32 return false; 33 } 34 35 if (ENABLE_FEAT_PAN == FEAT_STATE_ALWAYS) { 36 return true; 37 } 38 39 return read_feat_pan_id_field() != 0U; 40 } 41 42 static inline unsigned int read_feat_vhe_id_field(void) 43 { 44 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE); 45 } 46 47 static inline bool is_feat_vhe_supported(void) 48 { 49 if (ENABLE_FEAT_VHE == FEAT_STATE_DISABLED) { 50 return false; 51 } 52 53 if (ENABLE_FEAT_VHE == FEAT_STATE_ALWAYS) { 54 return true; 55 } 56 57 return read_feat_vhe_id_field() != 0U; 58 } 59 60 static inline bool is_armv8_2_ttcnp_present(void) 61 { 62 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) & 63 ID_AA64MMFR2_EL1_CNP_MASK) != 0U; 64 } 65 66 static inline bool is_feat_pacqarma3_present(void) 67 { 68 uint64_t mask_id_aa64isar2 = 69 (ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) | 70 (ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT); 71 72 /* If any of the fields is not zero, QARMA3 algorithm is present */ 73 return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U; 74 } 75 76 static inline bool is_armv8_3_pauth_present(void) 77 { 78 uint64_t mask_id_aa64isar1 = 79 (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) | 80 (ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) | 81 (ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) | 82 (ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT); 83 84 /* 85 * If any of the fields is not zero or QARMA3 is present, 86 * PAuth is present 87 */ 88 return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U || 89 is_feat_pacqarma3_present()); 90 } 91 92 static inline bool is_armv8_4_dit_present(void) 93 { 94 return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) & 95 ID_AA64PFR0_DIT_MASK) == 1U; 96 } 97 98 static inline bool is_armv8_4_ttst_present(void) 99 { 100 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) & 101 ID_AA64MMFR2_EL1_ST_MASK) == 1U; 102 } 103 104 static inline bool is_armv8_5_bti_present(void) 105 { 106 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) & 107 ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED; 108 } 109 110 static inline unsigned int get_armv8_5_mte_support(void) 111 { 112 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) & 113 ID_AA64PFR1_EL1_MTE_MASK); 114 } 115 116 static inline bool is_armv8_4_sel2_present(void) 117 { 118 return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SEL2_SHIFT) & 119 ID_AA64PFR0_SEL2_MASK) == 1ULL; 120 } 121 122 static inline bool is_armv8_6_twed_present(void) 123 { 124 return (((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_TWED_SHIFT) & 125 ID_AA64MMFR1_EL1_TWED_MASK) == ID_AA64MMFR1_EL1_TWED_SUPPORTED); 126 } 127 128 static unsigned int read_feat_fgt_id_field(void) 129 { 130 return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT); 131 } 132 133 static inline bool is_feat_fgt_supported(void) 134 { 135 if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) { 136 return false; 137 } 138 139 if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) { 140 return true; 141 } 142 143 return read_feat_fgt_id_field() != 0U; 144 } 145 146 static inline unsigned long int get_armv8_6_ecv_support(void) 147 { 148 return ((read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_ECV_SHIFT) & 149 ID_AA64MMFR0_EL1_ECV_MASK); 150 } 151 152 static inline bool is_armv8_5_rng_present(void) 153 { 154 return ((read_id_aa64isar0_el1() >> ID_AA64ISAR0_RNDR_SHIFT) & 155 ID_AA64ISAR0_RNDR_MASK); 156 } 157 158 static unsigned int read_feat_tcrx_id_field(void) 159 { 160 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX); 161 } 162 163 static inline bool is_feat_tcr2_supported(void) 164 { 165 if (ENABLE_FEAT_TCR2 == FEAT_STATE_DISABLED) { 166 return false; 167 } 168 169 if (ENABLE_FEAT_TCR2 == FEAT_STATE_ALWAYS) { 170 return true; 171 } 172 173 return read_feat_tcrx_id_field() != 0U; 174 } 175 176 /******************************************************************************* 177 * Functions to identify the presence of the Activity Monitors Extension 178 ******************************************************************************/ 179 static unsigned int read_feat_amu_id_field(void) 180 { 181 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU); 182 } 183 184 static inline bool is_feat_amu_supported(void) 185 { 186 if (ENABLE_FEAT_AMUv1 == FEAT_STATE_DISABLED) { 187 return false; 188 } 189 190 if (ENABLE_FEAT_AMUv1 == FEAT_STATE_ALWAYS) { 191 return true; 192 } 193 194 return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1; 195 } 196 197 static inline bool is_armv8_6_feat_amuv1p1_present(void) 198 { 199 return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1; 200 } 201 202 /* 203 * Return MPAM version: 204 * 205 * 0x00: None Armv8.0 or later 206 * 0x01: v0.1 Armv8.4 or later 207 * 0x10: v1.0 Armv8.2 or later 208 * 0x11: v1.1 Armv8.4 or later 209 * 210 */ 211 static inline unsigned int read_feat_mpam_version(void) 212 { 213 return (unsigned int)((((read_id_aa64pfr0_el1() >> 214 ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) | 215 ((read_id_aa64pfr1_el1() >> 216 ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK)); 217 } 218 219 static inline bool is_feat_mpam_supported(void) 220 { 221 if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_DISABLED) { 222 return false; 223 } 224 225 if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_ALWAYS) { 226 return true; 227 } 228 229 return read_feat_mpam_version() != 0U; 230 } 231 232 static inline unsigned int read_feat_hcx_id_field(void) 233 { 234 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX); 235 } 236 237 static inline bool is_feat_hcx_supported(void) 238 { 239 if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) { 240 return false; 241 } 242 243 if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) { 244 return true; 245 } 246 247 return read_feat_hcx_id_field() != 0U; 248 } 249 250 static inline bool is_feat_rng_trap_present(void) 251 { 252 return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) & 253 ID_AA64PFR1_EL1_RNDR_TRAP_MASK) 254 == ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED); 255 } 256 257 static inline unsigned int get_armv9_2_feat_rme_support(void) 258 { 259 /* 260 * Return the RME version, zero if not supported. This function can be 261 * used as both an integer value for the RME version or compared to zero 262 * to detect RME presence. 263 */ 264 return (unsigned int)(read_id_aa64pfr0_el1() >> 265 ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK; 266 } 267 268 /********************************************************************************* 269 * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction) 270 ********************************************************************************/ 271 static inline unsigned int read_feat_sb_id_field(void) 272 { 273 return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB); 274 } 275 276 /********************************************************************************* 277 * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2) 278 ********************************************************************************/ 279 static inline bool is_armv8_0_feat_csv2_2_present(void) 280 { 281 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_CSV2_SHIFT) & 282 ID_AA64PFR0_CSV2_MASK) == ID_AA64PFR0_CSV2_2_SUPPORTED); 283 } 284 285 /********************************************************************************** 286 * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension) 287 *********************************************************************************/ 288 static inline unsigned int read_feat_spe_id_field(void) 289 { 290 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMS); 291 } 292 293 static inline bool is_feat_spe_supported(void) 294 { 295 if (ENABLE_SPE_FOR_NS == FEAT_STATE_DISABLED) { 296 return false; 297 } 298 299 if (ENABLE_SPE_FOR_NS == FEAT_STATE_ALWAYS) { 300 return true; 301 } 302 303 return read_feat_spe_id_field() != 0U; 304 } 305 306 /******************************************************************************* 307 * Function to identify the presence of FEAT_SVE (Scalable Vector Extension) 308 ******************************************************************************/ 309 static inline bool is_armv8_2_feat_sve_present(void) 310 { 311 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT) & 312 ID_AA64PFR0_SVE_MASK) == ID_AA64PFR0_SVE_SUPPORTED); 313 } 314 315 /******************************************************************************* 316 * Function to identify the presence of FEAT_RAS (Reliability,Availability, 317 * and Serviceability Extension) 318 ******************************************************************************/ 319 static inline bool is_armv8_2_feat_ras_present(void) 320 { 321 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) & 322 ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED); 323 } 324 325 /************************************************************************** 326 * Function to identify the presence of FEAT_DIT (Data Independent Timing) 327 *************************************************************************/ 328 static inline bool is_armv8_4_feat_dit_present(void) 329 { 330 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) & 331 ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED); 332 } 333 334 static inline unsigned int read_feat_tracever_id_field(void) 335 { 336 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEVER); 337 } 338 339 static inline bool is_feat_sys_reg_trace_supported(void) 340 { 341 if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_DISABLED) { 342 return false; 343 } 344 345 if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_ALWAYS) { 346 return true; 347 } 348 349 return read_feat_tracever_id_field() != 0U; 350 } 351 352 /************************************************************************* 353 * Function to identify the presence of FEAT_TRF (TraceLift) 354 ************************************************************************/ 355 static inline unsigned int read_feat_trf_id_field(void) 356 { 357 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT); 358 } 359 360 static inline bool is_feat_trf_supported(void) 361 { 362 if (ENABLE_TRF_FOR_NS == FEAT_STATE_DISABLED) { 363 return false; 364 } 365 366 if (ENABLE_TRF_FOR_NS == FEAT_STATE_ALWAYS) { 367 return true; 368 } 369 370 return read_feat_trf_id_field() != 0U; 371 } 372 373 /******************************************************************************** 374 * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization 375 * Support) 376 *******************************************************************************/ 377 static inline unsigned int get_armv8_4_feat_nv_support(void) 378 { 379 return (((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_NV_SHIFT) & 380 ID_AA64MMFR2_EL1_NV_MASK)); 381 } 382 383 /******************************************************************************* 384 * Function to identify the presence of FEAT_BRBE (Branch Record Buffer 385 * Extension) 386 ******************************************************************************/ 387 static inline unsigned int read_feat_brbe_id_field(void) 388 { 389 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE); 390 } 391 392 static inline bool is_feat_brbe_supported(void) 393 { 394 if (ENABLE_BRBE_FOR_NS == FEAT_STATE_DISABLED) { 395 return false; 396 } 397 398 if (ENABLE_BRBE_FOR_NS == FEAT_STATE_ALWAYS) { 399 return true; 400 } 401 402 return read_feat_brbe_id_field() != 0U; 403 } 404 405 /******************************************************************************* 406 * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension) 407 ******************************************************************************/ 408 static inline unsigned int read_feat_trbe_id_field(void) 409 { 410 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER); 411 } 412 413 static inline bool is_feat_trbe_supported(void) 414 { 415 if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) { 416 return false; 417 } 418 419 if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) { 420 return true; 421 } 422 423 return read_feat_trbe_id_field() != 0U; 424 425 } 426 #endif /* ARCH_FEATURES_H */ 427