1# 2# Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9# Use the GICv3 driver on the FVP by default 10FVP_USE_GIC_DRIVER := FVP_GICV3 11 12# Default cluster count for FVP 13FVP_CLUSTER_COUNT := 2 14 15# Default number of CPUs per cluster on FVP 16FVP_MAX_CPUS_PER_CLUSTER := 4 17 18# Default number of threads per CPU on FVP 19FVP_MAX_PE_PER_CPU := 1 20 21# Disable redistributor frame of inactive/fused CPU cores by marking it as read 22# only; enable redistributor frames of all CPU cores by default. 23FVP_GICR_REGION_PROTECTION := 0 24 25FVP_DT_PREFIX := fvp-base-gicv3-psci 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Pass FVP_GICR_REGION_PROTECTION to the build system. 40$(eval $(call add_define,FVP_GICR_REGION_PROTECTION)) 41 42# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 43# choose the CCI driver , else the CCN driver 44ifeq ($(FVP_CLUSTER_COUNT), 0) 45$(error "Incorrect cluster count specified for FVP port") 46else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 47FVP_INTERCONNECT_DRIVER := FVP_CCI 48else 49FVP_INTERCONNECT_DRIVER := FVP_CCN 50endif 51 52$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 53 54# Choose the GIC sources depending upon the how the FVP will be invoked 55ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 56 57# The GIC model (GIC-600 or GIC-500) will be detected at runtime 58GICV3_SUPPORT_GIC600 := 1 59GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 60 61# Include GICv3 driver files 62include drivers/arm/gic/v3/gicv3.mk 63 64FVP_GIC_SOURCES := ${GICV3_SOURCES} \ 65 plat/common/plat_gicv3.c \ 66 plat/arm/common/arm_gicv3.c 67 68 ifeq ($(filter 1,${RESET_TO_BL2} \ 69 ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 70 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c 71 endif 72 73else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 74 75# No GICv4 extension 76GIC_ENABLE_V4_EXTN := 0 77$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 78 79# Include GICv2 driver files 80include drivers/arm/gic/v2/gicv2.mk 81 82FVP_GIC_SOURCES := ${GICV2_SOURCES} \ 83 plat/common/plat_gicv2.c \ 84 plat/arm/common/arm_gicv2.c 85 86FVP_DT_PREFIX := fvp-base-gicv2-psci 87else 88$(error "Incorrect GIC driver chosen on FVP port") 89endif 90 91ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 92FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 93else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 94FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 95 plat/arm/common/arm_ccn.c 96else 97$(error "Incorrect CCN driver chosen on FVP port") 98endif 99 100FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 101 plat/arm/board/fvp/fvp_security.c \ 102 plat/arm/common/arm_tzc400.c 103 104 105PLAT_INCLUDES := -Iplat/arm/board/fvp/include 106 107 108PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 109 110FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 111 112ifeq (${ARCH}, aarch64) 113 114# select a different set of CPU files, depending on whether we compile for 115# hardware assisted coherency cores or not 116ifeq (${HW_ASSISTED_COHERENCY}, 0) 117# Cores used without DSU 118 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 119 lib/cpus/aarch64/cortex_a53.S \ 120 lib/cpus/aarch64/cortex_a57.S \ 121 lib/cpus/aarch64/cortex_a72.S \ 122 lib/cpus/aarch64/cortex_a73.S 123else 124# Cores used with DSU only 125 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 126 # AArch64-only cores 127 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 128 lib/cpus/aarch64/cortex_a76ae.S \ 129 lib/cpus/aarch64/cortex_a77.S \ 130 lib/cpus/aarch64/cortex_a78.S \ 131 lib/cpus/aarch64/neoverse_n_common.S \ 132 lib/cpus/aarch64/neoverse_n1.S \ 133 lib/cpus/aarch64/neoverse_n2.S \ 134 lib/cpus/aarch64/neoverse_e1.S \ 135 lib/cpus/aarch64/neoverse_v1.S \ 136 lib/cpus/aarch64/neoverse_v2.S \ 137 lib/cpus/aarch64/cortex_a78_ae.S \ 138 lib/cpus/aarch64/cortex_a510.S \ 139 lib/cpus/aarch64/cortex_a710.S \ 140 lib/cpus/aarch64/cortex_a715.S \ 141 lib/cpus/aarch64/cortex_x3.S \ 142 lib/cpus/aarch64/cortex_a65.S \ 143 lib/cpus/aarch64/cortex_a65ae.S \ 144 lib/cpus/aarch64/cortex_a78c.S \ 145 lib/cpus/aarch64/cortex_hayes.S \ 146 lib/cpus/aarch64/cortex_hunter.S \ 147 lib/cpus/aarch64/cortex_hunter_elp_arm.S \ 148 lib/cpus/aarch64/cortex_x2.S \ 149 lib/cpus/aarch64/neoverse_poseidon.S 150 endif 151 # AArch64/AArch32 cores 152 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 153 lib/cpus/aarch64/cortex_a75.S 154endif 155 156else 157FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S \ 158 lib/cpus/aarch32/cortex_a57.S 159endif 160 161BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 162 drivers/arm/sp805/sp805.c \ 163 drivers/delay_timer/delay_timer.c \ 164 drivers/io/io_semihosting.c \ 165 lib/semihosting/semihosting.c \ 166 lib/semihosting/${ARCH}/semihosting_call.S \ 167 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 168 plat/arm/board/fvp/fvp_bl1_setup.c \ 169 plat/arm/board/fvp/fvp_err.c \ 170 plat/arm/board/fvp/fvp_io_storage.c \ 171 ${FVP_CPU_LIBS} \ 172 ${FVP_INTERCONNECT_SOURCES} 173 174ifeq (${USE_SP804_TIMER},1) 175BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 176else 177BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 178endif 179 180 181BL2_SOURCES += drivers/arm/sp805/sp805.c \ 182 drivers/io/io_semihosting.c \ 183 lib/utils/mem_region.c \ 184 lib/semihosting/semihosting.c \ 185 lib/semihosting/${ARCH}/semihosting_call.S \ 186 plat/arm/board/fvp/fvp_bl2_setup.c \ 187 plat/arm/board/fvp/fvp_err.c \ 188 plat/arm/board/fvp/fvp_io_storage.c \ 189 plat/arm/common/arm_nor_psci_mem_protect.c \ 190 ${FVP_SECURITY_SOURCES} 191 192 193ifeq (${COT_DESC_IN_DTB},1) 194BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c 195endif 196 197ifeq (${ENABLE_RME},1) 198BL2_SOURCES += plat/arm/board/fvp/aarch64/fvp_helpers.S 199BL31_SOURCES += plat/arm/board/fvp/fvp_plat_attest_token.c \ 200 plat/arm/board/fvp/fvp_realm_attest_key.c 201endif 202 203ifeq (${ENABLE_FEAT_RNG_TRAP},1) 204BL31_SOURCES += plat/arm/board/fvp/fvp_sync_traps.c 205endif 206 207ifeq (${RESET_TO_BL2},1) 208BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 209 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 210 ${FVP_CPU_LIBS} \ 211 ${FVP_INTERCONNECT_SOURCES} 212endif 213 214ifeq (${USE_SP804_TIMER},1) 215BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 216endif 217 218BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 219 ${FVP_SECURITY_SOURCES} 220 221ifeq (${USE_SP804_TIMER},1) 222BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 223endif 224 225BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 226 drivers/arm/smmu/smmu_v3.c \ 227 drivers/delay_timer/delay_timer.c \ 228 drivers/cfi/v2m/v2m_flash.c \ 229 lib/utils/mem_region.c \ 230 plat/arm/board/fvp/fvp_bl31_setup.c \ 231 plat/arm/board/fvp/fvp_console.c \ 232 plat/arm/board/fvp/fvp_pm.c \ 233 plat/arm/board/fvp/fvp_topology.c \ 234 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 235 plat/arm/common/arm_nor_psci_mem_protect.c \ 236 ${FVP_CPU_LIBS} \ 237 ${FVP_GIC_SOURCES} \ 238 ${FVP_INTERCONNECT_SOURCES} \ 239 ${FVP_SECURITY_SOURCES} 240 241# Support for fconf in BL31 242# Added separately from the above list for better readability 243ifeq ($(filter 1,${RESET_TO_BL2} ${RESET_TO_BL31}),) 244BL31_SOURCES += lib/fconf/fconf.c \ 245 lib/fconf/fconf_dyn_cfg_getter.c \ 246 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c 247 248BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 249 250ifeq (${SEC_INT_DESC_IN_FCONF},1) 251BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c 252endif 253 254endif 255 256ifeq (${USE_SP804_TIMER},1) 257BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 258else 259BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 260endif 261 262# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 263ifdef UNIX_MK 264FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 265FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 266 ${PLAT}_fw_config.dts \ 267 ${PLAT}_tb_fw_config.dts \ 268 ${PLAT}_soc_fw_config.dts \ 269 ${PLAT}_nt_fw_config.dts \ 270 ) 271 272FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 273FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 274FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 275FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 276 277ifeq (${SPD},tspd) 278FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 279FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 280 281# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 282$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 283endif 284 285ifeq (${SPD},spmd) 286 287ifeq ($(ARM_SPMC_MANIFEST_DTS),) 288ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts 289endif 290 291FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 292FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 293 294# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 295$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 296endif 297 298# Add the FW_CONFIG to FIP and specify the same to certtool 299$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG})) 300# Add the TB_FW_CONFIG to FIP and specify the same to certtool 301$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG})) 302# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 303$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG})) 304# Add the NT_FW_CONFIG to FIP and specify the same to certtool 305$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 306 307FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 308$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 309 310# Add the HW_CONFIG to FIP and specify the same to certtool 311$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG})) 312endif 313 314# Enable Activity Monitor Unit extensions by default 315ENABLE_AMU := 1 316 317# Enable dynamic mitigation support by default 318DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 319 320ifeq (${ENABLE_AMU},1) 321BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 322 lib/cpus/aarch64/cpuamu_helpers.S 323 324ifeq (${HW_ASSISTED_COHERENCY}, 1) 325BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 326 lib/cpus/aarch64/neoverse_n1_pubsub.c 327endif 328endif 329 330ifeq (${RAS_EXTENSION},1) 331BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 332endif 333 334ifneq (${ENABLE_STACK_PROTECTOR},0) 335PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 336endif 337 338ifeq (${ARCH},aarch32) 339 NEED_BL32 := yes 340endif 341 342# Enable the dynamic translation tables library. 343ifeq ($(filter 1,${RESET_TO_BL2} ${ARM_XLAT_TABLES_LIB_V1}),) 344 ifeq (${ARCH},aarch32) 345 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 346 else # AArch64 347 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 348 endif 349endif 350 351ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 352 ifeq (${ARCH},aarch32) 353 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 354 else # AArch64 355 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 356 ifeq (${SPD},tspd) 357 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 358 endif 359 endif 360endif 361 362ifeq (${USE_DEBUGFS},1) 363 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 364endif 365 366# Add support for platform supplied linker script for BL31 build 367$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 368 369ifneq (${RESET_TO_BL2}, 0) 370 override BL1_SOURCES = 371endif 372 373# Include Measured Boot makefile before any Crypto library makefile. 374# Crypto library makefile may need default definitions of Measured Boot build 375# flags present in Measured Boot makefile. 376ifeq (${MEASURED_BOOT},1) 377 RSS_MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk 378 $(info Including ${RSS_MEASURED_BOOT_MK}) 379 include ${RSS_MEASURED_BOOT_MK} 380 381 ifneq (${MBOOT_RSS_HASH_ALG}, sha256) 382 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512)) 383 endif 384 385 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} 386 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} 387endif 388 389include plat/arm/board/common/board_common.mk 390include plat/arm/common/arm_common.mk 391 392ifeq (${MEASURED_BOOT},1) 393BL1_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \ 394 plat/arm/board/fvp/fvp_bl1_measured_boot.c \ 395 lib/psa/measured_boot.c 396 397BL2_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \ 398 plat/arm/board/fvp/fvp_bl2_measured_boot.c \ 399 lib/psa/measured_boot.c 400 401# Note that attestation code does not depend on measured boot interfaces per se, 402# but the two features go together - attestation without boot measurements is 403# pretty much pointless... 404BL31_SOURCES += lib/psa/delegated_attestation.c 405 406PLAT_INCLUDES += -Iinclude/lib/psa 407 408# RSS is not supported on FVP right now. Thus, we use the mocked version 409# of the provided PSA APIs. They return with success and hard-coded data. 410PLAT_RSS_NOT_SUPPORTED := 1 411 412# Even though RSS is not supported on FVP (see above), we support overriding 413# PLAT_RSS_NOT_SUPPORTED from the command line, just for the purpose of building 414# the code to detect any build regressions. The resulting firmware will not be 415# functional. 416ifneq (${PLAT_RSS_NOT_SUPPORTED},1) 417 $(warning "RSS is not supported on FVP. The firmware will not be functional.") 418 include drivers/arm/rss/rss_comms.mk 419 BL1_SOURCES += ${RSS_COMMS_SOURCES} 420 BL2_SOURCES += ${RSS_COMMS_SOURCES} 421 BL31_SOURCES += ${RSS_COMMS_SOURCES} \ 422 lib/psa/delegated_attestation.c 423 424 BL1_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 425 BL2_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 426 BL31_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 427endif 428 429endif 430 431ifeq (${DRTM_SUPPORT}, 1) 432BL31_SOURCES += plat/arm/board/fvp/fvp_drtm_addr.c \ 433 plat/arm/board/fvp/fvp_drtm_dma_prot.c \ 434 plat/arm/board/fvp/fvp_drtm_err.c \ 435 plat/arm/board/fvp/fvp_drtm_measurement.c \ 436 plat/arm/board/fvp/fvp_drtm_stub.c \ 437 plat/arm/common/arm_dyn_cfg.c \ 438 plat/arm/board/fvp/fvp_err.c 439endif 440 441ifeq (${TRUSTED_BOARD_BOOT}, 1) 442BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 443BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 444 445# FVP being a development platform, enable capability to disable Authentication 446# dynamically if TRUSTED_BOARD_BOOT is set. 447DYN_DISABLE_AUTH := 1 448endif 449 450# enable trace buffer control registers access to NS by default 451ENABLE_TRBE_FOR_NS := 2 452 453# enable branch record buffer control registers access in NS by default 454# only enable for aarch64 455# do not enable when ENABLE_RME=1 456ifeq (${ARCH}, aarch64) 457ifeq (${ENABLE_RME},0) 458 ENABLE_BRBE_FOR_NS := 2 459endif 460endif 461 462# enable trace system registers access to NS by default 463ENABLE_SYS_REG_TRACE_FOR_NS := 2 464 465# enable trace filter control registers access to NS by default 466ENABLE_TRF_FOR_NS := 2 467 468# Linux relies on EL3 enablement if those features are present 469ENABLE_FEAT_FGT := 2 470ENABLE_FEAT_HCX := 2 471ENABLE_FEAT_TCR2 := 2 472 473ENABLE_FEAT_VHE := 2 474ENABLE_MPAM_FOR_LOWER_ELS := 2 475 476ifeq (${SPMC_AT_EL3}, 1) 477PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c 478endif 479