| f8631f51 | 14-Sep-2019 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
drivers: partition: support different block size
The block size of some storage device is 4096-byte long, such as UFS. But PARTITION_BLOCK_SIZE is defined as 512-byte long. So replace it by PLAT_PAR
drivers: partition: support different block size
The block size of some storage device is 4096-byte long, such as UFS. But PARTITION_BLOCK_SIZE is defined as 512-byte long. So replace it by PLAT_PARTITION_BLOCK_SIZE. Make it configurable in platform.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Change-Id: Iada05f7c646d0a0f2c0d3b8545540b3cb7153de3
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| 990ab78e | 09-Jul-2019 |
Andre Przywara <andre.przywara@arm.com> |
rpi3: Move rng driver to drivers
To allow sharing the driver between the RPi3 and RPi4, move the random number generator driver into the generic driver directory.
Change-Id: Iae94d7cb22c6bce3af9bff
rpi3: Move rng driver to drivers
To allow sharing the driver between the RPi3 and RPi4, move the random number generator driver into the generic driver directory.
Change-Id: Iae94d7cb22c6bce3af9bff709d76d4caf87b14d1 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| c0031189 | 09-Jul-2019 |
Andre Przywara <andre.przywara@arm.com> |
rpi3: Move VC mailbox driver into generic drivers directory
To allow sharing the driver between the RPi3 and RPi4, move the mailbox driver into the generic driver directory.
Change-Id: I463e49acf82
rpi3: Move VC mailbox driver into generic drivers directory
To allow sharing the driver between the RPi3 and RPi4, move the mailbox driver into the generic driver directory.
Change-Id: I463e49acf82b02bf004f3d56482b7791f3020bc0 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| aacff749 | 29-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Support larger RSA key sizes when using MBEDTLS
Previously, TF-A could not support large RSA key sizes as the configuration options passed to MBEDTLS prevented storing and performing calculations wi
Support larger RSA key sizes when using MBEDTLS
Previously, TF-A could not support large RSA key sizes as the configuration options passed to MBEDTLS prevented storing and performing calculations with the larger, higher-precision numbers required. With these changes to the arguments passed to MBEDTLS, TF-A now supports using 3072 (3K) and 4096 (4K) keys in certificates.
Change-Id: Ib73a6773145d2faa25c28d04f9a42e86f2fd555f Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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| 9af73b36 | 12-Sep-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "amlogic-refactoring" into integration
* changes: amlogic: Fix includes order amlogic: Fix header guards amlogic: Fix prefixes in the SoC specific files amlogic: Fix
Merge changes from topic "amlogic-refactoring" into integration
* changes: amlogic: Fix includes order amlogic: Fix header guards amlogic: Fix prefixes in the SoC specific files amlogic: Fix prefixes in the PM code amlogic: Fix prefixes in the SCPI related code amlogic: Fix prefixes in the MHU code amlogic: Fix prefixes in the SIP/SVC code amlogic: Fix prefixes in the thermal driver amlogic: Fix prefixes in the private header file amlogic: Fix prefixes in the efuse driver amlogic: Fix prefixes in the platform macros file amlogic: Fix prefixes in the helpers file amlogic: Rework Makefiles amlogic: Move the SIP SVC code to common directory amlogic: Move topology file to common directory amlogic: Move thermal code to common directory amlogic: Move MHU code to common directory amlogic: Move efuse code to common directory amlogic: Move platform macros assembly file to common directory amlogic: Introduce unified private header file amlogic: Move SCPI code to common directory amlogic: Move the SHA256 DMA driver to common directory amlogic: Move assembly helpers to common directory amlogic: Introduce directory parameters in the makefiles meson: Rename platform directory to amlogic
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| 749b3346 | 11-Sep-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "mbedtls: use #include <...> instead of "..."" into integration |
| 01b2a7fc | 24-Aug-2019 |
Carlo Caione <ccaione@baylibre.com> |
amlogic: Move the SHA256 DMA driver to common directory
The SHA256 DMA driver can be used by multiple SoCs. Move it to the common directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com> Chang
amlogic: Move the SHA256 DMA driver to common directory
The SHA256 DMA driver can be used by multiple SoCs. Move it to the common directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I96319eeeeeebd503ef0dcb07c0e4ff6a67afeaa5
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| 4a079c75 | 23-Aug-2019 |
Carlo Caione <ccaione@baylibre.com> |
meson: Rename platform directory to amlogic
Meson is the internal code name for the SoC family. The correct name for the platform should be Amlogic. Change the name of the platform directory.
Signe
meson: Rename platform directory to amlogic
Meson is the internal code name for the SoC family. The correct name for the platform should be Amlogic. Change the name of the platform directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Icc140e1ea137f12117acbf64c7dcb1a8b66b345d
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| 948a0c0d | 04-Sep-2019 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mbedtls: use #include <...> instead of "..."
The #include "mbedtls/check_config.h" directive first searches for the header in the relative path to mbedtls_config.h, i.e. include/drivers/auth/mbedtls
mbedtls: use #include <...> instead of "..."
The #include "mbedtls/check_config.h" directive first searches for the header in the relative path to mbedtls_config.h, i.e. include/drivers/auth/mbedtls/mbedtls/check_config.h
Obviously, it does not exist since check_config.h is located in the mbedtls project.
It is more sensible to use #include <...> form.
Change-Id: If72a71381f84e7748a2c9f07dd1176559d9bb1d2 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 2c2c9f1e | 28-May-2019 |
Yann Gautier <yann.gautier@st.com> |
mmc: stm32_sdmmc2: manage max-frequency property from DT
If the max-frequency property is provided in the device tree mmc node, it should be managed. The max allowed frequency will be the min betwee
mmc: stm32_sdmmc2: manage max-frequency property from DT
If the max-frequency property is provided in the device tree mmc node, it should be managed. The max allowed frequency will be the min between this property value and what the card can support.
Change-Id: I885b676c3300d2670a0fe4c6ecab87758b5893ad Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 73680c23 | 04-Jun-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: add watchdog support
Introduce driver for STM32 IWDG peripheral (Independent Watchdog). It is configured according to device tree content and should be enabled from there. The watchdog is
stm32mp1: add watchdog support
Introduce driver for STM32 IWDG peripheral (Independent Watchdog). It is configured according to device tree content and should be enabled from there. The watchdog is not started by default. It can be started after an HW reset if the dedicated OTP is fused.
The watchdog also needs to be frozen if a debugger is attached. This is done by configuring the correct bits in DBGMCU. This configuration is allowed by checking BSEC properties.
An increase of BL2 size is also required when adding this new code.
Change-Id: Ide7535d717885ce2f9c387cf17afd8b5607f3e7f Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| f51df475 | 23-Jul-2019 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
console: add a flag to prepend '\r' in the multi-console framework
Currently, console drivers prepend '\r' to '\n' by themselves. This is common enough to be supported in the framework.
Add a new f
console: add a flag to prepend '\r' in the multi-console framework
Currently, console drivers prepend '\r' to '\n' by themselves. This is common enough to be supported in the framework.
Add a new flag, CONSOLE_FLAG_TRANSLATE_CRLF. A driver can set this flag to ask the framework to transform LF into CRLF instead of doing it by itself.
Change-Id: I4f5c5887591bc0a8749a105abe62b6562eaf503b Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| d5dfdeb6 | 09-Jul-2019 |
Julius Werner <jwerner@chromium.org> |
Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__.
All common C compilers predefine a macro called __ASSEMBLER__ when pre
Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__.
All common C compilers predefine a macro called __ASSEMBLER__ when preprocessing a .S file. There is no reason for TF-A to define it's own __ASSEMBLY__ macro for this purpose instead. To unify code with the export headers (which use __ASSEMBLER__ to avoid one extra dependency), let's deprecate __ASSEMBLY__ and switch the code base over to the predefined standard.
Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417 Signed-off-by: Julius Werner <jwerner@chromium.org>
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| 86126439 | 25-Jul-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "gby/cryptocell-multi-vers" into integration
* changes: cryptocell: add product version awareness support cryptocell: move Cryptocell specific API into driver |
| 76f3c7dc | 14-May-2019 |
Gilad Ben-Yossef <gilad.benyossef@arm.com> |
cryptocell: add product version awareness support
Add support for multiple Cryptocell revisions which use different APIs.
This commit only refactors the existing code in preperation to the addition
cryptocell: add product version awareness support
Add support for multiple Cryptocell revisions which use different APIs.
This commit only refactors the existing code in preperation to the addition of another Cryptocell revisions later on.
Signed-off-by: Gilad Ben-Yossef <gilad.benyossef@arm.com> Change-Id: I16d80b31afb6edd56dc645fee5ea619cc74f09b6
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| 36ec2bb0 | 14-May-2019 |
Gilad Ben-Yossef <gilad.benyossef@arm.com> |
cryptocell: move Cryptocell specific API into driver
Code using Cryptocell specific APIs was used as part of the arm common board ROT support, instead of being abstracted in Cryptocell specific driv
cryptocell: move Cryptocell specific API into driver
Code using Cryptocell specific APIs was used as part of the arm common board ROT support, instead of being abstracted in Cryptocell specific driver code, creating two problems: - Any none arm board that uses Cryptocell wuld need to copy and paste the same code. - Inability to cleanly support multiple versions of Cryptocell API and products.
Move over Cryptocell specific API calls into the Cryptocell driver, creating abstraction API where needed.
Signed-off-by: Gilad Ben-Yossef <gilad.benyossef@arm.com> Change-Id: I9e03ddce90fcc47cfdc747098bece86dbd11c58e
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| 57bf6057 | 29-May-2019 |
Julius Werner <jwerner@chromium.org> |
Factor out cross-BL API into export headers suitable for 3rd party code
This patch adds a new include/export/ directory meant for inclusion in third-party code. This is useful for cases where third-
Factor out cross-BL API into export headers suitable for 3rd party code
This patch adds a new include/export/ directory meant for inclusion in third-party code. This is useful for cases where third-party code needs to interact with TF-A interfaces and data structures (such as a custom BL2-implementation like coreboot handing off to BL31). Directly including headers from the TF-A repository avoids having to duplicate all these definitions (and risk them going stale), but with the current header structure this is not possible because handoff API definitions are too deeply intertwined with other TF code/headers and chain-include other headers that will not be available in the other environment.
The new approach aims to solve this by separating only the parts that are really needed into these special headers that are self-contained and will not chain-include other (non-export) headers. TF-A code should never include them directly but should instead always include the respective wrapper header, which will include the required prerequisites (like <stdint.h>) before including the export header. Third-party code can include the export headers via its own wrappers that make sure the necessary definitions are available in whatever way that environment can provide them.
Change-Id: Ifd769320ba51371439a8e5dd5b79c2516c3b43ab Signed-off-by: Julius Werner <jwerner@chromium.org>
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| 3e43121e | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update base code to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change-Id
Update base code to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change-Id: Iddd6f38139a4c6e500468b4fc48d04e0939f574e Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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| 5b6ebeec | 04-Apr-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.
Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.co
Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.
Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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| fc3c382f | 19-Jun-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Merge changes from topic "yg/clk_syscfg_dt" into integration
* changes: fdts: stm32mp1: realign device tree files with internal devs stm32mp1: increase device tree size to 20kB stm32mp1: make
Merge changes from topic "yg/clk_syscfg_dt" into integration
* changes: fdts: stm32mp1: realign device tree files with internal devs stm32mp1: increase device tree size to 20kB stm32mp1: make dt_get_stdout_node_offset() static stm32mp1: use unsigned values for SDMMC defines stm32mp1: remove useless LIBFDT_SRCS from PLAT_BL_COMMON_SOURCES stm32mp1: update doc for U-Boot compilation stm32mp1: add general SYSCFG management stm32mp1: move stm32_get_gpio_bank_clock() to private file clk: stm32mp1: correctly handle Clock Spreading Generator clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array clk: stm32mp1: move oscillator functions to generic file arch: add some defines for generic timer registers
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| de3ad4f0 | 17-Jun-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Merge changes If61ab215,I3e8b0251,I1757eee9,I81b48475,I46b445a7, ... into integration
* changes: rcar_gen3: drivers: qos: Move QoS drivers out of staging rcar_gen3: drivers: qos: V3M: Configure
Merge changes If61ab215,I3e8b0251,I1757eee9,I81b48475,I46b445a7, ... into integration
* changes: rcar_gen3: drivers: qos: Move QoS drivers out of staging rcar_gen3: drivers: qos: V3M: Configure DBSC QoS from a table rcar_gen3: drivers: qos: E3: Configure DBSC QoS from a table rcar_gen3: drivers: qos: D3: Configure DBSC QoS from a table rcar_gen3: drivers: qos: M3N: Configure DBSC QoS from a table rcar_gen3: drivers: qos: M3W: Configure DBSC QoS from a table rcar_gen3: drivers: qos: H3: Configure DBSC QoS from a table rcar_gen3: drivers: qos: Add function to configure DBSC QoS settings from a table rcar_gen3: drivers: qos: Fix checkpatch issues rcar_gen3: drivers: qos: V3M: Drop useless comments rcar_gen3: drivers: qos: V3M: Convert mstat table to uint64_t rcar_gen3: drivers: qos: V3M: Factor out mstat fix into separate file rcar_gen3: drivers: qos: V3M: Use common register definition rcar_gen3: drivers: qos: E3: Drop extra level of nesting rcar_gen3: drivers: qos: E3: Use common register definition rcar_gen3: drivers: qos: D3: Replace ad-hoc register addresses with macros rcar_gen3: drivers: qos: D3: Drop MD pin check rcar_gen3: drivers: qos: D3: Make DBSC settings local to dbsc_setting() rcar_gen3: drivers: qos: D3: Drop useless comments rcar_gen3: drivers: qos: D3: Convert mstat table to uint64_t rcar_gen3: drivers: qos: D3: Factor out mstat fix into separate file rcar_gen3: drivers: qos: D3: Use common register definition rcar_gen3: drivers: qos: M3N: Fix checkpatch issues rcar_gen3: drivers: qos: M3N: Drop MD pin check rcar_gen3: drivers: qos: M3N: Drop useless comments rcar_gen3: drivers: qos: M3N: Drop extra level of nesting rcar_gen3: drivers: qos: M3N: Use common register definition rcar_gen3: drivers: qos: M3W: Fix checkpatch issues rcar_gen3: drivers: qos: M3W: Drop MD pin check rcar_gen3: drivers: qos: M3W: Drop useless comments rcar_gen3: drivers: qos: M3W: Drop extra level of nesting rcar_gen3: drivers: qos: M3W: Convert mstat table to uint64_t rcar_gen3: drivers: qos: M3W: Factor out mstat fix into separate file rcar_gen3: drivers: qos: M3W: Use common register definition rcar_gen3: drivers: qos: H3: Fix checkpatch issues rcar_gen3: drivers: qos: H3: Drop MD pin check rcar_gen3: drivers: qos: H3: Drop useless comments rcar_gen3: drivers: qos: H3: Drop extra level of nesting rcar_gen3: drivers: qos: H3: Convert mstat table to uint64_t rcar_gen3: drivers: qos: H3: Factor out mstat fix into separate file rcar_gen3: drivers: qos: H3: Use common register definition rcar_gen3: console: Convert to multi-console API
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| d4151d2f | 07-May-2019 |
Yann Gautier <yann.gautier@st.com> |
clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array
Rework the macro that eases the table definition: the src and msk fields are now using MASK and SHIFT defines of each source regi
clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array
Rework the macro that eases the table definition: the src and msk fields are now using MASK and SHIFT defines of each source register. Some macros had then to be modified: _USART1_SEL, _ASS_SEL and _MSS_SEL to _UART1_SEL, _AXIS_SEL, and _MCUS_SEL to match register fields.
Note: the mask for RCC_ASSCKSELR_AXISSRC is changed from 0x3 to 0x7 to reflect the size of the register field, even if there are only 3 possible clock sources.
The mask value is also corrected for QSPI and FMC clock selection.
Change-Id: I44114e3c1dd37b9fa1be1ba519611abd9a07764c Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| f66358af | 17-May-2019 |
Yann Gautier <yann.gautier@st.com> |
clk: stm32mp1: move oscillator functions to generic file
Those functions are generic for parsing nodes from device tree hence could be located in generic source file.
The oscillators description st
clk: stm32mp1: move oscillator functions to generic file
Those functions are generic for parsing nodes from device tree hence could be located in generic source file.
The oscillators description structure is also moved to STM32MP1 clock driver, as it is no more used in stm32mp1_clkfunc and cannot be in a generic file.
Change-Id: I93ba74f4eea916440fef9b160d306af1b39f17c6 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 018358fc | 18-May-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: console: Convert to multi-console API
Convert the R-Car Gen3 platform and both SCIF and Log drivers to multi-console API.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Chang
rcar_gen3: console: Convert to multi-console API
Convert the R-Car Gen3 platform and both SCIF and Log drivers to multi-console API.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I18556973937d150b60453f9150d54ee612571e35
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| 2efb7ddc | 07-Jun-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Fix type of cot_desc_ptr
The chain of trust description and the pointer pointing to its first element were incompatible, thus requiring an explicit type cast for the assignment.
- cot_desc was an a
Fix type of cot_desc_ptr
The chain of trust description and the pointer pointing to its first element were incompatible, thus requiring an explicit type cast for the assignment.
- cot_desc was an array of const pointers to const image descriptors.
- cot_desc_ptr was a const pointer to (non-constant) pointers to const image descriptors.
Thus, trying to assign cot_desc to cot_desc_ptr (with no cast) would generate the following compiler warning:
drivers/auth/tbbr/tbbr_cot.c:826:14: warning: initialization discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] REGISTER_COT(cot_desc); ^~~~~~~~
Change-Id: Iae62dd1bdb43fe379e3843d96461d47cc2f68a06 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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