1# 2# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include lib/xlat_tables_v2/xlat_tables.mk 8 9AML_PLAT := plat/amlogic 10AML_PLAT_SOC := ${AML_PLAT}/${PLAT} 11AML_PLAT_COMMON := ${AML_PLAT}/common 12 13PLAT_INCLUDES := -I${AML_PLAT_SOC}/include 14 15GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 16 drivers/arm/gic/v2/gicv2_main.c \ 17 drivers/arm/gic/v2/gicv2_helpers.c \ 18 plat/common/plat_gicv2.c 19 20PLAT_BL_COMMON_SOURCES := drivers/amlogic/console/aarch64/meson_console.S \ 21 ${AML_PLAT_SOC}/gxbb_common.c \ 22 ${AML_PLAT_SOC}/gxbb_topology.c \ 23 ${XLAT_TABLES_LIB_SRCS} 24 25BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 26 plat/common/plat_psci_common.c \ 27 ${AML_PLAT_COMMON}/aarch64/aml_helpers.S \ 28 ${AML_PLAT_SOC}/gxbb_bl31_setup.c \ 29 ${AML_PLAT_SOC}/gxbb_efuse.c \ 30 ${AML_PLAT_SOC}/gxbb_mhu.c \ 31 ${AML_PLAT_SOC}/gxbb_pm.c \ 32 ${AML_PLAT_SOC}/gxbb_scpi.c \ 33 ${AML_PLAT_SOC}/gxbb_sip_svc.c \ 34 ${AML_PLAT_SOC}/gxbb_thermal.c \ 35 ${GIC_SOURCES} 36 37# Tune compiler for Cortex-A53 38ifeq ($(notdir $(CC)),armclang) 39 TF_CFLAGS_aarch64 += -mcpu=cortex-a53 40else ifneq ($(findstring clang,$(notdir $(CC))),) 41 TF_CFLAGS_aarch64 += -mcpu=cortex-a53 42else 43 TF_CFLAGS_aarch64 += -mtune=cortex-a53 44endif 45 46# Build config flags 47# ------------------ 48 49# Enable all errata workarounds for Cortex-A53 50ERRATA_A53_826319 := 1 51ERRATA_A53_835769 := 1 52ERRATA_A53_836870 := 1 53ERRATA_A53_843419 := 1 54ERRATA_A53_855873 := 1 55 56WORKAROUND_CVE_2017_5715 := 0 57 58# Have different sections for code and rodata 59SEPARATE_CODE_AND_RODATA := 1 60 61# Use Coherent memory 62USE_COHERENT_MEM := 1 63 64# Verify build config 65# ------------------- 66 67ifneq (${RESET_TO_BL31}, 0) 68 $(error Error: ${PLAT} needs RESET_TO_BL31=0) 69endif 70 71ifeq (${ARCH},aarch32) 72 $(error Error: AArch32 not supported on ${PLAT}) 73endif 74