fix(cpus): workaround for Cortex-A720 erratum 2844092

Cortex-A720 erratum 2844092 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2.

The workaround is to set bit[11] o

fix(cpus): workaround for Cortex-A720 erratum 2844092

Cortex-A720 erratum 2844092 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2.

The workaround is to set bit[11] of CPUACTLR4_EL1 register.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2439421/latest

Change-Id: I3d8eacb26cba42774f1f31c3aae2a0e6fecec614
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(cpus): workaround for Cortex-X4 erratum 2816013

Cortex-X4 erratum 2816013 is a Cat B erratum that applies
to all revisions <= r0p1 and is fixed in r0p2. This erratum
is only present when memory

fix(cpus): workaround for Cortex-X4 erratum 2816013

Cortex-X4 erratum 2816013 is a Cat B erratum that applies
to all revisions <= r0p1 and is fixed in r0p2. This erratum
is only present when memory tagging is enabled.

The workaround is to set CPUACTLR5_EL1[14] to 1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2432808/latest

Change-Id: I546044bde6e5eedd0abf61643d25e2dd2036df5c
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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docs(xilinx): update SMC documentation in TF-A

Updated documentation for new SMC SiP calling conventions for Platform
Management specific SiP Service calls.

Signed-off-by: Jay Buddhabhatti <jay.bud

docs(xilinx): update SMC documentation in TF-A

Updated documentation for new SMC SiP calling conventions for Platform
Management specific SiP Service calls.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Iee09d3d843c6bb3f82aad6df703542ba1eb63c6c

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feat(tlc): add host tool for static TL generation

Transfer List Compiler is a command line tool that enables the static
generation of TL's compliant with version 0.9 of the firmware handoff
specific

feat(tlc): add host tool for static TL generation

Transfer List Compiler is a command line tool that enables the static
generation of TL's compliant with version 0.9 of the firmware handoff
specification. The intent of this tool is to support information passing
via the firmware handoff framework to bootloaders that run without
preceding images (i.e. `RESET_TO_BL31`).

It currently allows for TL's to be statically generated from blobs of
data, and modified by removing/adding TE's. Future work will provide
support for TL generation from configuration file.

Change-Id: Iff670842e34c9ad18eac935248ee2aece43dc533
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Co-authored-by: Charlie Bareham <charlie.bareham@arm.com>

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Merge "build(amu): restrict counters (RAZ)" into integration

feat(versal): deprecate build time arg VERSAL_PLATFORM

Update Versal platform to enable runtime detection of variants instead
of relying on the build argument VERSAL_PLATFORM.
Integrate functionalit

feat(versal): deprecate build time arg VERSAL_PLATFORM

Update Versal platform to enable runtime detection of variants instead
of relying on the build argument VERSAL_PLATFORM.
Integrate functionality for identifying the board variant during
runtime, allowing dynamic adjustment of CPU and UART clock values
accordingly.
Print the runtime board information during boot.
This advancement streamlines the build process by eliminating
dependencies on variant-specific builds, enabling the use of a single
binary for multiple variants.
Removing all the platform related constants for versal_virt,SPP,EMU as
they are not used.

Change-Id: I8c1a1d391bd1a8971addc1f56f8309a3fb75aa6d
Signed-off-by: Amey Avinash Raghatate <AmeyAvinash.Raghatate@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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Merge "feat(fgt2): add support for FEAT_FGT2" into integration

Merge "feat(debugv8p9): add support for FEAT_Debugv8p9" into integration

feat(fgt2): add support for FEAT_FGT2

This patch disables trapping to EL3 when the FEAT_FGT2
specific trap registers are accessed by setting the
SCR_EL3.FGTEn2 bit

Signed-off-by: Arvind Ram Prakash

feat(fgt2): add support for FEAT_FGT2

This patch disables trapping to EL3 when the FEAT_FGT2
specific trap registers are accessed by setting the
SCR_EL3.FGTEn2 bit

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I6d2b614affb9067b2bc3d7bf0ae7d169d031592a

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feat(debugv8p9): add support for FEAT_Debugv8p9

This patch enables FEAT_Debugv8p9 and prevents EL1/0 from
trapping to EL3 when accessing MDSELR_EL1 register by
setting the MDCR_EL3.EBWE bit.

Signed

feat(debugv8p9): add support for FEAT_Debugv8p9

This patch enables FEAT_Debugv8p9 and prevents EL1/0 from
trapping to EL3 when accessing MDSELR_EL1 register by
setting the MDCR_EL3.EBWE bit.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I3613af1dd8cb8c0d3c33dc959f170846c0b9695a

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fix(docs): fix CPU type for mt8195

MT8195 features four Cortex-A78 cores not Cortex-A76.

Change-Id: I62c60373e7a3e570bcadaeaf065ca0f7473cb838
Signed-off-by: Yidi Lin <yidilin@chromium.org>

Merge changes from topic "stm32mp2_doc_update" into integration

* changes:
feat(docs): add STM32MP2 docs links
docs(stm32mp2): correct STM32MP2 frequencies

Merge "refactor(docs): update RSE docs to match the example CCA token" into integration

feat(docs): add STM32MP2 docs links

Add links to official STMicroelectronics documentation (STM32MP2
series presentation and wiki).

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id:

feat(docs): add STM32MP2 docs links

Add links to official STMicroelectronics documentation (STM32MP2
series presentation and wiki).

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I2fca0da56bc6064c222df34493921dff3e119a22

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docs(stm32mp2): correct STM32MP2 frequencies

STM32MP25xA & STM32MP25xC versions run at 1.2GHz.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I75aea682c8e3fa89e7ac1347bb7f9d02

docs(stm32mp2): correct STM32MP2 frequencies

STM32MP25xA & STM32MP25xC versions run at 1.2GHz.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I75aea682c8e3fa89e7ac1347bb7f9d02f2086222

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Merge changes from topic "add_s32cc_clk_skeleton" into integration

* changes:
feat(s32g274a): use s32cc clock driver
feat(nxp-drivers): add clock skeleton for s32cc

feat(nxp-drivers): add clock skeleton for s32cc

The S32CC is an umbrella for S32G2, S32G3 and S32R45 SoCs; therefore,
this clock driver will be used for all of these families.

Change-Id: Iede5371b2

feat(nxp-drivers): add clock skeleton for s32cc

The S32CC is an umbrella for S32G2, S32G3 and S32R45 SoCs; therefore,
this clock driver will be used for all of these families.

Change-Id: Iede5371b212b67cf494a033c62fbfdcbe9b1a879
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

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docs(fvp): update FVP versions used

Patch series:
https://review.trustedfirmware.org/q/hashtag:%22fvp_migration_11_26%22+(status:open%20OR%20status:merged)

Migrated FVP's to use version 11.26.11 an

docs(fvp): update FVP versions used

Patch series:
https://review.trustedfirmware.org/q/hashtag:%22fvp_migration_11_26%22+(status:open%20OR%20status:merged)

Migrated FVP's to use version 11.26.11 and 11.24.24, also removed
some model testing that are now no more available with newer model
configuration.

Change-Id: Ib93a7148270e2b6fb356a631dcc36061c7c8341c
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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Merge "feat(versal2): add support for AMD Versal Gen 2 platform" into integration

Merge changes from topic "st-nand-backup-fwu" into integration

* changes:
refactor(st): rename plat_set_image_source
feat(st): add FWU with boot from NAND
feat(st): manage backup partitions fo

Merge changes from topic "st-nand-backup-fwu" into integration

* changes:
refactor(st): rename plat_set_image_source
feat(st): add FWU with boot from NAND
feat(st): manage backup partitions for NAND devices
feat(bl): add plat handler for image loading
refactor(bl)!: remove unused plat_try_next_boot_source

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refactor(docs): update RSE docs to match the example CCA token

The RSE documentation includes binary and JSON dumps of the CCA platform
token. This change updates those to match the example CCA pla

refactor(docs): update RSE docs to match the example CCA token

The RSE documentation includes binary and JSON dumps of the CCA platform
token. This change updates those to match the example CCA platform
token from [1], which is also the one returned by the TC and QEMU
platforms.

[1] https://review.trustedfirmware.org/c/TF-M/tf-m-tools/+/28493

Change-Id: I21048e7f995eb24212cf62fb2128b576bc11ecff
Signed-off-by: Thomas Fossati <thomas.fossati@linaro.org>

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build: unify verbosity handling

This change introduces a few helper variables for dealing with verbose
and silent build modes: `silent`, `verbose`, `q` and `s`.

The `silent` and `verbose` variables

build: unify verbosity handling

This change introduces a few helper variables for dealing with verbose
and silent build modes: `silent`, `verbose`, `q` and `s`.

The `silent` and `verbose` variables are boolean values determining
whether the build system has been configured to run silently or
verbosely respectively (i.e. with `--silent` or `V=1`).

These two modes cannot be used together - if `silent` is truthy then
`verbose` is always falsy. As such:

make --silent V=1

... results in a silent build.

In addition to these boolean variables, we also introduce two new
variables - `s` and `q` - for use in rule recipes to conditionally
suppress the output of commands.

When building silently, `s` expands to a value which disables the
command that follows, and `q` expands to a value which supppresses
echoing of the command:

$(s)echo 'This command is neither echoed nor executed'
$(q)echo 'This command is executed but not echoed'

When building verbosely, `s` expands to a value which disables the
command that follows, and `q` expands to nothing:

$(s)echo 'This command is neither echoed nor executed'
$(q)echo 'This command is executed and echoed'

In all other cases, both `s` and `q` expand to a value which suppresses
echoing of the command that follows:

$(s)echo 'This command is executed but not echoed'
$(q)echo 'This command is executed but not echoed'

The `s` variable is predominantly useful for `echo` commands, where you
always want to suppress echoing of the command itself, whilst `q` is
more useful for all other commands.

Change-Id: I8d8ff6ed714d3cb401946c52955887ed7dca602b
Signed-off-by: Chris Kay <chris.kay@arm.com>

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Merge "docs: update Cortex-A32 FVP model version" into integration

docs: update Cortex-A32 FVP model version

Change [1] migrated Cortex-A32 FVP model to the default version used in
the TF-A CI.

[1] https://review.trustedfirmware.org/c/ci/tf-a-ci-scripts/+/29297

S

docs: update Cortex-A32 FVP model version

Change [1] migrated Cortex-A32 FVP model to the default version used in
the TF-A CI.

[1] https://review.trustedfirmware.org/c/ci/tf-a-ci-scripts/+/29297

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I038087af957d3ee2b289944b4af1a8cffb1ec5ff

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fix(docs): replace "ARM-TF" with "TF-A" in diagrams

Two diagrams in the documentation contained the string "ARM TF", which
is probably a remainder of the older "ARM Trusted Firmware" name.
Replace t

fix(docs): replace "ARM-TF" with "TF-A" in diagrams

Two diagrams in the documentation contained the string "ARM TF", which
is probably a remainder of the older "ARM Trusted Firmware" name.
Replace that with "TF-A", which is now the more widely known name for
Trusted Firmware.
This was done with an image editing program, by just moving the letters
around, as I didn't find any source for that image.

Change-Id: I1fa18341b3aa8fc8c4ecc8988bf4de66e473caa7
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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