| /utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/ |
| H A D | regTSP.h | 1163 #define TSP_VQ2_CLR_OVF_INT 0x8000 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/ |
| H A D | regTSP.h | 1186 #define TSP_VQ2_CLR_OVF_INT 0x80000000 macro
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| H A D | halTSP.c | 4195 u32flag = TSP_VQ2_CLR_OVF_INT; in HAL_TSP_VQueue_Clr_OverflowInt()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/ |
| H A D | regTSP.h | 1183 #define TSP_VQ2_CLR_OVF_INT 0x80000000UL macro
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| H A D | halTSP.c | 4607 u32flag = TSP_VQ2_CLR_OVF_INT; in HAL_TSP_VQueue_Clr_OverflowInt()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/ |
| H A D | regTSP.h | 1174 #define TSP_VQ2_CLR_OVF_INT 0x80000000UL macro
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| H A D | halTSP.c | 4570 u32flag = TSP_VQ2_CLR_OVF_INT; in HAL_TSP_VQueue_Clr_OverflowInt()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/ |
| H A D | regTSP.h | 1240 #define TSP_VQ2_CLR_OVF_INT 0x80000000UL macro
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| H A D | halTSP.c | 4937 u32flag = TSP_VQ2_CLR_OVF_INT; in HAL_TSP_VQueue_Clr_OverflowInt()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/ |
| H A D | regTSP.h | 1244 #define TSP_VQ2_CLR_OVF_INT 0x80000000UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/ |
| H A D | regTSP.h | 1244 #define TSP_VQ2_CLR_OVF_INT 0x80000000UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/ |
| H A D | regTSP.h | 1260 #define TSP_VQ2_CLR_OVF_INT 0x80000000UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/ |
| H A D | regTSP.h | 1260 #define TSP_VQ2_CLR_OVF_INT 0x80000000UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/ |
| H A D | regTSP.h | 1094 #define TSP_VQ2_CLR_OVF_INT 0x8000 macro
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| H A D | halTSP.c | 3564 REG16_SET(&_RegCtrl->VQ2_Config, TSP_VQ2_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
3581 REG16_CLR(&_RegCtrl->VQ2_Config, TSP_VQ2_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/ |
| H A D | regTSP.h | 1130 #define TSP_VQ2_CLR_OVF_INT 0x8000 macro
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| H A D | halTSP.c | 4598 REG16_SET(&_RegCtrl->VQ2_Config, TSP_VQ2_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
4618 REG16_CLR(&_RegCtrl->VQ2_Config, TSP_VQ2_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/ |
| H A D | regTSP.h | 1132 #define TSP_VQ2_CLR_OVF_INT 0x8000 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/ |
| H A D | regTSP.h | 1170 #define TSP_VQ2_CLR_OVF_INT 0x8000 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/ |
| H A D | regTSP.h | 1140 #define TSP_VQ2_CLR_OVF_INT 0x8000 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/ |
| H A D | regTSP.h | 1140 #define TSP_VQ2_CLR_OVF_INT 0x8000 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/ |
| H A D | regTSP.h | 1172 #define TSP_VQ2_CLR_OVF_INT 0x8000 macro
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| H A D | halTSP.c | 5109 REG16_SET(&_RegCtrl->VQ2_Config, TSP_VQ2_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
5129 REG16_CLR(&_RegCtrl->VQ2_Config, TSP_VQ2_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/ |
| H A D | regTSP.h | 1140 #define TSP_VQ2_CLR_OVF_INT 0x8000 macro
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| H A D | halTSP.c | 4784 REG16_SET(&_RegCtrl->VQ2_Config, TSP_VQ2_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
4804 REG16_CLR(&_RegCtrl->VQ2_Config, TSP_VQ2_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
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