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Searched refs:TSP_RESET_VFIFO3D (Results 1 – 25 of 35) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/
H A DregTSP.h797 #define TSP_RESET_VFIFO3D 0x20000000UL macro
H A DhalTSP.c1922 u32Flag = TSP_RESET_VFIFO3D; in HAL_TSP_Flush_AV_FIFO()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/
H A DregTSP.h797 #define TSP_RESET_VFIFO3D 0x20000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/
H A DregTSP.h794 #define TSP_RESET_VFIFO3D 0x20000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DregTSP.h930 #define TSP_RESET_VFIFO3D 0x2000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DregTSP.h916 #define TSP_RESET_VFIFO3D 0x20000000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DregTSP.h923 #define TSP_RESET_VFIFO3D 0x20000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DregTSP.h914 #define TSP_RESET_VFIFO3D 0x20000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DhalTSP.c3111 REG16_SET(&_RegCtrl->reg160E, TSP_RESET_VFIFO3D); in HAL_TSP_FIFO_Reset()
3132 REG16_CLR(&_RegCtrl->reg160E, TSP_RESET_VFIFO3D); in HAL_TSP_FIFO_Reset()
3248 u32Matched = REG16_R(&_RegCtrl->reg160E) & TSP_RESET_VFIFO3D; in HAL_TSP_FIFO_IsReset()
H A DregTSP.h844 #define TSP_RESET_VFIFO3D 0x2000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DregTSP.h945 #define TSP_RESET_VFIFO3D 0x20000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DregTSP.h949 #define TSP_RESET_VFIFO3D 0x20000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DregTSP.h949 #define TSP_RESET_VFIFO3D 0x20000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DregTSP.h956 #define TSP_RESET_VFIFO3D 0x20000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DregTSP.h956 #define TSP_RESET_VFIFO3D 0x20000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DregTSP.h880 #define TSP_RESET_VFIFO3D 0x2000 macro
H A DhalTSP.c4061 REG16_SET(&_RegCtrl->reg160E, TSP_RESET_VFIFO3D); in HAL_TSP_FIFO_Reset()
4088 REG16_CLR(&_RegCtrl->reg160E, TSP_RESET_VFIFO3D); in HAL_TSP_FIFO_Reset()
4234 u32Matched = REG16_R(&_RegCtrl->reg160E) & TSP_RESET_VFIFO3D; in HAL_TSP_FIFO_IsReset()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h882 #define TSP_RESET_VFIFO3D 0x2000 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h920 #define TSP_RESET_VFIFO3D 0x2000 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h907 #define TSP_RESET_VFIFO3D 0x2000 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h907 #define TSP_RESET_VFIFO3D 0x2000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DregTSP.h922 #define TSP_RESET_VFIFO3D 0x2000 macro
H A DhalTSP.c4520 REG16_SET(&_RegCtrl->reg160E, TSP_RESET_VFIFO3D); in HAL_TSP_FIFO_Reset()
4552 REG16_CLR(&_RegCtrl->reg160E, TSP_RESET_VFIFO3D); in HAL_TSP_FIFO_Reset()
4727 u32Matched = REG16_R(&_RegCtrl->reg160E) & TSP_RESET_VFIFO3D; in HAL_TSP_FIFO_IsReset()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DhalTSP.c4249 REG16_SET(&_RegCtrl->reg160E, TSP_RESET_VFIFO3D); in HAL_TSP_FIFO_Reset()
4275 REG16_CLR(&_RegCtrl->reg160E, TSP_RESET_VFIFO3D); in HAL_TSP_FIFO_Reset()
4420 u32Matched = REG16_R(&_RegCtrl->reg160E) & TSP_RESET_VFIFO3D; in HAL_TSP_FIFO_IsReset()
H A DregTSP.h907 #define TSP_RESET_VFIFO3D 0x2000 macro

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