| /utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/ |
| H A D | regTSP.h | 459 #define TSP_PVR2_LPCR1_RLD 0x00000002 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/ |
| H A D | regTSP.h | 460 #define TSP_PVR2_LPCR1_RLD 0x00000002 macro
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| H A D | halTSP.c | 3616 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_LPCR1_RLD)); in HAL_TSP_GetPVRTimeStamp()
3619 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_LPCR1_RLD)); in HAL_TSP_GetPVRTimeStamp()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/ |
| H A D | regTSP.h | 462 #define TSP_PVR2_LPCR1_RLD 0x00000002UL macro
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| H A D | halTSP.c | 3994 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_LPCR1_RLD)); in HAL_TSP_GetPVRTimeStamp()
3997 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_LPCR1_RLD)); in HAL_TSP_GetPVRTimeStamp()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/ |
| H A D | regTSP.h | 453 #define TSP_PVR2_LPCR1_RLD 0x00000002UL macro
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| H A D | halTSP.c | 3957 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_LPCR1_RLD)); in HAL_TSP_GetPVRTimeStamp()
3960 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_LPCR1_RLD)); in HAL_TSP_GetPVRTimeStamp()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/ |
| H A D | regTSP.h | 475 #define TSP_PVR2_LPCR1_RLD 0x00000002UL macro
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| H A D | halTSP.c | 4020 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_LPCR1_RLD)); in HAL_TSP_GetPVRTimeStamp()
4023 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_LPCR1_RLD)); in HAL_TSP_GetPVRTimeStamp()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/ |
| H A D | regTSP.h | 477 #define TSP_PVR2_LPCR1_RLD 0x00000002UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/ |
| H A D | regTSP.h | 477 #define TSP_PVR2_LPCR1_RLD 0x00000002UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/ |
| H A D | regTSP.h | 484 #define TSP_PVR2_LPCR1_RLD 0x00000002UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/ |
| H A D | regTSP.h | 484 #define TSP_PVR2_LPCR1_RLD 0x00000002UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/ |
| H A D | regTSP.h | 365 #define TSP_PVR2_LPCR1_RLD 0x00000002 macro
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| H A D | halTSP.c | 4155 REG32_CLR(&_RegCtrl->PVR2_Config, TSP_PVR2_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
4159 REG32_SET(&_RegCtrl->PVR2_Config, TSP_PVR2_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/ |
| H A D | regTSP.h | 400 #define TSP_PVR2_LPCR1_RLD 0x00000002 macro
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| H A D | halTSP.c | 357 REG32_SET(&_RegCtrl->PVR2_Config, TSP_PVR2_LPCR1_RLD); in HAL_TSP_HwPatch()
5461 REG32_CLR(&_RegCtrl->PVR2_Config, TSP_PVR2_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
5465 REG32_SET(&_RegCtrl->PVR2_Config, TSP_PVR2_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/ |
| H A D | regTSP.h | 402 #define TSP_PVR2_LPCR1_RLD 0x00000002 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/ |
| H A D | regTSP.h | 434 #define TSP_PVR2_LPCR1_RLD 0x00000002 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/ |
| H A D | regTSP.h | 432 #define TSP_PVR2_LPCR1_RLD 0x00000002 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/ |
| H A D | regTSP.h | 432 #define TSP_PVR2_LPCR1_RLD 0x00000002 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/ |
| H A D | regTSP.h | 436 #define TSP_PVR2_LPCR1_RLD 0x00000002 macro
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| H A D | halTSP.c | 355 REG32_SET(&_RegCtrl->PVR2_Config, TSP_PVR2_LPCR1_RLD); in HAL_TSP_HwPatch()
5976 REG32_CLR(&_RegCtrl->PVR2_Config, TSP_PVR2_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
5980 REG32_SET(&_RegCtrl->PVR2_Config, TSP_PVR2_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/ |
| H A D | halTSP.c | 278 REG32_SET(&_RegCtrl->PVR2_Config, TSP_PVR2_LPCR1_RLD); in HAL_TSP_HwPatch()
5605 REG32_CLR(&_RegCtrl->PVR2_Config, TSP_PVR2_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
5609 REG32_SET(&_RegCtrl->PVR2_Config, TSP_PVR2_LPCR1_RLD); in HAL_PVR_GetPVRTimeStamp()
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| H A D | regTSP.h | 432 #define TSP_PVR2_LPCR1_RLD 0x00000002 macro
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