Searched refs:TSO_CLKGEN2_REG (Results 1 – 11 of 11) sorted by relevance
156 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_u32TSORegBase + 0x1400UL + ((addr)<<2)))) macro428 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()432 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()436 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO3_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()440 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO4_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()444 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()499 u16value = TSO_CLKGEN2_REG(u16Reg) & ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_Set_InClk()524 TSO_CLKGEN2_REG(u16Reg) = u16value; in HAL_TSO_Set_InClk()2091 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()2092 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()[all …]
156 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_u32TSORegBase + 0x1400UL + ((addr)<<2)))) macro428 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()432 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()436 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO3_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()440 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO4_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()444 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()502 u16value = TSO_CLKGEN2_REG(u16Reg) & ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_Set_InClk()527 TSO_CLKGEN2_REG(u16Reg) = u16value; in HAL_TSO_Set_InClk()2156 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()2157 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()[all …]
156 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_u32TSORegBase + 0x1400UL + ((addr)<<2)))) macro426 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()430 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()434 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO3_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()438 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO4_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()442 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()500 u16value = TSO_CLKGEN2_REG(u16Reg) & ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_Set_InClk()525 TSO_CLKGEN2_REG(u16Reg) = u16value; in HAL_TSO_Set_InClk()2162 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()2163 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()[all …]
157 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_u32TSORegBase + 0x1400UL + ((addr)<<2)))) macro429 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()433 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()437 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO3_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()441 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO4_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()445 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()503 u16value = TSO_CLKGEN2_REG(u16Reg) & ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_Set_InClk()528 TSO_CLKGEN2_REG(u16Reg) = u16value; in HAL_TSO_Set_InClk()2154 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()2155 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()[all …]
214 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1400UL + ((addr)<<2UL… macro543 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO1_IN_MASK; in HAL_TSO_PowerCtrl()544 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO2_IN_MASK; in HAL_TSO_PowerCtrl()551 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO1_IN_DISABLE; in HAL_TSO_PowerCtrl()552 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO2_IN_DISABLE; in HAL_TSO_PowerCtrl()727 u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()733 u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()739 u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()774 TSO_CLKGEN2_REG(u16Reg) = u16value; in HAL_TSO_Set_InClk()825 …u16data = (TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO1_IN_MASK) >> REG_CLKGEN2_TSO1_IN… in HAL_TSO_GetInputTSIF_Status()[all …]
216 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1400UL + ((addr)<<2UL… macro552 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO1_IN_MASK; in HAL_TSO_PowerCtrl()553 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO2_IN_MASK; in HAL_TSO_PowerCtrl()560 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO1_IN_DISABLE; in HAL_TSO_PowerCtrl()561 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO2_IN_DISABLE; in HAL_TSO_PowerCtrl()748 u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()754 u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()760 u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()795 TSO_CLKGEN2_REG(u16Reg) = u16value; in HAL_TSO_Set_InClk()846 …u16data = (TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO1_IN_MASK) >> REG_CLKGEN2_TSO1_IN… in HAL_TSO_GetInputTSIF_Status()[all …]
208 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1400UL + ((addr)<<2UL… macro484 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO1_IN_MASK; in HAL_TSO_PowerCtrl()485 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO2_IN_MASK; in HAL_TSO_PowerCtrl()492 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO1_IN_DISABLE; in HAL_TSO_PowerCtrl()493 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO2_IN_DISABLE; in HAL_TSO_PowerCtrl()692 u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()698 u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()731 TSO_CLKGEN2_REG(u16Reg) = u16value; in HAL_TSO_Set_InClk()
200 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1400UL + ((addr)<<2UL… macro664 u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()670 u16value = TSO_CLKGEN2_REG(u16Reg) & ~u16RegMask; in HAL_TSO_Set_InClk()703 TSO_CLKGEN2_REG(u16Reg) = u16value; in HAL_TSO_Set_InClk()