| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/ |
| H A D | halPNL.c | 2750 W2BYTEMSK(REG_CLKGEN0_57_L, 0x000C, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
2776 W2BYTEMSK(REG_CLKGEN0_57_L, 0x0001, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
2783 W2BYTEMSK(REG_CLKGEN0_57_L, 0x000C, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
2789 W2BYTEMSK(REG_CLKGEN0_57_L, 0x0000, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
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| H A D | halPNL.h | 205 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/ |
| H A D | halPNL.c | 2747 W2BYTEMSK(REG_CLKGEN0_57_L, 0x000C, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
2774 W2BYTEMSK(REG_CLKGEN0_57_L, 0x0001, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
2781 W2BYTEMSK(REG_CLKGEN0_57_L, 0x000C, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
2786 W2BYTEMSK(REG_CLKGEN0_57_L, 0x0000, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
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| H A D | halPNL.h | 212 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/ |
| H A D | halPNL.c | 2747 W2BYTEMSK(REG_CLKGEN0_57_L, 0x000C, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
2774 W2BYTEMSK(REG_CLKGEN0_57_L, 0x0001, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
2781 W2BYTEMSK(REG_CLKGEN0_57_L, 0x000C, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
2786 W2BYTEMSK(REG_CLKGEN0_57_L, 0x0000, 0x000F); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
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| H A D | halPNL.h | 212 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/ |
| H A D | halPNL.h | 199 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/ |
| H A D | halPNL.h | 190 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/ |
| H A D | halPNL.h | 190 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/ |
| H A D | halPNL.h | 199 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/ |
| H A D | halPNL.h | 199 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/ |
| H A D | halPNL.h | 199 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/ |
| H A D | halPNL.h | 214 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/ |
| H A D | halPNL.h | 203 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/ |
| H A D | halPNL.h | 214 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/ |
| H A D | halPNL.h | 200 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/ |
| H A D | halPNL.h | 200 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/ |
| H A D | halPNL.h | 198 #define REG_CLKGEN0_57_L (REG_CHIPTOP_BASE + 0xAE) macro
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| H A D | halPNL.c | 2459 W2BYTE(REG_CLKGEN0_57_L,0x0008); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
2505 W2BYTE(REG_CLKGEN0_57_L,0x0008); in MHal_PNL_Init_XC_Clk()
2511 W2BYTE(REG_CLKGEN0_57_L,0x0000); //[3:0]ckg_fifo in MHal_PNL_Init_XC_Clk()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | mhal_xc_chip_config.h | 643 #define REG_CLKGEN0_57_L (REG_CLKGEN0_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | mhal_xc_chip_config.h | 643 #define REG_CLKGEN0_57_L (REG_CLKGEN0_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | mhal_xc_chip_config.h | 757 #define REG_CLKGEN0_57_L (REG_CLKGEN0_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | mhal_xc_chip_config.h | 755 #define REG_CLKGEN0_57_L (REG_CLKGEN0_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | mhal_xc_chip_config.h | 810 #define REG_CLKGEN0_57_L (REG_CLKGEN0_BASE + 0xAE) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | mhal_xc_chip_config.h | 917 #define REG_CLKGEN0_57_L (REG_CLKGEN0_BASE + 0xAE) macro
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