| /rk3399_ARM-atf/plat/rpi/common/ |
| H A D | rpi4_bl31_setup.c | 43 static entry_point_info_t bl33_image_ep_info; variable
58 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
135 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in bl31_early_platform_setup2()
136 bl33_image_ep_info.spsr = rpi3_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
137 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
149 bl33_image_ep_info.args.arg0 = 0U; in bl31_early_platform_setup2()
150 bl33_image_ep_info.args.arg1 = ~0U; in bl31_early_platform_setup2()
151 bl33_image_ep_info.args.arg2 = rpi4_get_dtb_address(); in bl31_early_platform_setup2()
160 bl33_image_ep_info.args.arg0 = rpi4_get_dtb_address(); in bl31_early_platform_setup2()
161 bl33_image_ep_info.args.arg1 = 0ULL; in bl31_early_platform_setup2()
[all …]
|
| /rk3399_ARM-atf/plat/brcm/common/ |
| H A D | brcm_bl31_setup.c | 30 static entry_point_info_t bl33_image_ep_info; variable
65 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
113 SET_PARAM_HEAD(&bl33_image_ep_info, in brcm_bl31_early_platform_setup()
121 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in brcm_bl31_early_platform_setup()
123 bl33_image_ep_info.spsr = brcm_get_spsr_for_bl33_entry(); in brcm_bl31_early_platform_setup()
124 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in brcm_bl31_early_platform_setup()
133 bl33_image_ep_info.args.arg0 = (u_register_t)PRELOADED_DTB_BASE; in brcm_bl31_early_platform_setup()
134 bl33_image_ep_info.args.arg1 = 0U; in brcm_bl31_early_platform_setup()
135 bl33_image_ep_info.args.arg2 = 0U; in brcm_bl31_early_platform_setup()
136 bl33_image_ep_info.args.arg3 = 0U; in brcm_bl31_early_platform_setup()
[all …]
|
| /rk3399_ARM-atf/plat/nuvoton/npcm845x/ |
| H A D | npcm845x_bl31_setup.c | 35 static entry_point_info_t bl33_image_ep_info; variable
84 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
186 SET_PARAM_HEAD(&bl33_image_ep_info, in bl31_early_platform_setup2()
195 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in bl31_early_platform_setup2()
197 bl33_image_ep_info.spsr = arm_get_spsr(BL33_IMAGE_ID); in bl31_early_platform_setup2()
198 bl33_image_ep_info.spsr &= ~0x8; in bl31_early_platform_setup2()
199 bl33_image_ep_info.spsr |= 0x4; in bl31_early_platform_setup2()
201 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, (uint32_t)NON_SECURE); in bl31_early_platform_setup2()
208 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_DRAM1_BASE; in bl31_early_platform_setup2()
218 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
[all …]
|
| /rk3399_ARM-atf/plat/rpi/rpi3/ |
| H A D | rpi3_bl31_setup.c | 25 static entry_point_info_t bl33_image_ep_info; variable
40 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
102 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
108 if (bl33_image_ep_info.pc == 0) { in bl31_early_platform_setup2()
122 bl33_image_ep_info.args.arg0 = 0U; in bl31_early_platform_setup2()
123 bl33_image_ep_info.args.arg1 = ~0U; in bl31_early_platform_setup2()
124 bl33_image_ep_info.args.arg2 = (u_register_t) RPI3_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
133 bl33_image_ep_info.args.arg0 = (u_register_t) RPI3_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
134 bl33_image_ep_info.args.arg1 = 0ULL; in bl31_early_platform_setup2()
135 bl33_image_ep_info.args.arg2 = 0ULL; in bl31_early_platform_setup2()
[all …]
|
| /rk3399_ARM-atf/plat/intel/soc/agilex/ |
| H A D | bl31_plat_setup.c | 28 static entry_point_info_t bl33_image_ep_info; variable
38 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
106 SET_PARAM_HEAD(&bl33_image_ep_info, in bl31_early_platform_setup2()
118 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
119 bl33_image_ep_info.args.arg1 = 0U; in bl31_early_platform_setup2()
120 bl33_image_ep_info.args.arg2 = 0U; in bl31_early_platform_setup2()
121 bl33_image_ep_info.args.arg3 = 0U; in bl31_early_platform_setup2()
137 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
146 bl33_image_ep_info = *arg_from_bl2->bl33_ep_info; in bl31_early_platform_setup2()
149 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
[all …]
|
| /rk3399_ARM-atf/plat/ti/common/ |
| H A D | ti_bl31_setup.c | 27 static entry_point_info_t bl33_image_ep_info; variable
68 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
69 bl33_image_ep_info.pc = PRELOADED_BL33_BASE; in bl31_early_platform_setup2()
70 bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
71 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
80 bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; in bl31_early_platform_setup2()
81 bl33_image_ep_info.args.arg1 = 0U; in bl31_early_platform_setup2()
82 bl33_image_ep_info.args.arg2 = 0U; in bl31_early_platform_setup2()
83 bl33_image_ep_info.args.arg3 = 0U; in bl31_early_platform_setup2()
166 next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info : in bl31_plat_get_next_image_ep_info()
|
| /rk3399_ARM-atf/plat/arm/common/sp_min/ |
| H A D | arm_sp_min_setup.c | 22 static entry_point_info_t bl33_image_ep_info; variable
71 next_image_info = &bl33_image_ep_info; in sp_min_plat_get_bl33_ep_info()
100 bl33_image_ep_info = in arm_sp_min_early_platform_setup()
107 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); in arm_sp_min_early_platform_setup()
112 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in arm_sp_min_early_platform_setup()
113 bl33_image_ep_info.spsr = arm_get_spsr(BL33_IMAGE_ID); in arm_sp_min_early_platform_setup()
114 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in arm_sp_min_early_platform_setup()
124 bl33_image_ep_info.args.arg0 = 0U; in arm_sp_min_early_platform_setup()
125 bl33_image_ep_info.args.arg1 = ~0U; in arm_sp_min_early_platform_setup()
126 bl33_image_ep_info.args.arg2 = (u_register_t)ARM_PRELOADED_DTB_BASE; in arm_sp_min_early_platform_setup()
[all …]
|
| /rk3399_ARM-atf/plat/arm/common/ |
| H A D | arm_bl31_setup.c | 45 static entry_point_info_t bl33_image_ep_info; variable
134 ns_tl, &bl33_image_ep_info); in bl31_plat_get_next_image_ep_info()
136 next_image_info = &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
183 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); in arm_bl31_early_platform_setup()
188 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in arm_bl31_early_platform_setup()
190 bl33_image_ep_info.spsr = arm_get_spsr(BL33_IMAGE_ID); in arm_bl31_early_platform_setup()
191 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in arm_bl31_early_platform_setup()
193 bl33_image_ep_info.args.arg0 = PLAT_ARM_TRANSFER_LIST_DTB_OFFSET; in arm_bl31_early_platform_setup()
194 bl33_image_ep_info.args.arg1 = in arm_bl31_early_platform_setup()
196 bl33_image_ep_info.args.arg3 = FW_NS_HANDOFF_BASE; in arm_bl31_early_platform_setup()
[all …]
|
| /rk3399_ARM-atf/plat/imx/imx93/ |
| H A D | imx93_bl31_setup.c | 40 static entry_point_info_t bl33_image_ep_info; variable
74 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
75 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
76 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
86 bl33_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
87 bl33_image_ep_info.args.arg2 = BL32_SIZE; in bl31_early_platform_setup2()
91 bl33_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
96 &bl32_image_ep_info, &bl33_image_ep_info); in bl31_early_platform_setup2()
146 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /rk3399_ARM-atf/plat/intel/soc/agilex5/ |
| H A D | bl31_plat_setup.c | 33 static entry_point_info_t bl33_image_ep_info; variable
45 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
83 SET_PARAM_HEAD(&bl33_image_ep_info, in bl31_early_platform_setup2()
95 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
96 bl33_image_ep_info.args.arg1 = 0U; in bl31_early_platform_setup2()
97 bl33_image_ep_info.args.arg2 = 0U; in bl31_early_platform_setup2()
98 bl33_image_ep_info.args.arg3 = 0U; in bl31_early_platform_setup2()
118 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
130 bl33_image_ep_info = *arg_from_bl2->bl33_ep_info; in bl31_early_platform_setup2()
133 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
[all …]
|
| /rk3399_ARM-atf/plat/hisilicon/poplar/ |
| H A D | bl31_plat_setup.c | 33 static entry_point_info_t bl33_image_ep_info; variable
47 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
99 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
104 if (bl33_image_ep_info.pc == 0) in bl31_early_platform_setup2()
131 bl33_image_ep_info.pc, bl33_image_ep_info.args.arg2); in bl31_plat_arch_setup()
|
| /rk3399_ARM-atf/plat/imx/imx9/common/ |
| H A D | imx9_bl31_setup.c | 35 static entry_point_info_t bl33_image_ep_info; variable
55 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
56 bl33_image_ep_info.spsr = plat_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
57 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
67 bl33_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
68 bl33_image_ep_info.args.arg2 = BL32_SIZE; in bl31_early_platform_setup2()
76 bl33_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
144 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /rk3399_ARM-atf/plat/marvell/armada/common/ |
| H A D | marvell_bl31_setup.c | 28 static entry_point_info_t bl33_image_ep_info; variable
50 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
89 SET_PARAM_HEAD(&bl33_image_ep_info, in marvell_bl31_early_platform_setup()
97 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in marvell_bl31_early_platform_setup()
98 bl33_image_ep_info.spsr = marvell_get_spsr_for_bl33_entry(); in marvell_bl31_early_platform_setup()
99 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in marvell_bl31_early_platform_setup()
129 bl33_image_ep_info = *bl_params->ep_info; in marvell_bl31_early_platform_setup()
|
| /rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/ |
| H A D | plat_bl31_setup.c | 15 static entry_point_info_t bl33_image_ep_info; variable
32 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
33 bl33_image_ep_info.pc = BL33_BASE; in bl31_early_platform_setup2()
34 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
35 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
52 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /rk3399_ARM-atf/plat/imx/imx8ulp/ |
| H A D | imx8ulp_bl31_setup.c | 51 static entry_point_info_t bl33_image_ep_info; variable
88 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
89 bl33_image_ep_info.spsr = plat_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
90 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
100 bl33_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
101 bl33_image_ep_info.args.arg2 = BL32_SIZE; in bl31_early_platform_setup2()
109 bl33_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
164 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /rk3399_ARM-atf/plat/imx/imx8m/imx8mn/ |
| H A D | imx8mn_bl31_setup.c | 87 static entry_point_info_t bl33_image_ep_info; variable
156 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
157 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
158 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
168 bl33_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
169 bl33_image_ep_info.args.arg2 = BL32_SIZE; in bl31_early_platform_setup2()
177 bl33_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
183 &bl32_image_ep_info, &bl33_image_ep_info); in bl31_early_platform_setup2()
186 &bl32_image_ep_info, &bl33_image_ep_info); in bl31_early_platform_setup2()
242 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /rk3399_ARM-atf/plat/xilinx/zynqmp/ |
| H A D | bl31_zynqmp_setup.c | 32 static entry_point_info_t bl33_image_ep_info; variable
46 next_image_info = &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
62 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in bl31_set_default_config()
63 bl33_image_ep_info.spsr = (uint32_t)SPSR_64(MODE_EL2, MODE_SP_ELX, in bl31_set_default_config()
130 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
131 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
140 &bl33_image_ep_info, in bl31_early_platform_setup2()
149 if (bl33_image_ep_info.pc != 0U) { in bl31_early_platform_setup2()
150 NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc); in bl31_early_platform_setup2()
|
| /rk3399_ARM-atf/plat/st/stm32mp1/sp_min/ |
| H A D | sp_min_setup.c | 35 static entry_point_info_t bl33_image_ep_info; variable
70 next_image_info = &bl33_image_ep_info; in sp_min_plat_get_bl33_ep_info()
140 bl33_image_ep_info = *bl_params->ep_info; in sp_min_early_platform_setup2()
146 bl33_image_ep_info.args.arg0 = 0U; in sp_min_early_platform_setup2()
147 bl33_image_ep_info.args.arg1 = 0U; in sp_min_early_platform_setup2()
148 bl33_image_ep_info.args.arg2 = arg2; in sp_min_early_platform_setup2()
|
| /rk3399_ARM-atf/plat/allwinner/common/ |
| H A D | sunxi_bl31_setup.c | 30 static entry_point_info_t bl33_image_ep_info; variable
95 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
100 bl33_image_ep_info.pc = PRELOADED_BL33_BASE; in bl31_early_platform_setup2()
101 bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, in bl31_early_platform_setup2()
103 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
195 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /rk3399_ARM-atf/plat/amlogic/gxl/ |
| H A D | gxl_bl31_setup.c | 24 static entry_point_info_t bl33_image_ep_info; variable
40 next_image_info = &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
82 bl31_params_parse_helper(arg0, &bl33_image_ep_info, in bl31_early_platform_setup2()
83 &bl33_image_ep_info); in bl31_early_platform_setup2()
97 bl33_image_ep_info = *from_bl2->bl33_ep_info; in bl31_early_platform_setup2()
100 if (bl33_image_ep_info.pc == 0U) { in bl31_early_platform_setup2()
|
| /rk3399_ARM-atf/plat/st/stm32mp2/ |
| H A D | bl31_plat_setup.c | 19 static entry_point_info_t bl33_image_ep_info; variable
94 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
100 bl33_image_ep_info.args.arg0 = 0U; in bl31_early_platform_setup2()
101 bl33_image_ep_info.args.arg1 = 0U; in bl31_early_platform_setup2()
102 bl33_image_ep_info.args.arg2 = arg2; in bl31_early_platform_setup2()
142 next_image_info = &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /rk3399_ARM-atf/plat/socionext/uniphier/ |
| H A D | uniphier_bl31_setup.c | 22 static entry_point_info_t bl33_image_ep_info; variable
28 return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
51 bl33_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
56 if (bl33_image_ep_info.pc == 0) in bl31_early_platform_setup2()
|
| /rk3399_ARM-atf/plat/xilinx/versal/ |
| H A D | bl31_versal_setup.c | 33 static entry_point_info_t bl33_image_ep_info; variable
46 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
59 bl33_image_ep_info.pc = (uintptr_t)plat_get_ns_image_entrypoint(); in bl31_set_default_config()
60 bl33_image_ep_info.spsr = (uint32_t)SPSR_64(MODE_EL2, MODE_SP_ELX, in bl31_set_default_config()
118 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
119 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
133 &bl33_image_ep_info, in bl31_early_platform_setup2()
146 NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc); in bl31_early_platform_setup2()
|
| /rk3399_ARM-atf/plat/imx/imx8m/imx8mm/ |
| H A D | imx8mm_bl31_setup.c | 116 static entry_point_info_t bl33_image_ep_info; variable
172 bl33_image_ep_info.pc = PLAT_NS_IMAGE_OFFSET; in bl31_early_platform_setup2()
173 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
174 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
184 bl33_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
185 bl33_image_ep_info.args.arg2 = BL32_SIZE; in bl31_early_platform_setup2()
193 bl33_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
198 &bl32_image_ep_info, &bl33_image_ep_info); in bl31_early_platform_setup2()
202 &bl33_image_ep_info); in bl31_early_platform_setup2()
258 return &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /rk3399_ARM-atf/plat/arm/board/arm_fpga/ |
| H A D | fpga_bl31_setup.c | 24 static entry_point_info_t bl33_image_ep_info; variable
58 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); in bl31_early_platform_setup2()
59 bl33_image_ep_info.spsr = fpga_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
60 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); in bl31_early_platform_setup2()
63 bl33_image_ep_info.args.arg0 = (u_register_t)FPGA_PRELOADED_DTB_BASE; in bl31_early_platform_setup2()
64 bl33_image_ep_info.args.arg1 = 0U; in bl31_early_platform_setup2()
65 bl33_image_ep_info.args.arg2 = 0U; in bl31_early_platform_setup2()
66 bl33_image_ep_info.args.arg3 = 0U; in bl31_early_platform_setup2()
111 next_image_info = &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
|