Searched refs:GICC_CTLR (Results 1 – 17 of 17) sorted by relevance
| /rk3399_ARM-atf/drivers/arm/gic/v2/ |
| H A D | gicv2_private.h | 62 return mmio_read_32(base + GICC_CTLR); in gicc_read_ctlr()
116 mmio_write_32(base + GICC_CTLR, val); in gicc_write_ctlr()
|
| /rk3399_ARM-atf/plat/amlogic/common/include/ |
| H A D | plat_macros.S | 41 ldr w10, [x17, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/nvidia/tegra/include/ |
| H A D | plat_macros.S | 39 ldr w10, [x16, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/renesas/common/include/ |
| H A D | plat_macros_gic.S | 39 ldr w10, [x17, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/xilinx/zynqmp/aarch64/ |
| H A D | zynqmp_helpers.S | 35 str w0, [x1, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/hisilicon/hikey960/include/ |
| H A D | plat_macros.S | 44 ldr w10, [x17, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/hisilicon/hikey/include/ |
| H A D | plat_macros.S | 44 ldr w10, [x17, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/mediatek/mt8183/include/ |
| H A D | plat_macros.S | 42 ldr w10, [x27, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/mediatek/mt8173/include/ |
| H A D | plat_macros.S | 42 ldr w10, [x17, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/xilinx/versal_net/include/ |
| H A D | plat_macros.S | 71 ldr w10, [x17, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/amd/versal2/include/ |
| H A D | plat_macros.S | 71 ldr w10, [x17, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/qti/common/inc/aarch64/ |
| H A D | plat_macros.S | 78 ldr w10, [x27, #GICC_CTLR]
|
| /rk3399_ARM-atf/include/plat/arm/common/aarch64/ |
| H A D | arm_macros.S | 75 ldr w10, [x17, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/xilinx/versal/include/ |
| H A D | plat_macros.S | 70 ldr w10, [x17, #GICC_CTLR]
|
| /rk3399_ARM-atf/include/plat/marvell/armada/common/aarch64/ |
| H A D | marvell_macros.S | 78 ldr w10, [x17, #GICC_CTLR]
|
| /rk3399_ARM-atf/plat/rockchip/common/include/ |
| H A D | plat_macros.S | 77 ldr w10, [x27, #GICC_CTLR]
|
| /rk3399_ARM-atf/include/drivers/arm/ |
| H A D | gicv2.h | 69 #define GICC_CTLR U(0x0) macro
|