| /rk3399_ARM-atf/plat/arm/board/morello/ |
| H A D | morello_bl2_setup.c | 40 zero_normalmem((void *)ARM_DRAM1_BASE, ARM_DRAM1_SIZE); in dmc_ecc_setup()
41 flush_dcache_range(ARM_DRAM1_BASE, ARM_DRAM1_SIZE); in dmc_ecc_setup()
82 if (tag_mem_base < ARM_DRAM1_BASE) { in dmc_ecc_setup()
83 tag_mem_base += ARM_DRAM1_BASE; in dmc_ecc_setup()
85 tag_mem_base = tag_mem_base - ARM_DRAM1_BASE + in dmc_ecc_setup()
|
| /rk3399_ARM-atf/plat/arm/board/corstone1000/common/include/ |
| H A D | platform_def.h | 97 #define ARM_DRAM1_BASE UL(0x80000000) macro
99 #define ARM_DRAM1_END (ARM_DRAM1_BASE + ARM_DRAM1_SIZE - 1)
102 #define ARM_DRAM2_BASE ARM_DRAM1_BASE
106 #define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE
158 #define BL33_BASE ARM_DRAM1_BASE
160 #define BL33_LIMIT (ARM_DRAM1_BASE + PLAT_ARM_MAX_BL33_SIZE)
|
| /rk3399_ARM-atf/plat/arm/board/a5ds/include/ |
| H A D | platform_def.h | 20 #define ARM_DRAM1_BASE UL(0x80000000) macro
22 #define ARM_DRAM1_END (ARM_DRAM1_BASE + \
97 #define BOOT_BASE ARM_DRAM1_BASE
100 #define ARM_NS_DRAM1_BASE (ARM_DRAM1_BASE + BOOT_SIZE)
274 #define PLAT_ARM_NS_IMAGE_BASE (ARM_DRAM1_BASE + U(0x8000000))
|
| /rk3399_ARM-atf/plat/arm/board/fvp_ve/include/ |
| H A D | platform_def.h | 24 #define ARM_DRAM1_BASE UL(0x80000000) macro
26 #define ARM_DRAM1_END (ARM_DRAM1_BASE + \
34 #define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE
261 #define PLAT_ARM_NS_IMAGE_BASE (ARM_DRAM1_BASE + U(0x8000000))
|
| /rk3399_ARM-atf/plat/arm/board/n1sdp/ |
| H A D | n1sdp_bl2_setup.c | 40 zero_normalmem((void *)ARM_DRAM1_BASE, ARM_DRAM1_SIZE); in dmc_ecc_setup()
41 flush_dcache_range(ARM_DRAM1_BASE, ARM_DRAM1_SIZE); in dmc_ecc_setup()
|
| /rk3399_ARM-atf/include/plat/arm/common/ |
| H A D | arm_def.h | 137 #define ARM_SCP_TZC_DRAM1_BASE (ARM_DRAM1_BASE + \
164 #define ARM_L1_GPT_BASE (ARM_DRAM1_BASE + \
175 #define ARM_EL3_RMM_SHARED_BASE (ARM_DRAM1_BASE + \
191 #define ARM_AP_TZC_DRAM1_BASE (ARM_DRAM1_BASE + \
237 #define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE
244 #define ARM_DRAM1_BASE PLAT_ARM_DRAM1_BASE macro
246 #define ARM_DRAM1_BASE ULL(0x80000000) macro
250 #define ARM_DRAM1_END (ARM_DRAM1_BASE + \
|
| /rk3399_ARM-atf/plat/arm/board/corstone700/common/include/ |
| H A D | platform_def.h | 51 #define ARM_DRAM1_BASE UL(0x80000000) macro
53 #define ARM_DRAM1_END (ARM_DRAM1_BASE + \
55 #define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE
|
| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd3/ |
| H A D | nrd_plat_arm_def3.h | 640 #define ARM_DRAM1_BASE UL(0x80000000) macro
642 #define ARM_DRAM1_END (ARM_DRAM1_BASE + \
664 #define ARM_L1_GPT_BASE (ARM_DRAM1_BASE + \
712 #define NRD_CSS_CARVEOUT_RESERVED_BASE (ARM_DRAM1_BASE + \
744 #define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE
|
| /rk3399_ARM-atf/plat/arm/board/juno/ |
| H A D | juno_tzmp1_def.h | 43 #define JUNO_NS_DRAM1_PT1_BASE ARM_DRAM1_BASE
|
| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd2/ |
| H A D | nrd_ros_fw_def2.h | 77 {NRD_REMOTE_CHIP_MEM_OFFSET(n) + ARM_DRAM1_BASE, \
|
| /rk3399_ARM-atf/include/plat/nuvoton/common/ |
| H A D | npcm845x_arm_def.h | 100 #define ARM_DRAM1_BASE ULL(0x00000000) macro
109 #define ARM_DRAM1_END (ARM_DRAM1_BASE + ARM_DRAM1_SIZE - 1U)
196 #define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE
|
| /rk3399_ARM-atf/plat/arm/board/n1sdp/include/ |
| H A D | platform_def.h | 52 #define N1SDP_REMOTE_DRAM1_BASE ARM_DRAM1_BASE + \
254 ARM_DRAM1_BASE, \
|
| /rk3399_ARM-atf/plat/arm/board/automotive_rd/platform/rdaspen/include/ |
| H A D | platform_def.h | 201 #define RDASPEN_MAP_NS_DRAM1 MAP_REGION_FLAT(ARM_DRAM1_BASE, \
218 #define PLAT_HW_CONFIG_DTB_BASE ARM_DRAM1_BASE
|
| /rk3399_ARM-atf/plat/arm/common/aarch32/ |
| H A D | arm_bl2_mem_params_desc.c | 83 .image_info.image_max_size = ARM_DRAM1_BASE + ARM_DRAM1_SIZE
|
| /rk3399_ARM-atf/plat/arm/board/automotive_rd/platform/rd1ae/ |
| H A D | rd1ae_bl2_mem_params_desc.c | 85 .image_info.image_max_size = ARM_DRAM1_BASE + ARM_DRAM1_SIZE
|
| /rk3399_ARM-atf/plat/arm/board/automotive_rd/platform/rdaspen/ |
| H A D | rdaspen_bl2_mem_params_desc.c | 80 .image_info.image_max_size = ARM_DRAM1_BASE + ARM_DRAM1_SIZE
|
| /rk3399_ARM-atf/plat/arm/board/automotive_rd/platform/rd1ae/include/ |
| H A D | platform_def.h | 120 #define RD1AE_MAP_NS_DRAM1 MAP_REGION_FLAT(ARM_DRAM1_BASE, \
|
| /rk3399_ARM-atf/plat/nuvoton/npcm845x/ |
| H A D | npcm845x_bl31_setup.c | 208 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_DRAM1_BASE; in bl31_early_platform_setup2()
|
| /rk3399_ARM-atf/include/plat/nuvoton/npcm845x/ |
| H A D | platform_def.h | 133 #define PLAT_ARM_NS_IMAGE_BASE (ARM_DRAM1_BASE + UL(0x6208000))
|
| /rk3399_ARM-atf/plat/arm/board/morello/include/ |
| H A D | platform_def.h | 241 ARM_DRAM1_BASE, \
|
| /rk3399_ARM-atf/plat/arm/common/aarch64/ |
| H A D | arm_bl2_mem_params_desc.c | 208 .image_info.image_max_size = ARM_DRAM1_BASE + ARM_DRAM1_SIZE
|
| /rk3399_ARM-atf/plat/arm/board/tc/include/ |
| H A D | platform_def.h | 99 #define TC_NS_DRAM1_BASE ARM_DRAM1_BASE
|
| /rk3399_ARM-atf/plat/arm/board/fvp/include/ |
| H A D | platform_def.h | 144 #define PLAT_ARM_NS_IMAGE_BASE (ARM_DRAM1_BASE + UL(0x8000000))
|