| #
14557291 |
| 16-Apr-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "hm/handoff" into integration
* changes:
refactor(fvp): reduce max size of HW_CONFIG to 16KB
refactor(arm): replace hard-coded HW_CONFIG DT size
|
| #
df960bcc |
| 11-Apr-2024 |
Harrison Mutai <harrison.mutai@arm.com> |
refactor(arm): replace hard-coded HW_CONFIG DT size
Ensure consistency across all Arm platforms, even those that may already
have an existing macro for this purpose.
Change-Id: I07cd4cfcacf2c991717
refactor(arm): replace hard-coded HW_CONFIG DT size
Ensure consistency across all Arm platforms, even those that may already
have an existing macro for this purpose.
Change-Id: I07cd4cfcacf2c991717f4c115cb0babd2c614d6f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
show more ...
|
| #
514d022f |
| 14-Feb-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "DPE" into integration
* changes:
feat(tc): add RSS SDS region right after SCMI payload
refactor(n1sdp): update SDS driver calls
refactor(morello): update SDS driver c
Merge changes from topic "DPE" into integration
* changes:
feat(tc): add RSS SDS region right after SCMI payload
refactor(n1sdp): update SDS driver calls
refactor(morello): update SDS driver calls
refactor(juno): update SDS driver calls
refactor(sgi): update SDS driver calls
refactor(css): support multiple SDS regions
show more ...
|
| #
48d42ed5 |
| 08-May-2023 |
Tamas Ban <tamas.ban@arm.com> |
refactor(morello): update SDS driver calls
Update SDS driver calls to align with recent
changes [1] of the SDS driver.
- The driver now requires us to explicitly pass
the SDS region id to act on.
refactor(morello): update SDS driver calls
Update SDS driver calls to align with recent
changes [1] of the SDS driver.
- The driver now requires us to explicitly pass
the SDS region id to act on.
- Implement plat_sds_get_regions() platform function
which is used by the driver to get SDS region
information per platform.
[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/24609/
Change-Id: I942599edb4d9734c0455f67c6b5673aace62e444
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Signed-off-by: David Vincze <david.vincze@arm.com>
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|
| #
e09b8aa5 |
| 22-Jun-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(morello): configure platform specific secure SPIs" into integration
|
| #
80f8769b |
| 25-May-2023 |
Werner Lewis <werner.lewis@arm.com> |
fix(morello): configure platform specific secure SPIs
Previous implementation used common CSS interrupts, which do not match
the Morello platform interrupt map. Updated to configure Secure
interrupt
fix(morello): configure platform specific secure SPIs
Previous implementation used common CSS interrupts, which do not match
the Morello platform interrupt map. Updated to configure Secure
interrupts according to the Morello TRM and InfraSYSDESIGN4.0
specification.
Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: I783a472d92601d86f1844f0d035dd0d036b2bfca
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|
| #
3e8b6f43 |
| 15-Mar-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(morello): implement methods to retrieve soc-id information" into integration
|
| #
cc266bcd |
| 16-Feb-2023 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
feat(morello): implement methods to retrieve soc-id information
Added silicon revision in the platform information SDS structure.
Implemented platform functions to retrieve the soc-id information
f
feat(morello): implement methods to retrieve soc-id information
Added silicon revision in the platform information SDS structure.
Implemented platform functions to retrieve the soc-id information
for the morello SoC platform. SoC revision, which is same as
silicon revision, is fetched from the morello_plat_info structure
and SoC version is populated with the part number from SSC_VERSION
register, and is reflected in bits[0:15] of soc-id.
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Change-Id: I8e0c5b2bc21e393e6d638858cc2ea9f4638f04b9
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| #
1d996e56 |
| 17-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "morello_plat_support" into integration
* changes:
feat(morello): expose scmi protocols in fdts
fix(morello): change the AP runtime UART address
feat(morello): add sup
Merge changes from topic "morello_plat_support" into integration
* changes:
feat(morello): expose scmi protocols in fdts
fix(morello): change the AP runtime UART address
feat(morello): add support for nt_fw_config
feat(morello): split platform_info sds struct
feat(morello): add changes to enable TBBR boot
feat(morello): add DTS for Morello SoC platform
feat(morello): configure DMC-Bing mode
feat(morello): zero out the DDR memory space
feat(morello): add TARGET_PLATFORM flag
fix(morello): fix SoC reference clock frequency
fix(arm): use PLAT instead of TARGET_PLATFORM
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|
| #
07302a23 |
| 02-Dec-2021 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
fix(morello): change the AP runtime UART address
SoC UART1 is internally connected to MCP UART1 so this
cannot be used as AP runtime UART instead we use the
IOFPGA UART0 as the AP runtime UART.
Sig
fix(morello): change the AP runtime UART address
SoC UART1 is internally connected to MCP UART1 so this
cannot be used as AP runtime UART instead we use the
IOFPGA UART0 as the AP runtime UART.
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Change-Id: Iecefb0d2cb875b3ecf97e0983b06f6e914835021
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|
| #
4af53977 |
| 10-Jan-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
feat(morello): add changes to enable TBBR boot
This patch adds all SOC and FVP related changes required to boot
a standard TBBR style boot on Morello.
Signed-off-by: sahil <sahil@arm.com>
Change-Id
feat(morello): add changes to enable TBBR boot
This patch adds all SOC and FVP related changes required to boot
a standard TBBR style boot on Morello.
Signed-off-by: sahil <sahil@arm.com>
Change-Id: Ib8f7f326790b13082cbe8db21a980e048e3db88c
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|
| #
14bac449 |
| 02-Oct-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "morello: Add changes to fix build of Morello Platform" into integration
|
| #
6c07a927 |
| 01-Oct-2020 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
morello: Add changes to fix build of Morello Platform
This patch makes changes required to get the morello
platform working with the tip of TF-A.
Change-Id: I095006615c9959bba49fcc75b52e1de7d748630
morello: Add changes to fix build of Morello Platform
This patch makes changes required to get the morello
platform working with the tip of TF-A.
Change-Id: I095006615c9959bba49fcc75b52e1de7d7486309
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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|
| #
609115a6 |
| 29-Sep-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I1ecbe5a1,Ib5945c37,Ic6b79648 into integration
* changes:
plat/arm: Add platform support for Morello
fdts: add device tree sources for morello platform
lib/cpus: add support for
Merge changes I1ecbe5a1,Ib5945c37,Ic6b79648 into integration
* changes:
plat/arm: Add platform support for Morello
fdts: add device tree sources for morello platform
lib/cpus: add support for Morello Rainier CPUs
show more ...
|
| #
dfd5bfb0 |
| 22-Sep-2020 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
plat/arm: Add platform support for Morello
This patch adds support for Morello platform.
It is an initial port which includes only BL31 support
as the System Control Processor (SCP) is expected to t
plat/arm: Add platform support for Morello
This patch adds support for Morello platform.
It is an initial port which includes only BL31 support
as the System Control Processor (SCP) is expected to take
the role of primary bootloader.
Change-Id: I1ecbe5a14a2d487b2ecea3c1ca227f08473ed2dd
Co-authored-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Signed-off-by: Anurag Koul <anurag.koul@arm.com>
show more ...
|