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514d022f |
| 14-Feb-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "DPE" into integration
* changes: feat(tc): add RSS SDS region right after SCMI payload refactor(n1sdp): update SDS driver calls refactor(morello): update SDS driver c
Merge changes from topic "DPE" into integration
* changes: feat(tc): add RSS SDS region right after SCMI payload refactor(n1sdp): update SDS driver calls refactor(morello): update SDS driver calls refactor(juno): update SDS driver calls refactor(sgi): update SDS driver calls refactor(css): support multiple SDS regions
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| #
48d42ed5 |
| 08-May-2023 |
Tamas Ban <tamas.ban@arm.com> |
refactor(morello): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on.
refactor(morello): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on. - Implement plat_sds_get_regions() platform function which is used by the driver to get SDS region information per platform.
[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/24609/
Change-Id: I942599edb4d9734c0455f67c6b5673aace62e444 Signed-off-by: Tamas Ban <tamas.ban@arm.com> Signed-off-by: David Vincze <david.vincze@arm.com>
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| #
33b4041d |
| 25-Apr-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "refactor(morello): remove duplication of platform information struct" into integration
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| #
468a6016 |
| 22-Mar-2023 |
Werner Lewis <werner.lewis@arm.com> |
refactor(morello): remove duplication of platform information struct
morello_plat_info is defined identically in multiple files, definition is moved to a header file to avoid duplication.
Signed-of
refactor(morello): remove duplication of platform information struct
morello_plat_info is defined identically in multiple files, definition is moved to a header file to avoid duplication.
Signed-off-by: Werner Lewis <werner.lewis@arm.com> Change-Id: I607354902c55f5c31f0732de9db60604b82aef97
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| #
3e8b6f43 |
| 15-Mar-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(morello): implement methods to retrieve soc-id information" into integration
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| #
cc266bcd |
| 16-Feb-2023 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
feat(morello): implement methods to retrieve soc-id information
Added silicon revision in the platform information SDS structure.
Implemented platform functions to retrieve the soc-id information f
feat(morello): implement methods to retrieve soc-id information
Added silicon revision in the platform information SDS structure.
Implemented platform functions to retrieve the soc-id information for the morello SoC platform. SoC revision, which is same as silicon revision, is fetched from the morello_plat_info structure and SoC version is populated with the part number from SSC_VERSION register, and is reflected in bits[0:15] of soc-id.
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com> Change-Id: I8e0c5b2bc21e393e6d638858cc2ea9f4638f04b9
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| #
92eba866 |
| 07-Jul-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(morello): move BL31 to run from DRAM space" into integration
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05330a49 |
| 23-Jun-2022 |
Manoj Kumar <manoj.kumar3@arm.com> |
fix(morello): move BL31 to run from DRAM space
The EL3 runtime firmware has been running from internal trusted SRAM space on the Morello platform. Due to unavailability of tag support for the intern
fix(morello): move BL31 to run from DRAM space
The EL3 runtime firmware has been running from internal trusted SRAM space on the Morello platform. Due to unavailability of tag support for the internal trusted SRAM this becomes a problem if we enable capability pointers in BL31.
To support capability pointers in BL31 it has to be run from the main DDR memory space. This patch updates the Morello platform configuration such that BL31 is loaded and run from DDR space.
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com> Change-Id: I16d4d757fb6f58c364f5133236d50fc06845e0b4
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| #
1d996e56 |
| 17-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "morello_plat_support" into integration
* changes: feat(morello): expose scmi protocols in fdts fix(morello): change the AP runtime UART address feat(morello): add sup
Merge changes from topic "morello_plat_support" into integration
* changes: feat(morello): expose scmi protocols in fdts fix(morello): change the AP runtime UART address feat(morello): add support for nt_fw_config feat(morello): split platform_info sds struct feat(morello): add changes to enable TBBR boot feat(morello): add DTS for Morello SoC platform feat(morello): configure DMC-Bing mode feat(morello): zero out the DDR memory space feat(morello): add TARGET_PLATFORM flag fix(morello): fix SoC reference clock frequency fix(arm): use PLAT instead of TARGET_PLATFORM
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| #
4af53977 |
| 10-Jan-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
feat(morello): add changes to enable TBBR boot
This patch adds all SOC and FVP related changes required to boot a standard TBBR style boot on Morello.
Signed-off-by: sahil <sahil@arm.com> Change-Id
feat(morello): add changes to enable TBBR boot
This patch adds all SOC and FVP related changes required to boot a standard TBBR style boot on Morello.
Signed-off-by: sahil <sahil@arm.com> Change-Id: Ib8f7f326790b13082cbe8db21a980e048e3db88c
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