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Searched refs:clk_div (Results 1 – 25 of 101) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/pwm/
H A Dpwm-crc.c44 int clk_div; in crc_pwm_calc_clk_div() local
46 clk_div = PWM_BASE_CLK_MHZ * period_ns / (256 * NSEC_PER_USEC); in crc_pwm_calc_clk_div()
48 if (clk_div > 0) in crc_pwm_calc_clk_div()
49 clk_div--; in crc_pwm_calc_clk_div()
51 return clk_div; in crc_pwm_calc_clk_div()
102 int clk_div = crc_pwm_calc_clk_div(state->period); in crc_pwm_apply() local
106 clk_div | pwm_output_enable); in crc_pwm_apply()
129 unsigned int clk_div, clk_div_reg, duty_cycle_reg; in crc_pwm_get_state() local
144 clk_div = (clk_div_reg & ~PWM_OUTPUT_ENABLE) + 1; in crc_pwm_get_state()
147 DIV_ROUND_UP(clk_div * NSEC_PER_USEC * 256, PWM_BASE_CLK_MHZ); in crc_pwm_get_state()
H A Dpwm-mtk-disp.c73 u32 clk_div, period, high_width, value; in mtk_disp_pwm_config() local
88 clk_div = div_u64(rate * period_ns, NSEC_PER_SEC) >> in mtk_disp_pwm_config()
90 if (clk_div > PWM_CLKDIV_MAX) in mtk_disp_pwm_config()
93 div = NSEC_PER_SEC * (clk_div + 1); in mtk_disp_pwm_config()
113 clk_div << PWM_CLKDIV_SHIFT); in mtk_disp_pwm_config()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/xilinx/
H A Dll_temac_mdio.c69 int clk_div; in temac_mdio_setup() local
81 clk_div = 0x3f; /* worst-case default setting */ in temac_mdio_setup()
83 clk_div = bus_hz / (2500 * 1000 * 2) - 1; in temac_mdio_setup()
84 if (clk_div < 1) in temac_mdio_setup()
85 clk_div = 1; in temac_mdio_setup()
86 if (clk_div > 0x3f) in temac_mdio_setup()
87 clk_div = 0x3f; in temac_mdio_setup()
92 temac_indirect_out32(lp, XTE_MC_OFFSET, 1 << 6 | clk_div); in temac_mdio_setup()
H A Dxilinx_axienet_mdio.c127 u32 clk_div, host_clock; in axienet_mdio_enable() local
179 clk_div = (host_clock / (MAX_MDIO_FREQ * 2)) - 1; in axienet_mdio_enable()
185 clk_div++; in axienet_mdio_enable()
189 clk_div, host_clock); in axienet_mdio_enable()
191 axienet_iow(lp, XAE_MDIO_MC_OFFSET, clk_div | XAE_MDIO_MC_MDIOEN_MASK); in axienet_mdio_enable()
/OK3568_Linux_fs/kernel/drivers/mfd/
H A Dfsl-imx25-tsadc.c103 unsigned clk_div; in mx25_tsadc_setup_clk() local
115 clk_div = DIV_ROUND_UP(clk_get_rate(tsadc->clk), 1750000); in mx25_tsadc_setup_clk()
116 dev_dbg(&pdev->dev, "Setting up ADC clock divider to %u\n", clk_div); in mx25_tsadc_setup_clk()
119 clk_div -= 2; in mx25_tsadc_setup_clk()
120 clk_div /= 2; in mx25_tsadc_setup_clk()
126 clk_div = max_t(unsigned, 4, clk_div); in mx25_tsadc_setup_clk()
129 clk_get_rate(tsadc->clk) / (2 * clk_div + 2)); in mx25_tsadc_setup_clk()
133 MX25_TGCR_ADCCLKCFG(clk_div)); in mx25_tsadc_setup_clk()
H A Diqs62x.c115 u8 clk_div = 1; in iqs62x_dev_init() local
191 clk_div = iqs62x->dev_desc->clk_div; in iqs62x_dev_init()
203 IQS62X_ATI_POLL_TIMEOUT_US * clk_div); in iqs62x_dev_init()
207 msleep(IQS62X_ATI_STABLE_DELAY_MS * clk_div); in iqs62x_dev_init()
770 .clk_div = 4,
791 .clk_div = 4,
815 .clk_div = 2,
837 .clk_div = 2,
852 .clk_div = 2,
867 .clk_div = 2,
/OK3568_Linux_fs/kernel/drivers/clk/mxs/
H A Dclk-div.c21 struct clk_div { struct
28 static inline struct clk_div *to_clk_div(struct clk_hw *hw) in to_clk_div() argument
32 return container_of(divider, struct clk_div, divider); in to_clk_div()
38 struct clk_div *div = to_clk_div(hw); in clk_div_recalc_rate()
46 struct clk_div *div = to_clk_div(hw); in clk_div_round_rate()
54 struct clk_div *div = to_clk_div(hw); in clk_div_set_rate()
73 struct clk_div *div; in mxs_clk_div()
/OK3568_Linux_fs/kernel/arch/mips/ath25/
H A Dar2315.c208 unsigned int clk_div; in ar2315_sys_clk() local
221 clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKM_DIV); in ar2315_sys_clk()
222 clk_div = pllc_divide_table[clk_div]; in ar2315_sys_clk()
225 clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKC_DIV); in ar2315_sys_clk()
226 clk_div = pllc_divide_table[clk_div]; in ar2315_sys_clk()
230 clk_div = 1; in ar2315_sys_clk()
237 return pllc_out / (clk_div * cpu_div); in ar2315_sys_clk()
/OK3568_Linux_fs/kernel/drivers/spi/
H A Dspi-axi-spi-engine.c133 unsigned int clk_div; in spi_engine_get_clk_div() local
135 clk_div = DIV_ROUND_UP(clk_get_rate(spi_engine->ref_clk), in spi_engine_get_clk_div()
137 if (clk_div > 255) in spi_engine_get_clk_div()
138 clk_div = 255; in spi_engine_get_clk_div()
139 else if (clk_div > 0) in spi_engine_get_clk_div()
140 clk_div -= 1; in spi_engine_get_clk_div()
142 return clk_div; in spi_engine_get_clk_div()
166 struct spi_engine *spi_engine, unsigned int clk_div, in spi_engine_gen_sleep() argument
185 t = DIV_ROUND_UP(delay * spi_clk, (clk_div + 1) * 2); in spi_engine_gen_sleep()
210 int clk_div, new_clk_div; in spi_engine_compile_message() local
[all …]
/OK3568_Linux_fs/kernel/sound/soc/ti/
H A Ddavinci-i2s.c161 int clk_div; member
372 dev->clk_div = div; in davinci_i2s_dai_set_clkdiv()
383 unsigned int rcr, xcr, srgr, clk_div, freq, framesize; in davinci_i2s_hw_params() local
410 clk_div = 256; in davinci_i2s_hw_params()
412 framesize = (freq / (--clk_div)) / in davinci_i2s_hw_params()
416 (clk_div)); in davinci_i2s_hw_params()
417 clk_div--; in davinci_i2s_hw_params()
421 clk_div = freq / (mcbsp_word_length * 16) / in davinci_i2s_hw_params()
426 clk_div &= 0xFF; in davinci_i2s_hw_params()
427 srgr |= clk_div; in davinci_i2s_hw_params()
[all …]
/OK3568_Linux_fs/u-boot/drivers/spi/
H A Drk_spi.c95 uint clk_div = DIV_ROUND_UP(priv->input_rate, speed); in rkspi_set_clk() local
104 if (clk_div > 0xfffe) { in rkspi_set_clk()
105 clk_div = 0xfffe; in rkspi_set_clk()
107 __func__, speed, priv->input_rate / clk_div); in rkspi_set_clk()
111 clk_div = (clk_div + 1) & 0xfffe; in rkspi_set_clk()
113 debug("spi speed %u, div %u\n", speed, clk_div); in rkspi_set_clk()
116 if (priv->max_baud_div_in_cpha && clk_div > priv->max_baud_div_in_cpha && priv->mode & SPI_CPHA) { in rkspi_set_clk()
117 clk_div = priv->max_baud_div_in_cpha; in rkspi_set_clk()
121 clrsetbits_le32(&priv->regs->baudr, 0xffff, clk_div); in rkspi_set_clk()
H A Ddesignware_spi.c444 u16 clk_div; in dw_spi_set_speed() local
453 clk_div = priv->bus_clk_rate / speed; in dw_spi_set_speed()
454 clk_div = (clk_div + 1) & 0xfffe; in dw_spi_set_speed()
455 dw_write(priv, DW_SPI_BAUDR, clk_div); in dw_spi_set_speed()
462 priv->freq, clk_div); in dw_spi_set_speed()
H A Dti_qspi.c119 uint clk_div; in ti_spi_set_speed() local
122 clk_div = 0; in ti_spi_set_speed()
124 clk_div = DIV_ROUND_UP(priv->fclk, hz) - 1; in ti_spi_set_speed()
127 if (clk_div > QSPI_CLK_DIV_MAX) in ti_spi_set_speed()
128 clk_div = QSPI_CLK_DIV_MAX; in ti_spi_set_speed()
130 debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div); in ti_spi_set_speed()
136 writel(QSPI_CLK_EN | clk_div, &priv->base->clk_ctrl); in ti_spi_set_speed()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dclock.h195 uint clk_div; in clk_get_divisor() local
197 clk_div = input_rate / output_rate; in clk_get_divisor()
198 clk_div = (clk_div + 1) & 0xfffe; in clk_get_divisor()
200 return clk_div; in clk_get_divisor()
/OK3568_Linux_fs/kernel/drivers/i2c/busses/
H A Di2c-sun6i-p2wi.c192 int clk_div; in p2wi_probe() local
287 clk_div = parent_clk_freq / clk_freq; in p2wi_probe()
288 if (!clk_div) { in p2wi_probe()
292 clk_div = 1; in p2wi_probe()
293 } else if (clk_div > P2WI_CCR_MAX_CLK_DIV) { in p2wi_probe()
297 clk_div = P2WI_CCR_MAX_CLK_DIV; in p2wi_probe()
300 writel(P2WI_CCR_SDA_OUT_DELAY(1) | P2WI_CCR_CLK_DIV(clk_div), in p2wi_probe()
H A Di2c-mt7621.c64 u32 clk_div; member
95 iowrite32(((i2c->clk_div << 16) & SM0CTL0_CLK_DIV_MASK) | SM0CTL0_EN | in mtk_i2c_reset()
262 i2c->clk_div = clk_get_rate(i2c->clk) / i2c->bus_freq - 1; in mtk_i2c_init()
263 if (i2c->clk_div < 99) in mtk_i2c_init()
264 i2c->clk_div = 99; in mtk_i2c_init()
265 if (i2c->clk_div > SM0CTL0_CLK_DIV_MAX) in mtk_i2c_init()
266 i2c->clk_div = SM0CTL0_CLK_DIV_MAX; in mtk_i2c_init()
/OK3568_Linux_fs/kernel/drivers/bus/
H A Dsunxi-rsb.c646 int clk_div, irq, ret; in sunxi_rsb_probe() local
715 clk_div = p_clk_freq / clk_freq / 2; in sunxi_rsb_probe()
716 if (!clk_div) in sunxi_rsb_probe()
717 clk_div = 1; in sunxi_rsb_probe()
718 else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1) in sunxi_rsb_probe()
719 clk_div = RSB_CCR_MAX_CLK_DIV + 1; in sunxi_rsb_probe()
721 clk_delay = clk_div >> 1; in sunxi_rsb_probe()
725 dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2); in sunxi_rsb_probe()
726 writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1), in sunxi_rsb_probe()
/OK3568_Linux_fs/kernel/sound/soc/sti/
H A Duniperif_player.c316 int clk_div; in uni_player_prepare_iec958() local
318 clk_div = player->mclk / runtime->rate; in uni_player_prepare_iec958()
321 if ((clk_div % 128) || (clk_div <= 0)) { in uni_player_prepare_iec958()
323 __func__, clk_div); in uni_player_prepare_iec958()
398 SET_UNIPERIF_CTRL_DIVIDER(player, clk_div / 128); in uni_player_prepare_iec958()
419 int output_frame_size, slot_width, clk_div; in uni_player_prepare_pcm() local
430 clk_div = player->mclk / runtime->rate; in uni_player_prepare_pcm()
435 if ((slot_width == 32) && (clk_div % 128)) { in uni_player_prepare_pcm()
440 if ((slot_width == 16) && (clk_div % 64)) { in uni_player_prepare_pcm()
487 SET_UNIPERIF_CTRL_DIVIDER(player, clk_div / (2 * output_frame_size)); in uni_player_prepare_pcm()
/OK3568_Linux_fs/u-boot/drivers/video/sunxi/
H A Dsunxi_display.c522 int *clk_div, int *clk_double) in sunxi_lcdc_pll_set() argument
627 *clk_div = best_m; in sunxi_lcdc_pll_set()
757 int clk_div, clk_double, pin; local
776 sunxi_lcdc_pll_set(0, mode->pixclock_khz, &clk_div, &clk_double);
779 lcdc_tcon0_mode_set(lcdc, &timing, clk_div, for_ext_vga_dac,
785 int *clk_div, int *clk_double, argument
801 sunxi_lcdc_pll_set(1, mode->pixclock_khz, clk_div, clk_double);
855 int clk_div, int clk_double) argument
879 SUNXI_HDMI_PLL_CTRL_DIV(clk_div));
1029 int __maybe_unused clk_div, clk_double; local
[all …]
/OK3568_Linux_fs/kernel/drivers/media/i2c/
H A Drj54n1cb0c.c157 struct rj54n1_clock_div clk_div; member
417 static const struct rj54n1_clock_div clk_div = { variable
839 rj54n1->clk_div.ratio_tg); in rj54n1_set_clock()
842 rj54n1->clk_div.ratio_t); in rj54n1_set_clock()
845 rj54n1->clk_div.ratio_r); in rj54n1_set_clock()
858 rj54n1->clk_div.ratio_op); in rj54n1_set_clock()
861 rj54n1->clk_div.ratio_o); in rj54n1_set_clock()
1339 rj54n1->clk_div = clk_div; in rj54n1_probe()
1349 (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1); in rj54n1_probe()
/OK3568_Linux_fs/kernel/sound/soc/fsl/
H A Dfsl_micfil.c154 int clk_div; in get_clk_div() local
160 clk_div = mclk_rate / (get_pdm_clk(micfil, rate) * 2); in get_clk_div()
162 return clk_div; in get_clk_div()
316 int clk_div; in fsl_set_clock_params() local
333 clk_div = get_clk_div(micfil, rate); in fsl_set_clock_params()
334 if (clk_div < 0) in fsl_set_clock_params()
338 MICFIL_CTRL2_CLKDIV_MASK, clk_div); in fsl_set_clock_params()
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/
H A Dstv6110.c29 u8 clk_div; member
214 priv->regs[RSTV6110_CTRL2] |= (priv->clk_div << 6); in stv6110_init()
398 reg0[2] |= (config->clk_div << 6); in stv6110_attach()
418 priv->clk_div = config->clk_div; in stv6110_attach()
/OK3568_Linux_fs/u-boot/drivers/led/
H A Dled_bcm6358.c124 unsigned int clk_div; in bcm6358_led_probe() local
136 clk_div = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), in bcm6358_led_probe()
138 switch (clk_div) { in bcm6358_led_probe()
/OK3568_Linux_fs/kernel/drivers/video/fbdev/omap/
H A Dsossi.c58 int clk_div; member
122 int div = t->clk_div; in calc_rd_timings()
173 int div = t->clk_div; in calc_wr_timings()
256 _set_timing(sossi.clk_div, in set_timing()
315 int div = t->clk_div; in sossi_convert_timings()
346 sossi.clk_div = t->tim[4]; in sossi_set_timings()
/OK3568_Linux_fs/kernel/drivers/leds/
H A Dleds-bcm6358.c154 u32 clk_div; in bcm6358_leds_probe() local
170 of_property_read_u32(np, "brcm,clk-div", &clk_div); in bcm6358_leds_probe()
171 switch (clk_div) { in bcm6358_leds_probe()

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