1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * stv6110.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Driver for ST STV6110 satellite tuner IC.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2009 NetUP Inc.
8*4882a593Smuzhiyun * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/dvb/frontend.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/types.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "stv6110.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* Max transfer size done by I2C transfer functions */
20*4882a593Smuzhiyun #define MAX_XFER_SIZE 64
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun static int debug;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun struct stv6110_priv {
25*4882a593Smuzhiyun int i2c_address;
26*4882a593Smuzhiyun struct i2c_adapter *i2c;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun u32 mclk;
29*4882a593Smuzhiyun u8 clk_div;
30*4882a593Smuzhiyun u8 gain;
31*4882a593Smuzhiyun u8 regs[8];
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define dprintk(args...) \
35*4882a593Smuzhiyun do { \
36*4882a593Smuzhiyun if (debug) \
37*4882a593Smuzhiyun printk(KERN_DEBUG args); \
38*4882a593Smuzhiyun } while (0)
39*4882a593Smuzhiyun
abssub(s32 a,s32 b)40*4882a593Smuzhiyun static s32 abssub(s32 a, s32 b)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun if (a > b)
43*4882a593Smuzhiyun return a - b;
44*4882a593Smuzhiyun else
45*4882a593Smuzhiyun return b - a;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
stv6110_release(struct dvb_frontend * fe)48*4882a593Smuzhiyun static void stv6110_release(struct dvb_frontend *fe)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun kfree(fe->tuner_priv);
51*4882a593Smuzhiyun fe->tuner_priv = NULL;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
stv6110_write_regs(struct dvb_frontend * fe,u8 buf[],int start,int len)54*4882a593Smuzhiyun static int stv6110_write_regs(struct dvb_frontend *fe, u8 buf[],
55*4882a593Smuzhiyun int start, int len)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun struct stv6110_priv *priv = fe->tuner_priv;
58*4882a593Smuzhiyun int rc;
59*4882a593Smuzhiyun u8 cmdbuf[MAX_XFER_SIZE];
60*4882a593Smuzhiyun struct i2c_msg msg = {
61*4882a593Smuzhiyun .addr = priv->i2c_address,
62*4882a593Smuzhiyun .flags = 0,
63*4882a593Smuzhiyun .buf = cmdbuf,
64*4882a593Smuzhiyun .len = len + 1
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun dprintk("%s\n", __func__);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun if (1 + len > sizeof(cmdbuf)) {
70*4882a593Smuzhiyun printk(KERN_WARNING
71*4882a593Smuzhiyun "%s: i2c wr: len=%d is too big!\n",
72*4882a593Smuzhiyun KBUILD_MODNAME, len);
73*4882a593Smuzhiyun return -EINVAL;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun if (start + len > 8)
77*4882a593Smuzhiyun return -EINVAL;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun memcpy(&cmdbuf[1], buf, len);
80*4882a593Smuzhiyun cmdbuf[0] = start;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
83*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 1);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun rc = i2c_transfer(priv->i2c, &msg, 1);
86*4882a593Smuzhiyun if (rc != 1)
87*4882a593Smuzhiyun dprintk("%s: i2c error\n", __func__);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
90*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 0);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
stv6110_read_regs(struct dvb_frontend * fe,u8 regs[],int start,int len)95*4882a593Smuzhiyun static int stv6110_read_regs(struct dvb_frontend *fe, u8 regs[],
96*4882a593Smuzhiyun int start, int len)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun struct stv6110_priv *priv = fe->tuner_priv;
99*4882a593Smuzhiyun int rc;
100*4882a593Smuzhiyun u8 reg[] = { start };
101*4882a593Smuzhiyun struct i2c_msg msg[] = {
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun .addr = priv->i2c_address,
104*4882a593Smuzhiyun .flags = 0,
105*4882a593Smuzhiyun .buf = reg,
106*4882a593Smuzhiyun .len = 1,
107*4882a593Smuzhiyun }, {
108*4882a593Smuzhiyun .addr = priv->i2c_address,
109*4882a593Smuzhiyun .flags = I2C_M_RD,
110*4882a593Smuzhiyun .buf = regs,
111*4882a593Smuzhiyun .len = len,
112*4882a593Smuzhiyun },
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
116*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 1);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun rc = i2c_transfer(priv->i2c, msg, 2);
119*4882a593Smuzhiyun if (rc != 2)
120*4882a593Smuzhiyun dprintk("%s: i2c error\n", __func__);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
123*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 0);
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun memcpy(&priv->regs[start], regs, len);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun return 0;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
stv6110_read_reg(struct dvb_frontend * fe,int start)130*4882a593Smuzhiyun static int stv6110_read_reg(struct dvb_frontend *fe, int start)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun u8 buf[] = { 0 };
133*4882a593Smuzhiyun stv6110_read_regs(fe, buf, start, 1);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun return buf[0];
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
stv6110_sleep(struct dvb_frontend * fe)138*4882a593Smuzhiyun static int stv6110_sleep(struct dvb_frontend *fe)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun u8 reg[] = { 0 };
141*4882a593Smuzhiyun stv6110_write_regs(fe, reg, 0, 1);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun return 0;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
carrier_width(u32 symbol_rate,enum fe_rolloff rolloff)146*4882a593Smuzhiyun static u32 carrier_width(u32 symbol_rate, enum fe_rolloff rolloff)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun u32 rlf;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun switch (rolloff) {
151*4882a593Smuzhiyun case ROLLOFF_20:
152*4882a593Smuzhiyun rlf = 20;
153*4882a593Smuzhiyun break;
154*4882a593Smuzhiyun case ROLLOFF_25:
155*4882a593Smuzhiyun rlf = 25;
156*4882a593Smuzhiyun break;
157*4882a593Smuzhiyun default:
158*4882a593Smuzhiyun rlf = 35;
159*4882a593Smuzhiyun break;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun return symbol_rate + ((symbol_rate * rlf) / 100);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
stv6110_set_bandwidth(struct dvb_frontend * fe,u32 bandwidth)165*4882a593Smuzhiyun static int stv6110_set_bandwidth(struct dvb_frontend *fe, u32 bandwidth)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun struct stv6110_priv *priv = fe->tuner_priv;
168*4882a593Smuzhiyun u8 r8, ret = 0x04;
169*4882a593Smuzhiyun int i;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun if ((bandwidth / 2) > 36000000) /*BW/2 max=31+5=36 mhz for r8=31*/
172*4882a593Smuzhiyun r8 = 31;
173*4882a593Smuzhiyun else if ((bandwidth / 2) < 5000000) /* BW/2 min=5Mhz for F=0 */
174*4882a593Smuzhiyun r8 = 0;
175*4882a593Smuzhiyun else /*if 5 < BW/2 < 36*/
176*4882a593Smuzhiyun r8 = (bandwidth / 2) / 1000000 - 5;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun /* ctrl3, RCCLKOFF = 0 Activate the calibration Clock */
179*4882a593Smuzhiyun /* ctrl3, CF = r8 Set the LPF value */
180*4882a593Smuzhiyun priv->regs[RSTV6110_CTRL3] &= ~((1 << 6) | 0x1f);
181*4882a593Smuzhiyun priv->regs[RSTV6110_CTRL3] |= (r8 & 0x1f);
182*4882a593Smuzhiyun stv6110_write_regs(fe, &priv->regs[RSTV6110_CTRL3], RSTV6110_CTRL3, 1);
183*4882a593Smuzhiyun /* stat1, CALRCSTRT = 1 Start LPF auto calibration*/
184*4882a593Smuzhiyun priv->regs[RSTV6110_STAT1] |= 0x02;
185*4882a593Smuzhiyun stv6110_write_regs(fe, &priv->regs[RSTV6110_STAT1], RSTV6110_STAT1, 1);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun i = 0;
188*4882a593Smuzhiyun /* Wait for CALRCSTRT == 0 */
189*4882a593Smuzhiyun while ((i < 10) && (ret != 0)) {
190*4882a593Smuzhiyun ret = ((stv6110_read_reg(fe, RSTV6110_STAT1)) & 0x02);
191*4882a593Smuzhiyun mdelay(1); /* wait for LPF auto calibration */
192*4882a593Smuzhiyun i++;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun /* RCCLKOFF = 1 calibration done, deactivate the calibration Clock */
196*4882a593Smuzhiyun priv->regs[RSTV6110_CTRL3] |= (1 << 6);
197*4882a593Smuzhiyun stv6110_write_regs(fe, &priv->regs[RSTV6110_CTRL3], RSTV6110_CTRL3, 1);
198*4882a593Smuzhiyun return 0;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun
stv6110_init(struct dvb_frontend * fe)201*4882a593Smuzhiyun static int stv6110_init(struct dvb_frontend *fe)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun struct stv6110_priv *priv = fe->tuner_priv;
204*4882a593Smuzhiyun u8 buf0[] = { 0x07, 0x11, 0xdc, 0x85, 0x17, 0x01, 0xe6, 0x1e };
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun memcpy(priv->regs, buf0, 8);
207*4882a593Smuzhiyun /* K = (Reference / 1000000) - 16 */
208*4882a593Smuzhiyun priv->regs[RSTV6110_CTRL1] &= ~(0x1f << 3);
209*4882a593Smuzhiyun priv->regs[RSTV6110_CTRL1] |=
210*4882a593Smuzhiyun ((((priv->mclk / 1000000) - 16) & 0x1f) << 3);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun /* divisor value for the output clock */
213*4882a593Smuzhiyun priv->regs[RSTV6110_CTRL2] &= ~0xc0;
214*4882a593Smuzhiyun priv->regs[RSTV6110_CTRL2] |= (priv->clk_div << 6);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun stv6110_write_regs(fe, &priv->regs[RSTV6110_CTRL1], RSTV6110_CTRL1, 8);
217*4882a593Smuzhiyun msleep(1);
218*4882a593Smuzhiyun stv6110_set_bandwidth(fe, 72000000);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun return 0;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
stv6110_get_frequency(struct dvb_frontend * fe,u32 * frequency)223*4882a593Smuzhiyun static int stv6110_get_frequency(struct dvb_frontend *fe, u32 *frequency)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun struct stv6110_priv *priv = fe->tuner_priv;
226*4882a593Smuzhiyun u32 nbsteps, divider, psd2, freq;
227*4882a593Smuzhiyun u8 regs[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun stv6110_read_regs(fe, regs, 0, 8);
230*4882a593Smuzhiyun /*N*/
231*4882a593Smuzhiyun divider = (priv->regs[RSTV6110_TUNING2] & 0x0f) << 8;
232*4882a593Smuzhiyun divider += priv->regs[RSTV6110_TUNING1];
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun /*R*/
235*4882a593Smuzhiyun nbsteps = (priv->regs[RSTV6110_TUNING2] >> 6) & 3;
236*4882a593Smuzhiyun /*p*/
237*4882a593Smuzhiyun psd2 = (priv->regs[RSTV6110_TUNING2] >> 4) & 1;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun freq = divider * (priv->mclk / 1000);
240*4882a593Smuzhiyun freq /= (1 << (nbsteps + psd2));
241*4882a593Smuzhiyun freq /= 4;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun *frequency = freq;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun return 0;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
stv6110_set_frequency(struct dvb_frontend * fe,u32 frequency)248*4882a593Smuzhiyun static int stv6110_set_frequency(struct dvb_frontend *fe, u32 frequency)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun struct stv6110_priv *priv = fe->tuner_priv;
251*4882a593Smuzhiyun u8 ret = 0x04;
252*4882a593Smuzhiyun u32 divider, ref, p, presc, i, result_freq, vco_freq;
253*4882a593Smuzhiyun s32 p_calc, p_calc_opt = 1000, r_div, r_div_opt = 0, p_val;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun dprintk("%s, freq=%d kHz, mclk=%d Hz\n", __func__,
256*4882a593Smuzhiyun frequency, priv->mclk);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun /* K = (Reference / 1000000) - 16 */
259*4882a593Smuzhiyun priv->regs[RSTV6110_CTRL1] &= ~(0x1f << 3);
260*4882a593Smuzhiyun priv->regs[RSTV6110_CTRL1] |=
261*4882a593Smuzhiyun ((((priv->mclk / 1000000) - 16) & 0x1f) << 3);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun /* BB_GAIN = db/2 */
264*4882a593Smuzhiyun priv->regs[RSTV6110_CTRL2] &= ~0x0f;
265*4882a593Smuzhiyun priv->regs[RSTV6110_CTRL2] |= (priv->gain & 0x0f);
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun if (frequency <= 1023000) {
268*4882a593Smuzhiyun p = 1;
269*4882a593Smuzhiyun presc = 0;
270*4882a593Smuzhiyun } else if (frequency <= 1300000) {
271*4882a593Smuzhiyun p = 1;
272*4882a593Smuzhiyun presc = 1;
273*4882a593Smuzhiyun } else if (frequency <= 2046000) {
274*4882a593Smuzhiyun p = 0;
275*4882a593Smuzhiyun presc = 0;
276*4882a593Smuzhiyun } else {
277*4882a593Smuzhiyun p = 0;
278*4882a593Smuzhiyun presc = 1;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun /* DIV4SEL = p*/
281*4882a593Smuzhiyun priv->regs[RSTV6110_TUNING2] &= ~(1 << 4);
282*4882a593Smuzhiyun priv->regs[RSTV6110_TUNING2] |= (p << 4);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun /* PRESC32ON = presc */
285*4882a593Smuzhiyun priv->regs[RSTV6110_TUNING2] &= ~(1 << 5);
286*4882a593Smuzhiyun priv->regs[RSTV6110_TUNING2] |= (presc << 5);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun p_val = (int)(1 << (p + 1)) * 10;/* P = 2 or P = 4 */
289*4882a593Smuzhiyun for (r_div = 0; r_div <= 3; r_div++) {
290*4882a593Smuzhiyun p_calc = (priv->mclk / 100000);
291*4882a593Smuzhiyun p_calc /= (1 << (r_div + 1));
292*4882a593Smuzhiyun if ((abssub(p_calc, p_val)) < (abssub(p_calc_opt, p_val)))
293*4882a593Smuzhiyun r_div_opt = r_div;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun p_calc_opt = (priv->mclk / 100000);
296*4882a593Smuzhiyun p_calc_opt /= (1 << (r_div_opt + 1));
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun ref = priv->mclk / ((1 << (r_div_opt + 1)) * (1 << (p + 1)));
300*4882a593Smuzhiyun divider = (((frequency * 1000) + (ref >> 1)) / ref);
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /* RDIV = r_div_opt */
303*4882a593Smuzhiyun priv->regs[RSTV6110_TUNING2] &= ~(3 << 6);
304*4882a593Smuzhiyun priv->regs[RSTV6110_TUNING2] |= (((r_div_opt) & 3) << 6);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun /* NDIV_MSB = MSB(divider) */
307*4882a593Smuzhiyun priv->regs[RSTV6110_TUNING2] &= ~0x0f;
308*4882a593Smuzhiyun priv->regs[RSTV6110_TUNING2] |= (((divider) >> 8) & 0x0f);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun /* NDIV_LSB, LSB(divider) */
311*4882a593Smuzhiyun priv->regs[RSTV6110_TUNING1] = (divider & 0xff);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun /* CALVCOSTRT = 1 VCO Auto Calibration */
314*4882a593Smuzhiyun priv->regs[RSTV6110_STAT1] |= 0x04;
315*4882a593Smuzhiyun stv6110_write_regs(fe, &priv->regs[RSTV6110_CTRL1],
316*4882a593Smuzhiyun RSTV6110_CTRL1, 8);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun i = 0;
319*4882a593Smuzhiyun /* Wait for CALVCOSTRT == 0 */
320*4882a593Smuzhiyun while ((i < 10) && (ret != 0)) {
321*4882a593Smuzhiyun ret = ((stv6110_read_reg(fe, RSTV6110_STAT1)) & 0x04);
322*4882a593Smuzhiyun msleep(1); /* wait for VCO auto calibration */
323*4882a593Smuzhiyun i++;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun ret = stv6110_read_reg(fe, RSTV6110_STAT1);
327*4882a593Smuzhiyun stv6110_get_frequency(fe, &result_freq);
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun vco_freq = divider * ((priv->mclk / 1000) / ((1 << (r_div_opt + 1))));
330*4882a593Smuzhiyun dprintk("%s, stat1=%x, lo_freq=%d kHz, vco_frec=%d kHz\n", __func__,
331*4882a593Smuzhiyun ret, result_freq, vco_freq);
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun return 0;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
stv6110_set_params(struct dvb_frontend * fe)336*4882a593Smuzhiyun static int stv6110_set_params(struct dvb_frontend *fe)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun struct dtv_frontend_properties *c = &fe->dtv_property_cache;
339*4882a593Smuzhiyun u32 bandwidth = carrier_width(c->symbol_rate, c->rolloff);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun stv6110_set_frequency(fe, c->frequency);
342*4882a593Smuzhiyun stv6110_set_bandwidth(fe, bandwidth);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun return 0;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
stv6110_get_bandwidth(struct dvb_frontend * fe,u32 * bandwidth)347*4882a593Smuzhiyun static int stv6110_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun struct stv6110_priv *priv = fe->tuner_priv;
350*4882a593Smuzhiyun u8 r8 = 0;
351*4882a593Smuzhiyun u8 regs[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
352*4882a593Smuzhiyun stv6110_read_regs(fe, regs, 0, 8);
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun /* CF */
355*4882a593Smuzhiyun r8 = priv->regs[RSTV6110_CTRL3] & 0x1f;
356*4882a593Smuzhiyun *bandwidth = (r8 + 5) * 2000000;/* x2 for ZIF tuner BW/2 = F+5 Mhz */
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun return 0;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun static const struct dvb_tuner_ops stv6110_tuner_ops = {
362*4882a593Smuzhiyun .info = {
363*4882a593Smuzhiyun .name = "ST STV6110",
364*4882a593Smuzhiyun .frequency_min_hz = 950 * MHz,
365*4882a593Smuzhiyun .frequency_max_hz = 2150 * MHz,
366*4882a593Smuzhiyun .frequency_step_hz = 1 * MHz,
367*4882a593Smuzhiyun },
368*4882a593Smuzhiyun .init = stv6110_init,
369*4882a593Smuzhiyun .release = stv6110_release,
370*4882a593Smuzhiyun .sleep = stv6110_sleep,
371*4882a593Smuzhiyun .set_params = stv6110_set_params,
372*4882a593Smuzhiyun .get_frequency = stv6110_get_frequency,
373*4882a593Smuzhiyun .set_frequency = stv6110_set_frequency,
374*4882a593Smuzhiyun .get_bandwidth = stv6110_get_bandwidth,
375*4882a593Smuzhiyun .set_bandwidth = stv6110_set_bandwidth,
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun };
378*4882a593Smuzhiyun
stv6110_attach(struct dvb_frontend * fe,const struct stv6110_config * config,struct i2c_adapter * i2c)379*4882a593Smuzhiyun struct dvb_frontend *stv6110_attach(struct dvb_frontend *fe,
380*4882a593Smuzhiyun const struct stv6110_config *config,
381*4882a593Smuzhiyun struct i2c_adapter *i2c)
382*4882a593Smuzhiyun {
383*4882a593Smuzhiyun struct stv6110_priv *priv = NULL;
384*4882a593Smuzhiyun u8 reg0[] = { 0x00, 0x07, 0x11, 0xdc, 0x85, 0x17, 0x01, 0xe6, 0x1e };
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun struct i2c_msg msg[] = {
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun .addr = config->i2c_address,
389*4882a593Smuzhiyun .flags = 0,
390*4882a593Smuzhiyun .buf = reg0,
391*4882a593Smuzhiyun .len = 9
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun };
394*4882a593Smuzhiyun int ret;
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun /* divisor value for the output clock */
397*4882a593Smuzhiyun reg0[2] &= ~0xc0;
398*4882a593Smuzhiyun reg0[2] |= (config->clk_div << 6);
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
401*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 1);
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun ret = i2c_transfer(i2c, msg, 1);
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
406*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 0);
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun if (ret != 1)
409*4882a593Smuzhiyun return NULL;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun priv = kzalloc(sizeof(struct stv6110_priv), GFP_KERNEL);
412*4882a593Smuzhiyun if (priv == NULL)
413*4882a593Smuzhiyun return NULL;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun priv->i2c_address = config->i2c_address;
416*4882a593Smuzhiyun priv->i2c = i2c;
417*4882a593Smuzhiyun priv->mclk = config->mclk;
418*4882a593Smuzhiyun priv->clk_div = config->clk_div;
419*4882a593Smuzhiyun priv->gain = config->gain;
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun memcpy(&priv->regs, ®0[1], 8);
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun memcpy(&fe->ops.tuner_ops, &stv6110_tuner_ops,
424*4882a593Smuzhiyun sizeof(struct dvb_tuner_ops));
425*4882a593Smuzhiyun fe->tuner_priv = priv;
426*4882a593Smuzhiyun printk(KERN_INFO "STV6110 attached on addr=%x!\n", priv->i2c_address);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun return fe;
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun EXPORT_SYMBOL(stv6110_attach);
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun module_param(debug, int, 0644);
433*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun MODULE_DESCRIPTION("ST STV6110 driver");
436*4882a593Smuzhiyun MODULE_AUTHOR("Igor M. Liplianin");
437*4882a593Smuzhiyun MODULE_LICENSE("GPL");
438