| /OK3568_Linux_fs/kernel/include/linux/pinctrl/ |
| H A D | machine.h | 108 #define PIN_MAP_CONFIGS_PIN(dev, state, pinctrl, pin, cfgs) \ argument
116 .configs = cfgs, \
117 .num_configs = ARRAY_SIZE(cfgs), \
121 #define PIN_MAP_CONFIGS_PIN_DEFAULT(dev, pinctrl, pin, cfgs) \ argument
122 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_DEFAULT, pinctrl, pin, cfgs)
124 #define PIN_MAP_CONFIGS_PIN_HOG(dev, state, pin, cfgs) \ argument
125 PIN_MAP_CONFIGS_PIN(dev, state, dev, pin, cfgs)
127 #define PIN_MAP_CONFIGS_PIN_HOG_DEFAULT(dev, pin, cfgs) \ argument
128 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_DEFAULT, dev, pin, cfgs)
130 #define PIN_MAP_CONFIGS_GROUP(dev, state, pinctrl, grp, cfgs) \ argument
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| /OK3568_Linux_fs/external/mpp/osal/driver/ |
| H A D | mpp_device.c | 196 MPP_RET mpp_dev_multi_offset_init(MppDevRegOffCfgs **cfgs, RK_S32 size) in mpp_dev_multi_offset_init() argument
201 if (NULL == cfgs || size <= 0) { in mpp_dev_multi_offset_init()
202 mpp_err_f("invalid pointer %p size %d\n", cfgs, size); in mpp_dev_multi_offset_init()
210 *cfgs = p; in mpp_dev_multi_offset_init()
215 MPP_RET mpp_dev_multi_offset_deinit(MppDevRegOffCfgs *cfgs) in mpp_dev_multi_offset_deinit() argument
217 MPP_FREE(cfgs); in mpp_dev_multi_offset_deinit()
222 MPP_RET mpp_dev_multi_offset_reset(MppDevRegOffCfgs *cfgs) in mpp_dev_multi_offset_reset() argument
224 if (cfgs) { in mpp_dev_multi_offset_reset()
225 memset(cfgs->cfgs, 0, cfgs->count * sizeof(cfgs->cfgs[0])); in mpp_dev_multi_offset_reset()
226 cfgs->count = 0; in mpp_dev_multi_offset_reset()
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| H A D | mpp_service.c | 487 MPP_RET mpp_service_reg_offsets(void *ctx, MppDevRegOffCfgs *cfgs) in mpp_service_reg_offsets() argument
493 if (cfgs->count <= 0) in mpp_service_reg_offsets()
497 p->reg_offset_count + cfgs->count >= MAX_REG_OFFSET) { in mpp_service_reg_offsets()
502 for (i = 0; i < cfgs->count; i++) { in mpp_service_reg_offsets()
503 MppDevRegOffsetCfg *cfg = &cfgs->cfgs[i]; in mpp_service_reg_offsets()
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| /OK3568_Linux_fs/kernel/drivers/phy/rockchip/ |
| H A D | phy-rockchip-inno-usb3.c | 147 const struct rockchip_u3phy_cfg *cfgs; member
209 if (param_exped(u3phy->u3phy_grf, &u3phy->cfgs->grfcfg.u2_only_ctrl, 1)) in rockchip_u3phy_usb2_only_show()
239 &u3phy->cfgs->grfcfg.u2_only_ctrl, 1)) { in rockchip_u3phy_usb2_only_write()
245 &u3phy->cfgs->grfcfg.u3_disable, false); in rockchip_u3phy_usb2_only_write()
247 &u3phy->cfgs->grfcfg.u2_only_ctrl, false); in rockchip_u3phy_usb2_only_write()
261 &u3phy->cfgs->grfcfg.u2_only_ctrl, 0)) { in rockchip_u3phy_usb2_only_write()
267 &u3phy->cfgs->grfcfg.u3_disable, true); in rockchip_u3phy_usb2_only_write()
269 &u3phy->cfgs->grfcfg.u2_only_ctrl, true); in rockchip_u3phy_usb2_only_write()
420 &u3phy->cfgs->grfcfg.um_suspend, false); in rockchip_u3phy_power_on()
424 &u3phy->cfgs->grfcfg.pp_pwr_st, PIPE_PWR_P2)) in rockchip_u3phy_power_on()
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| H A D | phy-rockchip-usbdp.c | 142 const struct rockchip_udphy_cfg *cfgs; member
395 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_reset_init()
434 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_reset_assert()
446 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_reset_deassert()
458 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_u3_port_disable()
467 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_usb_bvalid_enable()
511 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_dplane_select()
542 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_dplane_enable()
637 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_setup()
660 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_disable()
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| /OK3568_Linux_fs/u-boot/drivers/soc/keystone/ |
| H A D | keystone_serdes.c | 66 static struct cfg_entry cfgs[] = { variable
192 for (i = 0; i < ARRAY_SIZE(cfgs); i++) in ks2_serdes_init()
193 if (serdes->clk == cfgs[i].clk && serdes->rate == cfgs[i].rate) in ks2_serdes_init()
196 if (i >= ARRAY_SIZE(cfgs)) { in ks2_serdes_init()
201 ks2_serdes_init_cfg(base, &cfgs[i], num_lanes); in ks2_serdes_init()
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| /OK3568_Linux_fs/external/mpp/osal/inc/ |
| H A D | mpp_device.h | 70 MppDevRegOffsetCfg cfgs[]; member
146 MPP_RET mpp_dev_multi_offset_init(MppDevRegOffCfgs **cfgs, RK_S32 size);
147 MPP_RET mpp_dev_multi_offset_deinit(MppDevRegOffCfgs *cfgs);
149 MPP_RET mpp_dev_multi_offset_reset(MppDevRegOffCfgs *cfgs);
150 MPP_RET mpp_dev_multi_offset_update(MppDevRegOffCfgs *cfgs, RK_S32 index, RK_U32 offset);
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| /OK3568_Linux_fs/u-boot/drivers/phy/ |
| H A D | phy-rockchip-usbdp.c | 139 const struct rockchip_udphy_cfg *cfgs; member
335 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_reset_init()
377 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_reset_assert()
389 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_reset_deassert()
401 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_u3_port_disable()
411 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_usb_bvalid_enable()
454 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_dplane_select()
485 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_dplane_enable()
529 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_setup()
543 const struct rockchip_udphy_cfg *cfg = udphy->cfgs; in udphy_disable()
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| H A D | phy-rockchip-inno-usb3.c | 124 const struct rockchip_u3phy_cfg *cfgs; member
359 if (u3phy->cfgs->phy_tuning) { in rockchip_u3phy_port_init()
361 ret = u3phy->cfgs->phy_tuning(u3phy, u3phy_port, child_np); in rockchip_u3phy_port_init()
401 u3phy->cfgs = &phy_cfgs[index]; in rockchip_u3phy_probe()
407 if (!u3phy->cfgs) { in rockchip_u3phy_probe()
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| /OK3568_Linux_fs/external/mpp/mpp/base/ |
| H A D | mpp_dec_cfg.cpp | 135 static MppDecCfgInfo *mpp_dec_cfg_flaten(MppTrie trie, MppCfgApi **cfgs) in mpp_dec_cfg_flaten() argument
153 const char *name = cfgs[i]->name; in mpp_dec_cfg_flaten()
176 MppCfgApi *api = cfgs[i]; in mpp_dec_cfg_flaten()
223 MppCfgApi *cfgs[] = { in MppDecCfgService() local
227 RK_S32 cfg_cnt = MPP_ARRAY_ELEMS(cfgs); in MppDecCfgService()
241 mpp_trie_add_info(trie, &cfgs[i]->name); in MppDecCfgService()
243 mInfo = mpp_dec_cfg_flaten(trie, cfgs); in MppDecCfgService()
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| H A D | mpp_enc_cfg.cpp | 272 static MppEncCfgInfo *mpp_enc_cfg_flaten(MppTrie trie, MppCfgApi **cfgs) in mpp_enc_cfg_flaten() argument
290 const char *name = cfgs[i]->name; in mpp_enc_cfg_flaten()
313 MppCfgApi *api = cfgs[i]; in mpp_enc_cfg_flaten()
360 MppCfgApi *cfgs[] = { in MppEncCfgService() local
364 RK_S32 cfg_cnt = MPP_ARRAY_ELEMS(cfgs); in MppEncCfgService()
376 mpp_trie_add_info(trie, &cfgs[i]->name); in MppEncCfgService()
378 mInfo = mpp_enc_cfg_flaten(trie, cfgs); in MppEncCfgService()
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| /OK3568_Linux_fs/kernel/arch/mips/mm/ |
| H A D | init.c | 320 struct maar_config cfgs[3]; in maar_init() member
337 used = maar_config(recorded.cfgs, recorded.used, num_maars / 2); in maar_init()
389 if (used <= ARRAY_SIZE(recorded.cfgs)) { in maar_init()
390 recorded.cfgs[recorded.used].lower = lower; in maar_init()
391 recorded.cfgs[recorded.used].upper = upper; in maar_init()
392 recorded.cfgs[recorded.used].attrs = attr; in maar_init()
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| /OK3568_Linux_fs/u-boot/drivers/gpio/ |
| H A D | db8500_gpio.c | 215 void db8500_gpio_config_pins(unsigned long *cfgs, size_t num) in db8500_gpio_config_pins() argument
220 config_pin(cfgs[i]); in db8500_gpio_config_pins()
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| /OK3568_Linux_fs/kernel/drivers/input/touchscreen/gt1x/ |
| H A D | gt1x_generic.c | 578 const u8 *cfgs[] = { in gt1x_init_panel() local
592 cfgs[0] = gtp_dat_5688; in gt1x_init_panel()
614 memcpy(gt1x_config, cfgs[sensor_id], cfg_len); in gt1x_init_panel()
1903 u8 *cfgs[] = { in gt1x_parse_sc_cfg() local
1913 if (sensor_id >= sizeof(cfgs) / sizeof(cfgs[0])) { in gt1x_parse_sc_cfg()
1926 memcpy(cfg, cfgs[sensor_id], cfg_lens[sensor_id]); in gt1x_parse_sc_cfg()
2027 u8 *cfgs[] = { in gt1x_parse_chr_cfg() local
2037 if (sensor_id >= sizeof(cfgs) / sizeof(cfgs[0])) { in gt1x_parse_chr_cfg()
2048 memcpy(cfg, cfgs[sensor_id], cfg_lens[sensor_id]); in gt1x_parse_chr_cfg()
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| /OK3568_Linux_fs/kernel/drivers/pinctrl/renesas/ |
| H A D | pinctrl.c | 87 unsigned long *cfgs; in sh_pfc_map_add_config() local
89 cfgs = kmemdup(configs, num_configs * sizeof(*cfgs), in sh_pfc_map_add_config()
91 if (cfgs == NULL) in sh_pfc_map_add_config()
96 map->data.configs.configs = cfgs; in sh_pfc_map_add_config()
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| H A D | sh_pfc.h | 666 #define SH_PFC_PIN_CFG(_pin, cfgs) \ argument
671 .configs = cfgs, \
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/thermal/ |
| H A D | nvidia,tegra124-soctherm.txt | 35 - throttle-cfgs: A sub-node which is a container of configuration for each
121 throttle-cfgs {
167 Example: referring to Tegra132's "reg", "reg-names" and "throttle-cfgs" :
175 throttle-cfgs {
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| /OK3568_Linux_fs/kernel/drivers/phy/samsung/ |
| H A D | phy-samsung-ufs.c | 78 struct samsung_ufs_phy_cfg **cfgs = ufs_phy->cfg; in samsung_ufs_phy_calibrate() local
89 cfg = cfgs[ufs_phy->ufs_phy_state]; in samsung_ufs_phy_calibrate()
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/emulex/benet/ |
| H A D | be_cmds.c | 4082 struct be_fat_conf_params *cfgs; in be_cmd_set_fw_log_level() local
4098 cfgs = (struct be_fat_conf_params *) in be_cmd_set_fw_log_level()
4100 for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { in be_cmd_set_fw_log_level()
4101 u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); in be_cmd_set_fw_log_level()
4104 if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) in be_cmd_set_fw_log_level()
4105 cfgs->module[i].trace_lvl[j].dbg_lvl = in be_cmd_set_fw_log_level()
4110 status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs); in be_cmd_set_fw_log_level()
4120 struct be_fat_conf_params *cfgs; in be_cmd_get_fw_log_level() local
4138 cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + in be_cmd_get_fw_log_level()
4141 for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { in be_cmd_get_fw_log_level()
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| H A D | be_cmds.h | 2486 struct be_fat_conf_params *cfgs);
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| /OK3568_Linux_fs/kernel/drivers/mtd/devices/ |
| H A D | st_spi_fsm.c | 1018 struct seq_rw_config cfgs[]) in stfsm_search_seq_rw_configs() argument
1023 for (config = cfgs; config->cmd != 0; config++) in stfsm_search_seq_rw_configs()
1101 struct seq_rw_config *cfgs) in stfsm_search_prepare_rw_seq() argument
1105 config = stfsm_search_seq_rw_configs(fsm, cfgs); in stfsm_search_prepare_rw_seq()
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| /OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h265e/ |
| H A D | hal_h265e_vepu580.c | 1553 vepu580_h265_set_patch_info(MppDevRegOffCfgs *cfgs, H265eSyntax_new *syn, in vepu580_h265_set_patch_info() argument
1612 ret = mpp_dev_multi_offset_update(cfgs, 161, u_offset); in vepu580_h265_set_patch_info()
1617 ret = mpp_dev_multi_offset_update(cfgs, 162, v_offset); in vepu580_h265_set_patch_info()
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/nvidia/ |
| H A D | tegra132.dtsi | 876 throttle-cfgs {
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu_nix.c | 2252 u64 cfgs[] = { in nix_af_mark_format_setup() local
2273 rc = rvu_nix_reserve_mark_format(rvu, nix_hw, blkaddr, cfgs[i]); in nix_af_mark_format_setup()
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | tegra124.dtsi | 909 throttle-cfgs {
|