xref: /OK3568_Linux_fs/kernel/include/linux/pinctrl/machine.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Machine interface for the pinctrl subsystem.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2011 ST-Ericsson SA
6*4882a593Smuzhiyun  * Written on behalf of Linaro for ST-Ericsson
7*4882a593Smuzhiyun  * Based on bits of regulator core, gpio core and clk core
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Author: Linus Walleij <linus.walleij@linaro.org>
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun #ifndef __LINUX_PINCTRL_MACHINE_H
12*4882a593Smuzhiyun #define __LINUX_PINCTRL_MACHINE_H
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/bug.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl-state.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun enum pinctrl_map_type {
19*4882a593Smuzhiyun 	PIN_MAP_TYPE_INVALID,
20*4882a593Smuzhiyun 	PIN_MAP_TYPE_DUMMY_STATE,
21*4882a593Smuzhiyun 	PIN_MAP_TYPE_MUX_GROUP,
22*4882a593Smuzhiyun 	PIN_MAP_TYPE_CONFIGS_PIN,
23*4882a593Smuzhiyun 	PIN_MAP_TYPE_CONFIGS_GROUP,
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /**
27*4882a593Smuzhiyun  * struct pinctrl_map_mux - mapping table content for MAP_TYPE_MUX_GROUP
28*4882a593Smuzhiyun  * @group: the name of the group whose mux function is to be configured. This
29*4882a593Smuzhiyun  *	field may be left NULL, and the first applicable group for the function
30*4882a593Smuzhiyun  *	will be used.
31*4882a593Smuzhiyun  * @function: the mux function to select for the group
32*4882a593Smuzhiyun  */
33*4882a593Smuzhiyun struct pinctrl_map_mux {
34*4882a593Smuzhiyun 	const char *group;
35*4882a593Smuzhiyun 	const char *function;
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /**
39*4882a593Smuzhiyun  * struct pinctrl_map_configs - mapping table content for MAP_TYPE_CONFIGS_*
40*4882a593Smuzhiyun  * @group_or_pin: the name of the pin or group whose configuration parameters
41*4882a593Smuzhiyun  *	are to be configured.
42*4882a593Smuzhiyun  * @configs: a pointer to an array of config parameters/values to program into
43*4882a593Smuzhiyun  *	hardware. Each individual pin controller defines the format and meaning
44*4882a593Smuzhiyun  *	of config parameters.
45*4882a593Smuzhiyun  * @num_configs: the number of entries in array @configs
46*4882a593Smuzhiyun  */
47*4882a593Smuzhiyun struct pinctrl_map_configs {
48*4882a593Smuzhiyun 	const char *group_or_pin;
49*4882a593Smuzhiyun 	unsigned long *configs;
50*4882a593Smuzhiyun 	unsigned num_configs;
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun /**
54*4882a593Smuzhiyun  * struct pinctrl_map - boards/machines shall provide this map for devices
55*4882a593Smuzhiyun  * @dev_name: the name of the device using this specific mapping, the name
56*4882a593Smuzhiyun  *	must be the same as in your struct device*. If this name is set to the
57*4882a593Smuzhiyun  *	same name as the pin controllers own dev_name(), the map entry will be
58*4882a593Smuzhiyun  *	hogged by the driver itself upon registration
59*4882a593Smuzhiyun  * @name: the name of this specific map entry for the particular machine.
60*4882a593Smuzhiyun  *	This is the parameter passed to pinmux_lookup_state()
61*4882a593Smuzhiyun  * @type: the type of mapping table entry
62*4882a593Smuzhiyun  * @ctrl_dev_name: the name of the device controlling this specific mapping,
63*4882a593Smuzhiyun  *	the name must be the same as in your struct device*. This field is not
64*4882a593Smuzhiyun  *	used for PIN_MAP_TYPE_DUMMY_STATE
65*4882a593Smuzhiyun  * @data: Data specific to the mapping type
66*4882a593Smuzhiyun  */
67*4882a593Smuzhiyun struct pinctrl_map {
68*4882a593Smuzhiyun 	const char *dev_name;
69*4882a593Smuzhiyun 	const char *name;
70*4882a593Smuzhiyun 	enum pinctrl_map_type type;
71*4882a593Smuzhiyun 	const char *ctrl_dev_name;
72*4882a593Smuzhiyun 	union {
73*4882a593Smuzhiyun 		struct pinctrl_map_mux mux;
74*4882a593Smuzhiyun 		struct pinctrl_map_configs configs;
75*4882a593Smuzhiyun 	} data;
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* Convenience macros to create mapping table entries */
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun #define PIN_MAP_DUMMY_STATE(dev, state) \
81*4882a593Smuzhiyun 	{								\
82*4882a593Smuzhiyun 		.dev_name = dev,					\
83*4882a593Smuzhiyun 		.name = state,						\
84*4882a593Smuzhiyun 		.type = PIN_MAP_TYPE_DUMMY_STATE,			\
85*4882a593Smuzhiyun 	}
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun #define PIN_MAP_MUX_GROUP(dev, state, pinctrl, grp, func)		\
88*4882a593Smuzhiyun 	{								\
89*4882a593Smuzhiyun 		.dev_name = dev,					\
90*4882a593Smuzhiyun 		.name = state,						\
91*4882a593Smuzhiyun 		.type = PIN_MAP_TYPE_MUX_GROUP,				\
92*4882a593Smuzhiyun 		.ctrl_dev_name = pinctrl,				\
93*4882a593Smuzhiyun 		.data.mux = {						\
94*4882a593Smuzhiyun 			.group = grp,					\
95*4882a593Smuzhiyun 			.function = func,				\
96*4882a593Smuzhiyun 		},							\
97*4882a593Smuzhiyun 	}
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun #define PIN_MAP_MUX_GROUP_DEFAULT(dev, pinctrl, grp, func)		\
100*4882a593Smuzhiyun 	PIN_MAP_MUX_GROUP(dev, PINCTRL_STATE_DEFAULT, pinctrl, grp, func)
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun #define PIN_MAP_MUX_GROUP_HOG(dev, state, grp, func)			\
103*4882a593Smuzhiyun 	PIN_MAP_MUX_GROUP(dev, state, dev, grp, func)
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun #define PIN_MAP_MUX_GROUP_HOG_DEFAULT(dev, grp, func)			\
106*4882a593Smuzhiyun 	PIN_MAP_MUX_GROUP(dev, PINCTRL_STATE_DEFAULT, dev, grp, func)
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun #define PIN_MAP_CONFIGS_PIN(dev, state, pinctrl, pin, cfgs)		\
109*4882a593Smuzhiyun 	{								\
110*4882a593Smuzhiyun 		.dev_name = dev,					\
111*4882a593Smuzhiyun 		.name = state,						\
112*4882a593Smuzhiyun 		.type = PIN_MAP_TYPE_CONFIGS_PIN,			\
113*4882a593Smuzhiyun 		.ctrl_dev_name = pinctrl,				\
114*4882a593Smuzhiyun 		.data.configs = {					\
115*4882a593Smuzhiyun 			.group_or_pin = pin,				\
116*4882a593Smuzhiyun 			.configs = cfgs,				\
117*4882a593Smuzhiyun 			.num_configs = ARRAY_SIZE(cfgs),		\
118*4882a593Smuzhiyun 		},							\
119*4882a593Smuzhiyun 	}
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun #define PIN_MAP_CONFIGS_PIN_DEFAULT(dev, pinctrl, pin, cfgs)		\
122*4882a593Smuzhiyun 	PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_DEFAULT, pinctrl, pin, cfgs)
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun #define PIN_MAP_CONFIGS_PIN_HOG(dev, state, pin, cfgs)			\
125*4882a593Smuzhiyun 	PIN_MAP_CONFIGS_PIN(dev, state, dev, pin, cfgs)
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun #define PIN_MAP_CONFIGS_PIN_HOG_DEFAULT(dev, pin, cfgs)			\
128*4882a593Smuzhiyun 	PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_DEFAULT, dev, pin, cfgs)
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun #define PIN_MAP_CONFIGS_GROUP(dev, state, pinctrl, grp, cfgs)		\
131*4882a593Smuzhiyun 	{								\
132*4882a593Smuzhiyun 		.dev_name = dev,					\
133*4882a593Smuzhiyun 		.name = state,						\
134*4882a593Smuzhiyun 		.type = PIN_MAP_TYPE_CONFIGS_GROUP,			\
135*4882a593Smuzhiyun 		.ctrl_dev_name = pinctrl,				\
136*4882a593Smuzhiyun 		.data.configs = {					\
137*4882a593Smuzhiyun 			.group_or_pin = grp,				\
138*4882a593Smuzhiyun 			.configs = cfgs,				\
139*4882a593Smuzhiyun 			.num_configs = ARRAY_SIZE(cfgs),		\
140*4882a593Smuzhiyun 		},							\
141*4882a593Smuzhiyun 	}
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun #define PIN_MAP_CONFIGS_GROUP_DEFAULT(dev, pinctrl, grp, cfgs)		\
144*4882a593Smuzhiyun 	PIN_MAP_CONFIGS_GROUP(dev, PINCTRL_STATE_DEFAULT, pinctrl, grp, cfgs)
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun #define PIN_MAP_CONFIGS_GROUP_HOG(dev, state, grp, cfgs)		\
147*4882a593Smuzhiyun 	PIN_MAP_CONFIGS_GROUP(dev, state, dev, grp, cfgs)
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun #define PIN_MAP_CONFIGS_GROUP_HOG_DEFAULT(dev, grp, cfgs)		\
150*4882a593Smuzhiyun 	PIN_MAP_CONFIGS_GROUP(dev, PINCTRL_STATE_DEFAULT, dev, grp, cfgs)
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun #ifdef CONFIG_PINCTRL
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun extern int pinctrl_register_mappings(const struct pinctrl_map *map,
155*4882a593Smuzhiyun 				unsigned num_maps);
156*4882a593Smuzhiyun extern void pinctrl_unregister_mappings(const struct pinctrl_map *map);
157*4882a593Smuzhiyun extern void pinctrl_provide_dummies(void);
158*4882a593Smuzhiyun #else
159*4882a593Smuzhiyun 
pinctrl_register_mappings(const struct pinctrl_map * map,unsigned num_maps)160*4882a593Smuzhiyun static inline int pinctrl_register_mappings(const struct pinctrl_map *map,
161*4882a593Smuzhiyun 					   unsigned num_maps)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	return 0;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun 
pinctrl_unregister_mappings(const struct pinctrl_map * map)166*4882a593Smuzhiyun static inline void pinctrl_unregister_mappings(const struct pinctrl_map *map)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
pinctrl_provide_dummies(void)170*4882a593Smuzhiyun static inline void pinctrl_provide_dummies(void)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun #endif /* !CONFIG_PINCTRL */
174*4882a593Smuzhiyun #endif
175