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Searched refs:_pwr_reg (Results 1 – 12 of 12) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt7629.c24 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
30 .pwr_reg = _pwr_reg, \
45 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
48 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
H A Dclk-mt7622.c24 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ argument
30 .pwr_reg = _pwr_reg, \
45 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
48 PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\
H A Dclk-mt6797.c609 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
615 .pwr_reg = _pwr_reg, \
629 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
632 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
H A Dclk-mt8516.c736 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
742 .pwr_reg = _pwr_reg, \
756 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
759 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
H A Dclk-mt8167.c982 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
988 .pwr_reg = _pwr_reg, \
1002 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1005 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
H A Dclk-mt6779.c1144 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1152 .pwr_reg = _pwr_reg, \
1171 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1176 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
H A Dclk-mt8173.c938 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
944 .pwr_reg = _pwr_reg, \
958 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
961 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
H A Dclk-mt6765.c716 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
722 .pwr_reg = _pwr_reg, \
740 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
744 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
H A Dclk-mt8183.c1067 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1075 .pwr_reg = _pwr_reg, \
1094 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1099 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
H A Dclk-mt2712.c1166 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1173 .pwr_reg = _pwr_reg, \
1189 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1192 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
H A Dclk-mt8135.c596 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg,… argument
600 .pwr_reg = _pwr_reg, \
H A Dclk-mt2701.c918 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
923 .pwr_reg = _pwr_reg, \