Home
last modified time | relevance | path

Searched refs:CLK_SCLK_MMC2 (Results 1 – 22 of 22) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dexynos5410.h28 #define CLK_SCLK_MMC2 134 macro
H A Dexynos5250.h37 #define CLK_SCLK_MMC2 141 macro
H A Dexynos7-clk.h59 #define CLK_SCLK_MMC2 6 macro
H A Dexynos4.h60 #define CLK_SCLK_MMC2 147 macro
H A Dexynos5420.h35 #define CLK_SCLK_MMC2 134 macro
H A Dexynos3250.h257 #define CLK_SCLK_MMC2 249 macro
H A Dexynos5433.h568 #define CLK_SCLK_MMC2 61 macro
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Dexynos7420-clk.h62 #define CLK_SCLK_MMC2 6 macro
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-exynos5410.c176 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc_pre2",
H A Dclk-exynos5250.c479 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc_pre2",
H A Dclk-exynos3250.c546 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc2_pre",
H A Dclk-exynos7.c521 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_sclk_mmc2",
H A Dclk-exynos4.c771 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc_pre2", SRC_MASK_FSYS, 8,
H A Dclk-exynos5420.c1010 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_mmc2",
H A Dclk-exynos5433.c2315 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "mout_sclk_mmc2_user",
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dexynos5410.dtsi156 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
H A Dexynos3250.dtsi395 clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
H A Dexynos4.dtsi341 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
H A Dexynos5250.dtsi562 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
H A Dexynos5420.dtsi234 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/exynos/
H A Dexynos7.dtsi552 <&clock_top1 CLK_SCLK_MMC2>;
H A Dexynos5433.dtsi1749 <&cmu_fsys CLK_SCLK_MMC2>;