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Searched refs:CLK_SCLK_MMC1 (Results 1 – 22 of 22) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dexynos5410.h27 #define CLK_SCLK_MMC1 133 macro
H A Dexynos5250.h36 #define CLK_SCLK_MMC1 140 macro
H A Dexynos7-clk.h60 #define CLK_SCLK_MMC1 7 macro
H A Dexynos4.h59 #define CLK_SCLK_MMC1 146 macro
H A Dexynos5420.h34 #define CLK_SCLK_MMC1 133 macro
H A Dexynos3250.h248 #define CLK_SCLK_MMC1 240 macro
H A Dexynos5433.h569 #define CLK_SCLK_MMC1 62 macro
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Dexynos7420-clk.h63 #define CLK_SCLK_MMC1 7 macro
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-exynos5410.c174 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc_pre1",
H A Dclk-exynos5250.c477 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc_pre1",
H A Dclk-exynos3250.c548 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc1_pre",
H A Dclk-exynos7.c532 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_sclk_mmc1",
H A Dclk-exynos4.c769 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc_pre1", SRC_MASK_FSYS, 4,
H A Dclk-exynos5420.c1008 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_mmc1",
H A Dclk-exynos5433.c2317 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "mout_sclk_mmc1_user",
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dexynos5410.dtsi144 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
H A Dexynos3250.dtsi383 clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
H A Dexynos4.dtsi332 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
H A Dexynos5250.dtsi550 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
H A Dexynos5420.dtsi222 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/exynos/
H A Dexynos7.dtsi539 <&clock_top1 CLK_SCLK_MMC1>;
H A Dexynos5433.dtsi1736 <&cmu_fsys CLK_SCLK_MMC1>;