| /OK3568_Linux_fs/kernel/drivers/media/platform/ |
| H A D | via-camera.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 6 #define VCR_IC_EAV 0x0001 /* End of active video status */ 8 #define VCR_IC_FBOTFLD 0x0004 /* "flipping" Bottom field is active */ 9 #define VCR_IC_ACTBUF 0x0018 /* Active video buffer */ 10 #define VCR_IC_VSYNC 0x0020 /* 0 = VB, 1 = active video */ 11 #define VCR_IC_BOTFLD 0x0040 /* Bottom field is active */ 13 #define VCR_IC_INTEN 0x0100 /* End of active video int. enable */ 14 #define VCR_IC_VBIINT 0x0200 /* End of VBI int enable */ 18 #define VCR_TSC_ENABLE 0x000001 /* Transport stream input enable */ 20 #define VCR_TSC_METHOD 0x00000c /* DMA method (non-functional) */ [all …]
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| /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/video/ |
| H A D | display-timing.txt | 1 display-timing bindings 4 display-timings node 5 -------------------- 8 - none 11 - native-mode: The native mode for the display, in case multiple modes are 15 -------------- 18 - hactive, vactive: display resolution 19 - hfront-porch, hback-porch, hsync-len: horizontal display timing parameters 21 vfront-porch, vback-porch, vsync-len: vertical display timing parameters in 23 - clock-frequency: display clock in Hz [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/video/ |
| H A D | rockchip_mipidsi_lcd.txt | 1 Device-Tree bindings for rockchip mipi dsi lcd driver 4 - rockchip,screen_init: Whether you need this screen initialization. 8 - rockchip,dsi_lane: mipi lcd data lane number. 10 - rockchip,dsi_hs_clk: mipi lcd high speed clock. 12 - rockchip,mipi_dsi_num: mipi lcd dsi number. 14 - mipi_lcd_rst:mipi_lcd_rst: Should specify pin control groups used for reset this lcd. 16 - mipi_lcd_en:mipi_lcd_en: Should specify pin control groups used for enable this lcd. 18 - rockchip,gpios: gpio pin 20 - rockchip,delay: delay the millisecond. 22 - rockchip,cmd_debug : debug the cammands. [all …]
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| /OK3568_Linux_fs/kernel/drivers/soc/qcom/ |
| H A D | rpmh-rsc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 25 #include <soc/qcom/cmd-db.h> 27 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 29 #include "rpmh-internal.h" 32 #include "trace-rpmh.h" 92 * - The main rpmh-rsc address is the base of a register space that can 94 * (DRV_PRNT_CHLD_CONFIG). Also found within the rpmh-rsc register 96 * specified in the device tree by "qcom,tcs-offset" and used to 98 * - TCS blocks come one after another. Type, count, and order are [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_indep_power/include/ |
| H A D | sbhnddma.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 6 * Copyright (C) 1999-2017, Broadcom Corporation 27 * <<Broadcom-WL-IPTag/Open:>> 29 * $Id: sbhnddma.h 615537 2016-01-28 00:46:34Z $ 46 uint32 control; /**< enable, et al */ 49 uint32 status; /**< current active descriptor, et al */ 59 uint32 fifodatalow; /**< low 32bits of data */ 60 uint32 fifodatahigh; /**< high 32bits of data */ 70 uint32 addr; /**< data buffer address */ 81 #define XC_XE ((uint32)1 << 0) /**< transmit enable */ [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/include/ |
| H A D | sbhnddma.h | 22 * <<Broadcom-WL-IPTag/Dual:>> 38 uint32 control; /**< enable, et al */ 41 uint32 status; /**< current active descriptor, et al */ 51 uint32 fifodatalow; /**< low 32bits of data */ 52 uint32 fifodatahigh; /**< high 32bits of data */ 62 uint32 addr; /**< data buffer address */ 73 #define XC_XE ((uint32)1 << 0) /**< transmit enable */ 75 #define XC_LE ((uint32)1 << 2) /**< loopback enable */ 135 #define XS_XS_ACTIVE 0x1000 /**< active */ 143 #define XS_XE_DFU 0x20000 /**< data fifo underrun */ [all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/include/ |
| H A D | sbhnddma.h | 22 * <<Broadcom-WL-IPTag/Dual:>> 38 uint32 control; /**< enable, et al */ 41 uint32 status; /**< current active descriptor, et al */ 51 uint32 fifodatalow; /**< low 32bits of data */ 52 uint32 fifodatahigh; /**< high 32bits of data */ 62 uint32 addr; /**< data buffer address */ 73 #define XC_XE ((uint32)1 << 0) /**< transmit enable */ 75 #define XC_LE ((uint32)1 << 2) /**< loopback enable */ 135 #define XS_XS_ACTIVE 0x1000 /**< active */ 143 #define XS_XE_DFU 0x20000 /**< data fifo underrun */ [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/panel/ |
| H A D | panel-timing.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/panel/panel-timing.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Sam Ravnborg <sam@ravnborg.org> 14 There are different ways of describing the timing data of a panel. The 20 +----------+-------------------------------------+----------+-------+ 24 +----------#######################################----------+-------+ 29 |<-------->#<-------+--------------------------->#<-------->|<----->| [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/include/ |
| H A D | sbhnddma.h | 7 * Copyright (C) 1999-2017, Broadcom Corporation 28 * <<Broadcom-WL-IPTag/Open:>> 30 * $Id: sbhnddma.h 694506 2017-04-13 05:10:05Z $ 46 uint32 control; /**< enable, et al */ 49 uint32 status; /**< current active descriptor, et al */ 59 uint32 fifodatalow; /**< low 32bits of data */ 60 uint32 fifodatahigh; /**< high 32bits of data */ 70 uint32 addr; /**< data buffer address */ 81 #define XC_XE ((uint32)1 << 0) /**< transmit enable */ 83 #define XC_LE ((uint32)1 << 2) /**< loopback enable */ [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/ |
| H A D | sbhnddma.h | 7 * Copyright (C) 1999-2017, Broadcom Corporation 28 * <<Broadcom-WL-IPTag/Open:>> 30 * $Id: sbhnddma.h 694506 2017-04-13 05:10:05Z $ 46 uint32 control; /**< enable, et al */ 49 uint32 status; /**< current active descriptor, et al */ 59 uint32 fifodatalow; /**< low 32bits of data */ 60 uint32 fifodatahigh; /**< high 32bits of data */ 70 uint32 addr; /**< data buffer address */ 81 #define XC_XE ((uint32)1 << 0) /**< transmit enable */ 83 #define XC_LE ((uint32)1 << 2) /**< loopback enable */ [all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/infineon/include/ |
| H A D | sbhnddma.h | 7 * Copyright (C) 1999-2017, Broadcom Corporation 28 * <<Broadcom-WL-IPTag/Open:>> 30 * $Id: sbhnddma.h 694506 2017-04-13 05:10:05Z $ 46 uint32 control; /**< enable, et al */ 49 uint32 status; /**< current active descriptor, et al */ 59 uint32 fifodatalow; /**< low 32bits of data */ 60 uint32 fifodatahigh; /**< high 32bits of data */ 70 uint32 addr; /**< data buffer address */ 81 #define XC_XE ((uint32)1 << 0) /**< transmit enable */ 83 #define XC_LE ((uint32)1 << 2) /**< loopback enable */ [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-pxa/ |
| H A D | regs-u2d.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 13 #define U2DCR_SPEOREN (1 << 27) /* Short Packet EOR INTR generation Enable */ 20 #define U2DCR_SMAC (1 << 17) /* Switch Endpoint Memory to Active Configuration */ 21 #define U2DCR_DWRE (1 << 16) /* Device Remote Wake-up Feature */ 22 #define U2DCR_ACN (0xf << 12) /* Active U2D Configuration Number */ 23 #define U2DCR_AIN (0xf << 8) /* Active U2D Interface Number */ 24 #define U2DCR_AAISN (0xf << 4) /* Active U2D Alternate Interface Setting Number */ 27 #define U2DCR_UDA (1 << 1) /* U2D Active */ 28 #define U2DCR_UDE (1 << 0) /* U2D Enable */ 32 #define U2DINT_CC (1 << 31) /* Interrupt - Configuration Change */ [all …]
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| H A D | pxa27x-udc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 10 #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ 11 #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation 13 #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol 15 #define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol 16 Enable */ 17 #define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */ 18 #define UDCCR_ACN (0x03 << 11) /* Active UDC configuration Number */ 20 #define UDCCR_AIN (0x07 << 8) /* Active UDC interface Number */ 22 #define UDCCR_AAISN (0x07 << 5) /* Active UDC Alternate Interface [all …]
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| /OK3568_Linux_fs/kernel/drivers/media/platform/omap3isp/ |
| H A D | omap3isp.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * TI OMAP3 ISP - Bus Configuration 25 * struct isp_parallel_cfg - Parallel interface configuration 26 * @data_lane_shift: Data lane shifter 27 * 0 - CAMEXT[13:0] -> CAM[13:0] 28 * 2 - CAMEXT[13:2] -> CAM[11:0] 29 * 4 - CAMEXT[13:4] -> CAM[9:0] 30 * 6 - CAMEXT[13:6] -> CAM[7:0] 32 * 0 - Sample on rising edge, 1 - Sample on falling edge 34 * 0 - Active high, 1 - Active low [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/csf/ |
| H A D | mali_kbase_csf_trace_buffer.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 4 * (C) COPYRIGHT 2018-2022 ARM Limited. All rights reserved. 18 * http://www.gnu.org/licenses/gpl-2.0.html. 35 * kbase_csf_firmware_trace_buffers_init - Initialize trace buffers 40 * - One memory page of GPU-readable, CPU-writable memory is used for 42 * - One memory page of GPU-writable, CPU-readable memory is used for 44 * - A data buffer of GPU-writable, CPU-readable memory is allocated 48 * insert, extract and data buffer variables. The size and the trace 49 * enable bits are not dereferenced by the GPU and shall be written 54 * populated with data from the firmware image parsing. [all …]
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| /OK3568_Linux_fs/kernel/drivers/media/i2c/ |
| H A D | tvp5150_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 4 * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder registers 33 #define TVP5150_DATA_RATE_SEL 0x0d /* Outputs and data rates select */ 39 #define TVP5150_ACT_VD_CROP_ST_MSB 0x11 /* Active video cropping start MSB */ 40 #define TVP5150_ACT_VD_CROP_ST_LSB 0x12 /* Active video cropping start LSB */ 41 #define TVP5150_ACT_VD_CROP_STP_MSB 0x13 /* Active video cropping stop MSB */ 42 #define TVP5150_ACT_VD_CROP_STP_LSB 0x14 /* Active video cropping stop LSB */ 53 #define TVP5150_INT_ENABLE_REG_B 0x1d /* Interrupt enable register B */ 56 /* Reserved 1Fh-27h */ 75 /* Reserved 29h-2bh */ [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpio/ |
| H A D | gpio-pcie-idio-24.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * GPIO driver for the ACCES PCIe-IDIO-24 family 15 * This driver supports the following ACCES devices: PCIe-IDIO-24, 16 * PCIe-IDI-24, PCIe-IDO-24, and PCIe-IDIO-12. 35 * 0: Enable Interrupt Sources (Bit 0) 36 * 1: Enable Interrupt Sources (Bit 1) 38 * 3: Mailbox Interrupt Enable 39 * 4: Power Management Interrupt Enable 41 * 6: Slave Read Local Data Parity Check Error Enable 42 * 7: Slave Read Local Data Parity Check Error Status [all …]
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| /OK3568_Linux_fs/kernel/drivers/input/sensors/lsensor/ |
| H A D | cm3232.c | 3 * Copyright (C) 2012-2015 ROCKCHIP. 4 * Author: luowei <lw@rock-chips.com> 32 #include <linux/sensor-dev.h> 44 #define COMMAND_ALS_DATA 50 //ALS: 15:8 MSB 8bits data 45 //7:0 LSB 8bits data 48 #define ALS_RESET(x) (((x)&1)<<6) //0 = Reset disable; 1 = Reset enable 63 static int sensor_active(struct i2c_client *client, int enable, int rate) in sensor_active() argument 70 //sensor->client->addr = sensor->ops->ctrl_reg; in sensor_active() 71 //sensor->ops->ctrl_data = sensor_read_reg(client, sensor->ops->ctrl_reg); in sensor_active() 72 //printk("%s: client addr = %#x\n\n", __func__, client->addr); in sensor_active() [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/phy/ |
| H A D | dp83640_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 13 #define PTP_TDR 0x0015 /* PTP Time Data Register */ 20 #define PTP_TXTS 0x001c /* PTP Transmit Timestamp Register, in four 16-bit reads */ 21 #define PTP_RXTS 0x001d /* PTP Receive Timestamp Register, in six? 16-bit reads */ 23 #define PTP_EDATA 0x001f /* PTP Event Data Register */ 54 #define BC_WRITE (1<<11) /* Broadcast Write Enable */ 60 #define TRIG_EN (1<<8) /* Enable PTP Trigger */ 66 #define PTP_ENABLE (1<<2) /* Enable PTP Clock */ 75 #define TXTS_IE (1<<3) /* Transmit Timestamp Interrupt Enable */ 76 #define RXTS_IE (1<<2) /* Receive Timestamp Interrupt Enable */ [all …]
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| /OK3568_Linux_fs/kernel/include/linux/platform_data/ |
| H A D | adp5588.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 5 * Copyright 2009-2010 Analog Devices Inc. 31 #define GPIO_DAT_STAT1 0x14 /* GPIO Data Status, Read twice to clear */ 32 #define GPIO_DAT_STAT2 0x15 /* GPIO Data Status, Read twice to clear */ 33 #define GPIO_DAT_STAT3 0x16 /* GPIO Data Status, Read twice to clear */ 34 #define GPIO_DAT_OUT1 0x17 /* GPIO DATA OUT */ 35 #define GPIO_DAT_OUT2 0x18 /* GPIO DATA OUT */ 36 #define GPIO_DAT_OUT3 0x19 /* GPIO DATA OUT */ 37 #define GPIO_INT_EN1 0x1A /* GPIO Interrupt Enable */ 38 #define GPIO_INT_EN2 0x1B /* GPIO Interrupt Enable */ [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | imx6-logicpd-baseboard.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 compatible = "gpio-keys"; 13 debounce-interval = <10>; 14 wakeup-source; 21 debounce-interval = <10>; 22 wakeup-source; 29 debounce-interval = <10>; 30 wakeup-source; 37 debounce-interval = <10>; 38 wakeup-source; [all …]
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| /OK3568_Linux_fs/kernel/drivers/usb/gadget/udc/ |
| H A D | pxa27x_udc.h | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Intel PXA27x on-chip full speed USB device controller 28 #define UDCOTGICR 0x0018 /* UDC On-The-Go interrupt control */ 33 #define UDCDRn(x) (0x0300 + ((x)<<2)) /* UDC Data Register */ 36 #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ 37 #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation 39 #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol 41 #define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol 42 Enable */ 43 #define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */ [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3399-sapphire-excavator-linux-for-rk1808-cascade.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "rk3399-excavator-sapphire.dtsi" 9 #include "rk3399-linux.dtsi" 10 #include <dt-bindings/input/input.h> 14 compatible = "rockchip,rk3399-excavator-linux", "rockchip,rk3399"; 16 fiq_debugger: fiq-debugger { 17 compatible = "rockchip,fiq-debugger"; 18 rockchip,serial-id = <2>; 19 rockchip,signal-irq = <182>; [all …]
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| H A D | rk3399-evb-ind-lpddr4-linux.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2019-2020 Fuzhou Rockchip Electronics Co., Ltd. 6 /dts-v1/; 8 #include "rk3399-evb-ind.dtsi" 9 #include "rk3399-linux.dtsi" 13 compatible = "rockchip,linux", "rockchip,rk3399-evb-ind-lpddr4-linux", "rockchip,rk3399"; 16 compatible = "mmio-sram"; 20 hub_reset: hub-reset { 21 compatible = "regulator-fixed"; 22 enable-active-high; [all …]
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| /OK3568_Linux_fs/u-boot/board/spear/x600/ |
| H A D | fpga.c | 4 * SPDX-License-Identifier: GPL-2.0+ 20 * SoC at all. And CLOCK and DATA are connected to the SSP2 port. We use 21 * 16bit serial writes via this SSP port to write the data bits into the 28 * Set the active-low FPGA reset signal. 39 * Set the FPGA's active-low SelectMap program line to the specified level 51 * Test the state of the active-low FPGA INIT line. Return 1 on INIT 63 * INIT signal state generated via a local state-machine. in fpga_init_fn() 74 * Test the state of the active-high FPGA DONE pin 81 * Wait for Tx-FIFO to become empty before looking for DONE in fpga_done_fn() 83 while (!(readl(&ssp->sspsr) & SSPSR_TFE)) in fpga_done_fn() [all …]
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