xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/panel/panel-timing.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: panel timing bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Thierry Reding <thierry.reding@gmail.com>
11*4882a593Smuzhiyun  - Sam Ravnborg <sam@ravnborg.org>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyundescription: |
14*4882a593Smuzhiyun  There are different ways of describing the timing data of a panel. The
15*4882a593Smuzhiyun  devicetree representation corresponds to the one commonly found in datasheets
16*4882a593Smuzhiyun  for panels.
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun  The parameters are defined as seen in the following illustration.
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun  +----------+-------------------------------------+----------+-------+
21*4882a593Smuzhiyun  |          |        ^                            |          |       |
22*4882a593Smuzhiyun  |          |        |vback_porch                 |          |       |
23*4882a593Smuzhiyun  |          |        v                            |          |       |
24*4882a593Smuzhiyun  +----------#######################################----------+-------+
25*4882a593Smuzhiyun  |          #        ^                            #          |       |
26*4882a593Smuzhiyun  |          #        |                            #          |       |
27*4882a593Smuzhiyun  |  hback   #        |                            #  hfront  | hsync |
28*4882a593Smuzhiyun  |   porch  #        |       hactive              #  porch   |  len  |
29*4882a593Smuzhiyun  |<-------->#<-------+--------------------------->#<-------->|<----->|
30*4882a593Smuzhiyun  |          #        |                            #          |       |
31*4882a593Smuzhiyun  |          #        |vactive                     #          |       |
32*4882a593Smuzhiyun  |          #        |                            #          |       |
33*4882a593Smuzhiyun  |          #        v                            #          |       |
34*4882a593Smuzhiyun  +----------#######################################----------+-------+
35*4882a593Smuzhiyun  |          |        ^                            |          |       |
36*4882a593Smuzhiyun  |          |        |vfront_porch                |          |       |
37*4882a593Smuzhiyun  |          |        v                            |          |       |
38*4882a593Smuzhiyun  +----------+-------------------------------------+----------+-------+
39*4882a593Smuzhiyun  |          |        ^                            |          |       |
40*4882a593Smuzhiyun  |          |        |vsync_len                   |          |       |
41*4882a593Smuzhiyun  |          |        v                            |          |       |
42*4882a593Smuzhiyun  +----------+-------------------------------------+----------+-------+
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun  The following is the panel timings shown with time on the x-axis.
46*4882a593Smuzhiyun  This matches the timing diagrams often found in data sheets.
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun              Active                 Front           Sync           Back
49*4882a593Smuzhiyun              Region                 Porch                          Porch
50*4882a593Smuzhiyun  <-----------------------><----------------><-------------><-------------->
51*4882a593Smuzhiyun    //////////////////////|
52*4882a593Smuzhiyun   ////////////////////// |
53*4882a593Smuzhiyun  //////////////////////  |..................               ................
54*4882a593Smuzhiyun                                             _______________
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun  Timing can be specified either as a typical value or as a tuple
57*4882a593Smuzhiyun  of min, typ, max values.
58*4882a593Smuzhiyun
59*4882a593Smuzhiyunproperties:
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun  clock-frequency:
62*4882a593Smuzhiyun    description: Panel clock in Hz
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun  hactive:
65*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
66*4882a593Smuzhiyun    description: Horizontal panel resolution in pixels
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun  vactive:
69*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
70*4882a593Smuzhiyun    description: Vertical panel resolution in pixels
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun  hfront-porch:
73*4882a593Smuzhiyun    description: Horizontal front porch panel timing
74*4882a593Smuzhiyun    oneOf:
75*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32
76*4882a593Smuzhiyun        maxItems: 1
77*4882a593Smuzhiyun        items:
78*4882a593Smuzhiyun          description: typical number of pixels
79*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32-array
80*4882a593Smuzhiyun        minItems: 3
81*4882a593Smuzhiyun        maxItems: 3
82*4882a593Smuzhiyun        items:
83*4882a593Smuzhiyun          description: min, typ, max number of pixels
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun  hback-porch:
86*4882a593Smuzhiyun    description: Horizontal back porch timing
87*4882a593Smuzhiyun    oneOf:
88*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32
89*4882a593Smuzhiyun        maxItems: 1
90*4882a593Smuzhiyun        items:
91*4882a593Smuzhiyun          description: typical number of pixels
92*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32-array
93*4882a593Smuzhiyun        minItems: 3
94*4882a593Smuzhiyun        maxItems: 3
95*4882a593Smuzhiyun        items:
96*4882a593Smuzhiyun          description: min, typ, max number of pixels
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun  hsync-len:
99*4882a593Smuzhiyun    description: Horizontal sync length panel timing
100*4882a593Smuzhiyun    oneOf:
101*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32
102*4882a593Smuzhiyun        maxItems: 1
103*4882a593Smuzhiyun        items:
104*4882a593Smuzhiyun          description: typical number of pixels
105*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32-array
106*4882a593Smuzhiyun        minItems: 3
107*4882a593Smuzhiyun        maxItems: 3
108*4882a593Smuzhiyun        items:
109*4882a593Smuzhiyun          description: min, typ, max number of pixels
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun  vfront-porch:
112*4882a593Smuzhiyun    description: Vertical front porch panel timing
113*4882a593Smuzhiyun    oneOf:
114*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32
115*4882a593Smuzhiyun        maxItems: 1
116*4882a593Smuzhiyun        items:
117*4882a593Smuzhiyun          description: typical number of lines
118*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32-array
119*4882a593Smuzhiyun        minItems: 3
120*4882a593Smuzhiyun        maxItems: 3
121*4882a593Smuzhiyun        items:
122*4882a593Smuzhiyun          description: min, typ, max number of lines
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun  vback-porch:
125*4882a593Smuzhiyun    description: Vertical back porch panel timing
126*4882a593Smuzhiyun    oneOf:
127*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32
128*4882a593Smuzhiyun        maxItems: 1
129*4882a593Smuzhiyun        items:
130*4882a593Smuzhiyun          description: typical number of lines
131*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32-array
132*4882a593Smuzhiyun        minItems: 3
133*4882a593Smuzhiyun        maxItems: 3
134*4882a593Smuzhiyun        items:
135*4882a593Smuzhiyun          description: min, typ, max number of lines
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun  vsync-len:
138*4882a593Smuzhiyun    description: Vertical sync length panel timing
139*4882a593Smuzhiyun    oneOf:
140*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32
141*4882a593Smuzhiyun        maxItems: 1
142*4882a593Smuzhiyun        items:
143*4882a593Smuzhiyun          description: typical number of lines
144*4882a593Smuzhiyun      - $ref: /schemas/types.yaml#/definitions/uint32-array
145*4882a593Smuzhiyun        minItems: 3
146*4882a593Smuzhiyun        maxItems: 3
147*4882a593Smuzhiyun        items:
148*4882a593Smuzhiyun          description: min, typ, max number of lines
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun  hsync-active:
151*4882a593Smuzhiyun    description: |
152*4882a593Smuzhiyun      Horizontal sync pulse.
153*4882a593Smuzhiyun      0 selects active low, 1 selects active high.
154*4882a593Smuzhiyun      If omitted then it is not used by the hardware
155*4882a593Smuzhiyun    enum: [0, 1]
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun  vsync-active:
158*4882a593Smuzhiyun    description: |
159*4882a593Smuzhiyun      Vertical sync pulse.
160*4882a593Smuzhiyun      0 selects active low, 1 selects active high.
161*4882a593Smuzhiyun      If omitted then it is not used by the hardware
162*4882a593Smuzhiyun    enum: [0, 1]
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun  de-active:
165*4882a593Smuzhiyun    description: |
166*4882a593Smuzhiyun      Data enable.
167*4882a593Smuzhiyun      0 selects active low, 1 selects active high.
168*4882a593Smuzhiyun      If omitted then it is not used by the hardware
169*4882a593Smuzhiyun    enum: [0, 1]
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun  pixelclk-active:
172*4882a593Smuzhiyun    description: |
173*4882a593Smuzhiyun      Data driving on rising or falling edge.
174*4882a593Smuzhiyun      Use 0 to drive pixel data on falling edge and
175*4882a593Smuzhiyun      sample data on rising edge.
176*4882a593Smuzhiyun      Use 1 to drive pixel data on rising edge and
177*4882a593Smuzhiyun      sample data on falling edge
178*4882a593Smuzhiyun    enum: [0, 1]
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun  syncclk-active:
181*4882a593Smuzhiyun    description: |
182*4882a593Smuzhiyun      Drive sync on rising or sample sync on falling edge.
183*4882a593Smuzhiyun      If not specified then the setup is as specified by pixelclk-active.
184*4882a593Smuzhiyun      Use 0 to drive sync on falling edge and
185*4882a593Smuzhiyun      sample sync on rising edge of pixel clock.
186*4882a593Smuzhiyun      Use 1 to drive sync on rising edge and
187*4882a593Smuzhiyun      sample sync on falling edge of pixel clock
188*4882a593Smuzhiyun    enum: [0, 1]
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun  interlaced:
191*4882a593Smuzhiyun    type: boolean
192*4882a593Smuzhiyun    description: Enable interlaced mode
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun  doublescan:
195*4882a593Smuzhiyun    type: boolean
196*4882a593Smuzhiyun    description: Enable double scan mode
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun  doubleclk:
199*4882a593Smuzhiyun    type: boolean
200*4882a593Smuzhiyun    description: Enable double clock mode
201*4882a593Smuzhiyun
202*4882a593Smuzhiyunrequired:
203*4882a593Smuzhiyun  - clock-frequency
204*4882a593Smuzhiyun  - hactive
205*4882a593Smuzhiyun  - vactive
206*4882a593Smuzhiyun  - hfront-porch
207*4882a593Smuzhiyun  - hback-porch
208*4882a593Smuzhiyun  - hsync-len
209*4882a593Smuzhiyun  - vfront-porch
210*4882a593Smuzhiyun  - vback-porch
211*4882a593Smuzhiyun  - vsync-len
212*4882a593Smuzhiyun
213*4882a593SmuzhiyunadditionalProperties: false
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun...
216