1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019-2020 Fuzhou Rockchip Electronics Co., Ltd. 4 */ 5 6/dts-v1/; 7 8#include "rk3399-evb-ind.dtsi" 9#include "rk3399-linux.dtsi" 10 11/ { 12 model = "Rockchip RK3399 EVB IND LPDDR4 Board edp (Linux)"; 13 compatible = "rockchip,linux", "rockchip,rk3399-evb-ind-lpddr4-linux", "rockchip,rk3399"; 14 15 iram: sram@ff8d0000 { 16 compatible = "mmio-sram"; 17 reg = <0x0 0xff8d0000 0x0 0x20000>; 18 }; 19 20 hub_reset: hub-reset { 21 compatible = "regulator-fixed"; 22 enable-active-high; 23 gpio = <&gpio4 18 GPIO_ACTIVE_HIGH>; 24 regulator-name = "hub_reset"; 25 regulator-always-on; 26 regulator-boot-on; 27 regulator-min-microvolt = <5000000>; 28 regulator-max-microvolt = <5000000>; 29 }; 30 31 vcc_lcd: vcc-lcd { 32 compatible = "regulator-fixed"; 33 regulator-name = "vcc_lcd"; 34 startup-delay-us = <20000>; 35 enable-active-high; 36 regulator-min-microvolt = <3300000>; 37 regulator-max-microvolt = <3300000>; 38 regulator-boot-on; 39 vin-supply = <&vcc5v0_sys>; 40 }; 41 42 panel: panel { 43 compatible = "simple-panel"; 44 backlight = <&backlight>; 45 power-supply = <&vcc_lcd>; 46 reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; 47 prepare-delay-ms = <20>; 48 enable-delay-ms = <20>; 49 50 display-timings { 51 native-mode = <&timing0>; 52 53 timing0: timing0 { 54 clock-frequency = <200000000>; 55 hactive = <1536>; 56 vactive = <2048>; 57 hfront-porch = <12>; 58 hsync-len = <16>; 59 hback-porch = <48>; 60 vfront-porch = <8>; 61 vsync-len = <4>; 62 vback-porch = <8>; 63 hsync-active = <0>; 64 vsync-active = <0>; 65 de-active = <0>; 66 pixelclk-active = <0>; 67 }; 68 }; 69 70 ports { 71 panel_in: endpoint { 72 remote-endpoint = <&edp_out>; 73 }; 74 }; 75 }; 76 77 test-power { 78 status = "okay"; 79 }; 80}; 81 82&backlight { 83 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; 84}; 85 86&display_subsystem { 87 status = "okay"; 88}; 89 90&dmac_bus { 91 iram = <&iram>; 92 rockchip,force-iram; 93}; 94 95&dp_sound { 96 status = "disabled"; 97}; 98 99&edp { 100 status = "okay"; 101 force-hpd; 102 103 ports { 104 port@1 { 105 reg = <1>; 106 107 edp_out: endpoint { 108 remote-endpoint = <&panel_in>; 109 }; 110 }; 111 }; 112}; 113 114&edp_in_vopb { 115 status = "disabled"; 116}; 117 118&hdmi { 119 pinctrl-names = "default"; 120 pinctrl-0 = <&hdmi_i2c_xfer>, <&hdmi_cec>; 121 #address-cells = <1>; 122 #size-cells = <0>; 123 #sound-dai-cells = <0>; 124 status = "okay"; 125}; 126 127&hdmi_in_vopl { 128 status = "disabled"; 129}; 130 131&hdmi_sound { 132 status = "okay"; 133}; 134 135&i2c1 { 136 status = "okay"; 137 138 vm149c: vm149c@0c { 139 compatible = "silicon touch,vm149c"; 140 status = "okay"; 141 reg = <0x0c>; 142 rockchip,camera-module-index = <0>; 143 rockchip,camera-module-facing = "back"; 144 }; 145 146 ov13850: ov13850@10 { 147 compatible = "ovti,ov13850"; 148 status = "okay"; 149 reg = <0x10>; 150 clocks = <&cru SCLK_CIF_OUT>; 151 clock-names = "xvclk"; 152 153 /* conflict with csi-ctl-gpios */ 154 reset-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; 155 pwdn-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 156 pinctrl-names = "rockchip,camera_default"; 157 pinctrl-0 = <&cif_clkout>; 158 rockchip,camera-module-index = <0>; 159 rockchip,camera-module-facing = "back"; 160 rockchip,camera-module-name = "CMK-CT0116"; 161 rockchip,camera-module-lens-name = "Largan-50013A1"; 162 163 lens-focus = <&vm149c>; 164 165 port { 166 ucam_out0: endpoint { 167 remote-endpoint = <&mipi_in_ucam0>; 168 data-lanes = <1 2>; 169 }; 170 }; 171 }; 172}; 173 174&i2s0 { 175 #sound-dai-cells = <0>; 176 status = "okay"; 177}; 178 179&i2s1 { 180 #sound-dai-cells = <0>; 181 status = "okay"; 182}; 183 184&i2s2 { 185 #sound-dai-cells = <0>; 186 status = "okay"; 187}; 188 189&mipi_dphy_rx0 { 190 status = "okay"; 191 192 ports { 193 #address-cells = <1>; 194 #size-cells = <0>; 195 196 port@0 { 197 reg = <0>; 198 #address-cells = <1>; 199 #size-cells = <0>; 200 201 mipi_in_ucam0: endpoint@1 { 202 reg = <1>; 203 remote-endpoint = <&ucam_out0>; 204 data-lanes = <1 2>; 205 }; 206 }; 207 208 port@1 { 209 reg = <1>; 210 #address-cells = <1>; 211 #size-cells = <0>; 212 213 dphy_rx0_out: endpoint@0 { 214 reg = <0>; 215 remote-endpoint = <&isp0_mipi_in>; 216 }; 217 }; 218 }; 219}; 220 221&mipi_dphy_tx1rx1 { 222 status = "okay"; 223 224 ports { 225 #address-cells = <1>; 226 #size-cells = <0>; 227 228 port@0 { 229 reg = <0>; 230 #address-cells = <1>; 231 #size-cells = <0>; 232 233 mipi_in_ucam1: endpoint@1 { 234 reg = <1>; 235 /* Unlinked camera */ 236 //remote-endpoint = <&ucam_out1>; 237 data-lanes = <1 2>; 238 }; 239 }; 240 241 port@1 { 242 reg = <1>; 243 #address-cells = <1>; 244 #size-cells = <0>; 245 246 dphy_tx1rx1_out: endpoint@0 { 247 reg = <0>; 248 remote-endpoint = <&isp1_mipi_in>; 249 }; 250 }; 251 }; 252}; 253 254&rk809_sound { 255 status = "okay"; 256}; 257 258&rkisp1_0 { 259 status = "okay"; 260 261 port { 262 #address-cells = <1>; 263 #size-cells = <0>; 264 265 isp0_mipi_in: endpoint@0 { 266 reg = <0>; 267 remote-endpoint = <&dphy_rx0_out>; 268 }; 269 }; 270}; 271 272&rkisp1_1 { 273 status = "okay"; 274 275 port { 276 #address-cells = <1>; 277 #size-cells = <0>; 278 279 isp1_mipi_in: endpoint@0 { 280 reg = <0>; 281 remote-endpoint = <&dphy_tx1rx1_out>; 282 }; 283 }; 284}; 285 286&route_edp { 287 status = "okay"; 288}; 289 290&route_hdmi { 291 status = "okay"; 292 connect = <&vopb_out_hdmi>; 293}; 294 295/* 296 * if enable dp_sound, should disable spdif_sound and spdif_out 297 */ 298&spdif_out { 299 status = "disabled"; 300}; 301 302&spdif_sound { 303 status = "disabled"; 304}; 305 306&tc358749x_sound { 307 status = "disabled"; 308}; 309 310&vcca_0v9 { 311 regulator-always-on; 312 regulator-boot-on; 313 regulator-min-microvolt = <900000>; 314 regulator-max-microvolt = <900000>; 315 regulator-name = "vcca_0v9"; 316 regulator-state-mem { 317 regulator-on-in-suspend; 318 regulator-suspend-microvolt = <900000>; 319 }; 320}; 321 322&vcc0v9_soc { 323 regulator-always-on; 324 regulator-boot-on; 325 regulator-min-microvolt = <900000>; 326 regulator-max-microvolt = <900000>; 327 328 regulator-name = "vcc0v9_soc"; 329 regulator-state-mem { 330 regulator-off-in-suspend; 331 }; 332}; 333 334&vopb { 335 status = "okay"; 336}; 337 338&vopb_mmu { 339 status = "okay"; 340}; 341 342&vopl { 343 status = "okay"; 344}; 345 346&vopl_mmu { 347 status = "okay"; 348}; 349 350&pinctrl { 351 lcd-panel { 352 lcd_panel_reset: lcd-panel-reset { 353 rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 354 }; 355 }; 356}; 357 358/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 359/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 360/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 361 362