| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | rockchip-pinconf.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 pcfg_pull_up: pcfg-pull-up { 8 bias-pull-up; 11 pcfg_pull_down: pcfg-pull-down { 12 bias-pull-down; 15 pcfg_pull_none: pcfg-pull-none { 16 bias-disable; 19 pcfg_pull_none_drv_level_0: pcfg-pull-none-drv-level-0 { 20 bias-disable; 21 drive-strength = <0>; [all …]
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| H A D | stm32mp157-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/pinctrl/stm32-pinfunc.h> 10 pinctrl: pin-controller@50002000 { 11 #address-cells = <1>; 12 #size-cells = <1>; 13 compatible = "st,stm32mp157-pinctrl"; 15 interrupt-parent = <&exti>; 17 pins-are-numbered; 20 gpio-controller; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/ |
| H A D | rockchip-pinconf.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /omit-if-no-ref/ 8 pcfg_pull_up: pcfg-pull-up { 9 bias-pull-up; 12 /omit-if-no-ref/ 13 pcfg_pull_down: pcfg-pull-down { 14 bias-pull-down; 17 /omit-if-no-ref/ 18 pcfg_pull_none: pcfg-pull-none { 19 bias-disable; [all …]
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| H A D | rk3588s-pinconf.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /omit-if-no-ref/ 8 pcfg_pull_up: pcfg-pull-up { 9 bias-pull-up; 12 /omit-if-no-ref/ 13 pcfg_pull_down: pcfg-pull-down { 14 bias-pull-down; 17 /omit-if-no-ref/ 18 pcfg_pull_none: pcfg-pull-none { 19 bias-disable; [all …]
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| H A D | px30s-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 pcfg_pull_none_n_4ma: pcfg-pull-none-n-4ma { 9 bias-disable; 10 drive-strength-s = <4>; 12 pcfg_pull_up_n_4ma: pcfg-pull-up-n-4ma { 13 bias-pull-up; 14 drive-strength-s = <4>; 16 pcfg_pull_down_n_4ma: pcfg-pull-down-n-4ma { 17 bias-pull-down; 18 drive-strength-s = <4>; [all …]
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| H A D | rk3308bs-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 pcfg_pull_none_0_4ma: pcfg-pull-none-0-4ma { 9 bias-disable; 10 drive-strength-s = <4>; 12 pcfg_pull_none_0_4ma_smt: pcfg-pull-none-0-4ma-smt { 13 bias-disable; 14 drive-strength-s = <4>; 15 input-schmitt-enable; 17 pcfg_pull_up_0_4ma: pcfg-pull-up-0-4ma { 18 bias-pull-up; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | rockchip-pinconf.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /omit-if-no-ref/ 9 pcfg_pull_up: pcfg-pull-up { 10 bias-pull-up; 13 /omit-if-no-ref/ 14 pcfg_pull_down: pcfg-pull-down { 15 bias-pull-down; 18 /omit-if-no-ref/ 19 pcfg_pull_none: pcfg-pull-none { 20 bias-disable; [all …]
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| H A D | qcom-apq8060-dragonboard.dts | 23 #include <dt-bindings/input/input.h> 24 #include <dt-bindings/gpio/gpio.h> 25 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 26 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 27 #include "qcom-msm8660.dtsi" 31 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; 38 stdout-path = "serial0:115200n8"; 42 compatible = "simple-bus"; 45 vph: regulator-fixed { 46 compatible = "regulator-fixed"; [all …]
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| H A D | ste-href-ab8500.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include "ste-ab8500.dtsi" 12 ab8500-gpiocontroller { 14 pinctrl-names = "default"; 15 pinctrl-0 = <&gpio2_default_mode>, 41 * are muxed in as GPIO, and configured as INPUT PULL DOWN 51 input-enable; 52 bias-pull-down; 64 input-enable; 65 bias-pull-down; [all …]
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| H A D | qcom-apq8064-sony-xperia-yuga.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "qcom-apq8064-v2.0.dtsi" 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/mfd/qcom-rpm.h> 6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 10 compatible = "sony,xperia-yuga", "qcom,apq8064"; 17 stdout-path = "serial0:115200n8"; 20 gpio-keys { 21 compatible = "gpio-keys"; [all …]
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| H A D | qcom-apq8064-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 sdc4_gpios: sdc4-gpios { 11 sdcc1_pins: sdcc1-pin-active { 14 drive-strengh = <16>; 15 bias-disable; 20 drive-strengh = <10>; 21 bias-pull-up; 26 drive-strengh = <10>; 27 bias-pull-up; 31 sdcc3_pins: sdcc3-pin-active { [all …]
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| H A D | stm32mp15-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/pinctrl/stm32-pinfunc.h> 9 adc1_in6_pins_a: adc1-in6-0 { 15 adc12_ain_pins_a: adc12-ain-0 { 24 adc12_ain_pins_b: adc12-ain-1 { 31 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 { 38 cec_pins_a: cec-0 { 41 bias-disable; 42 drive-open-drain; [all …]
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| H A D | bcm2711.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/soc/bcm2835-pm.h> 10 #address-cells = <2>; 11 #size-cells = <1>; 13 interrupt-parent = <&gicv2>; 16 compatible = "brcm,bcm2711-vc5"; 20 clk_27MHz: clk-27M { 21 #clock-cells = <0>; 22 compatible = "fixed-clock"; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/ |
| H A D | msm8996-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 17 drive-strength = <2>; /* 2 mA */ 18 bias-pull-down; /* pull down */ 19 input-enable; 32 drive-strength = <16>; 33 bias-disable; 34 output-low; 44 drive-strength = <16>; 45 bias-pull-down; [all …]
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| H A D | msm8998-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 bias-disable; /* NO pull */ 9 drive-strength = <16>; /* 16 mA */ 16 bias-disable; /* NO pull */ 17 drive-strength = <2>; /* 2 mA */ 24 bias-pull-up; /* pull up */ 25 drive-strength = <10>; /* 10 mA */ 32 bias-pull-up; /* pull up */ 33 drive-strength = <2>; /* 2 mA */ 40 bias-pull-up; /* pull up */ [all …]
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| H A D | msm8916-pins.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 8 blsp1_uart1_default: blsp1-uart1-default { 13 drive-strength = <16>; 14 bias-disable; 17 blsp1_uart1_sleep: blsp1-uart1-sleep { 21 drive-strength = <2>; 22 bias-pull-down; 25 blsp1_uart2_default: blsp1-uart2-default { 29 drive-strength = <16>; [all …]
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| H A D | sc7180-idp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 18 compatible = "qcom,sc7180-idp", "qcom,sc7180"; 28 stdout-path = "serial0:115200n8"; 40 /delete-node/ &hyp_mem; 41 /delete-node/ &xbl_mem; 42 /delete-node/ &aop_mem; 43 /delete-node/ &sec_apps_mem; [all …]
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| H A D | qcs404-evb-4000.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 /dts-v1/; 6 #include <dt-bindings/gpio/gpio.h> 7 #include "qcs404-evb.dtsi" 11 compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb", 18 snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; 19 snps,reset-active-low; 20 snps,reset-delays-us = <0 10000 10000>; 22 pinctrl-names = "default"; 23 pinctrl-0 = <ðernet_defaults>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/toshiba/ |
| H A D | tmpv7708_pins.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 spi0_pins: spi0-pins { 8 spi1_pins: spi1-pins { 12 spi2_pins: spi2-pins { 16 spi3_pins: spi3-pins { 20 spi4_pins: spi4-pins { 24 spi5_pins: spi5-pins { 28 spi6_pins: spi6-pins { 32 uart0_pins: uart0-pins { 36 uart1_pins: uart1-pins { [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8183-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 14 compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; 26 stdout-path = "serial0:921600n8"; 29 reserved-memory { 30 #address-cells = <2>; 31 #size-cells = <2>; 34 compatible = "shared-dma-pool"; 36 no-map; 46 pinctrl-names = "default"; [all …]
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| H A D | mt8173-elm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/regulator/dlg,da9211-regulator.h> 9 #include <dt-bindings/gpio/gpio.h> 19 compatible = "pwm-backlight"; 21 power-supply = <&bl_fixed_reg>; 22 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&disp_pwm0_pins>; [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/ |
| H A D | pinctrl-mt65xx.txt | 6 - compatible: value should be one of the following. 7 "mediatek,mt2701-pinctrl", compatible with mt2701 pinctrl. 8 "mediatek,mt2712-pinctrl", compatible with mt2712 pinctrl. 9 "mediatek,mt6397-pinctrl", compatible with mt6397 pinctrl. 10 "mediatek,mt7623-pinctrl", compatible with mt7623 pinctrl. 11 "mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl. 12 "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl. 13 "mediatek,mt8167-pinctrl", compatible with mt8167 pinctrl. 14 "mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl. 15 "mediatek,mt8516-pinctrl", compatible with mt8516 pinctrl. [all …]
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| H A D | ti,da850-pupd.txt | 1 * Pin configuration for TI DA850/OMAP-L138/AM18x 3 These SoCs have a separate controller for setting bias (internal pullup/down). 4 Bias can only be selected for groups rather than individual pins. 8 - compatible: Must be "ti,da850-pupd" 9 - reg: Base address and length of the memory resource used by the pullup/down 17 - groups: An array of strings, each string containing the name of a pin group. 21 pinctrl-bindings.txt in this directory. The supported parameters are 22 bias-disable, bias-pull-up, bias-pull-down. 26 ------- 30 pinconf: pin-controller@22c00c { [all …]
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| H A D | sprd,sc9860-pinctrl.txt | 7 - compatible: Must be "sprd,sc9860-pinctrl". 8 - reg: The register address of pin controller device. 9 - pins : An array of strings, each string containing the name of a pin. 12 - function: A string containing the name of the function, values must be 14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10, 16 - input-schmitt-disable: Enable schmitt-trigger mode. 17 - input-schmitt-enable: Disable schmitt-trigger mode. 18 - bias-disable: Disable pin bias. 19 - bias-pull-down: Pull down on pin. 20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor [all …]
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| /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/pinctrl/ |
| H A D | pinctrl-bindings.txt | 4 such as pull-up/down, tri-state, drive-strength etc are designated as pin 13 set up certain specific pin configurations. Some client devices need a 14 single static pin configuration, e.g. set up during initialization. Others 15 need to reconfigure pins at run-time, for example to tri-state pins when the 25 For example, a pin controller may set up its own "active" state when the 47 pinctrl-0: List of phandles, each pointing at a pin configuration 65 pinctrl-1: List of phandles, each pointing at a pin configuration 68 pinctrl-n: List of phandles, each pointing at a pin configuration 70 pinctrl-names: The list of names to assign states. List entry 0 defines the 78 pinctrl-names = "active", "idle"; [all …]
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